dfb208511e
Changes includes:
1. Add new MSR definition:
1. MSR_XEON_PHI_PPIN_CTL
2. MSR_XEON_PHI_PPIN
3. MSR_XEON_PHI_MISC_FEATURE_ENABLES
4. MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT
2. Add DisplayModule == 0x85 supports.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>