6f890d5b40
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6639 6f19259b-4bc3-4df7-8a09-765794883524
80 lines
1.8 KiB
ArmAsm
80 lines
1.8 KiB
ArmAsm
/// @file
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/// Contains an implementation of CallPalProcStacked on Itanium-based
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/// architecture.
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///
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/// Copyright (c) 2008, Intel Corporation
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/// All rights reserved. This program and the accompanying materials
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/// are licensed and made available under the terms and conditions of the BSD License
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/// which accompanies this distribution. The full text of the license may be found at
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/// http://opensource.org/licenses/bsd-license.php
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///
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/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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///
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/// Module Name: AsmCpuMisc.s
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///
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///
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.text
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.proc CpuBreakpoint
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.type CpuBreakpoint, @function
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CpuBreakpoint::
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break.i 0;;
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br.ret.dpnt b0;;
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.endp CpuBreakpoint
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.proc MemoryFence
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.type MemoryFence, @function
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MemoryFence::
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mf;; // memory access ordering
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// do we need the mf.a also here?
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mf.a // wait for any IO to complete?
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// not sure if we need serialization here, just put it, in case...
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srlz.d;;
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srlz.i;;
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br.ret.dpnt b0;;
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.endp MemoryFence
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.proc DisableInterrupts
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.type DisableInterrupts, @function
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DisableInterrupts::
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rsm 0x4000
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srlz.d;;
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br.ret.dpnt b0;;
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.endp DisableInterrupts
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.proc EnableInterrupts
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.type EnableInterrupts, @function
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EnableInterrupts::
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ssm 0x4000
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srlz.d;;
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br.ret.dpnt b0;;
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.endp EnableInterrupts
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.proc EnableDisableInterrupts
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.type EnableDisableInterrupts, @function
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EnableDisableInterrupts::
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ssm 0x4000
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srlz.d;;
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srlz.i;;
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rsm 0x4000
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srlz.d;;
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br.ret.dpnt b0;;
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.endp EnableDisableInterrupts
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