e120c962f5
Create an almost verbatim copy of the "OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf" library instance. The new PciHostBridgeLibScan instance will ultimately duplicate a negligible amount of code from the original, and will be used by the Bhyve and OvmfXen platforms. List the new driver in "Maintainers.txt", in the "OvmfPkg: bhyve-related modules" and "OvmfPkg: Xen-related modules" sections. This patch should be reviewed with "git show --find-copies-harder". Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Julien Grall <julien@xen.org> Cc: Peter Grehan <grehan@freebsd.org> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Rebecca Cran <rebecca@bsdio.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20210526201446.12554-30-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
134 lines
4.2 KiB
C
134 lines
4.2 KiB
C
/** @file
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OVMF's instance of the PCI Host Bridge Library.
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Copyright (C) 2016-2021, Red Hat, Inc.
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Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <IndustryStandard/Pci.h> // PCI_MAX_BUS
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#include <IndustryStandard/Q35MchIch9.h> // INTEL_Q35_MCH_DEVIC...
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#include <Library/BaseMemoryLib.h> // ZeroMem()
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#include <Library/PcdLib.h> // PcdGet64()
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#include <Library/PciHostBridgeLib.h> // PCI_ROOT_BRIDGE_APE...
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#include <Library/PciHostBridgeUtilityLib.h> // PciHostBridgeUtilit...
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#include <Protocol/PciHostBridgeResourceAllocation.h> // EFI_PCI_HOST_BRIDGE...
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#include <Protocol/PciRootBridgeIo.h> // EFI_PCI_ATTRIBUTE_I...
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#include "PciHostBridge.h"
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STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };
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/**
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Return all the root bridge instances in an array.
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@param Count Return the count of root bridge instances.
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@return All the root bridge instances in an array.
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The array should be passed into PciHostBridgeFreeRootBridges()
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when it's not used.
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**/
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PCI_ROOT_BRIDGE *
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EFIAPI
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PciHostBridgeGetRootBridges (
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UINTN *Count
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)
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{
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UINT64 Attributes;
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UINT64 AllocationAttributes;
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PCI_ROOT_BRIDGE_APERTURE Io;
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PCI_ROOT_BRIDGE_APERTURE Mem;
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PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
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if (PcdGetBool (PcdPciDisableBusEnumeration)) {
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return ScanForRootBridges (Count);
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}
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ZeroMem (&Io, sizeof (Io));
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ZeroMem (&Mem, sizeof (Mem));
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ZeroMem (&MemAbove4G, sizeof (MemAbove4G));
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Attributes = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
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EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
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EFI_PCI_ATTRIBUTE_ISA_IO_16 |
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EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
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EFI_PCI_ATTRIBUTE_VGA_MEMORY |
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EFI_PCI_ATTRIBUTE_VGA_IO_16 |
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EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
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AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
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if (PcdGet64 (PcdPciMmio64Size) > 0) {
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AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
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MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);
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MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +
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PcdGet64 (PcdPciMmio64Size) - 1;
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} else {
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CopyMem (&MemAbove4G, &mNonExistAperture, sizeof (mNonExistAperture));
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}
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Io.Base = PcdGet64 (PcdPciIoBase);
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Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
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Mem.Base = PcdGet64 (PcdPciMmio32Base);
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Mem.Limit = PcdGet64 (PcdPciMmio32Base) + (PcdGet64 (PcdPciMmio32Size) - 1);
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return PciHostBridgeUtilityGetRootBridges (
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Count,
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Attributes,
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AllocationAttributes,
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FALSE,
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PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,
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0,
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PCI_MAX_BUS,
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&Io,
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&Mem,
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&MemAbove4G,
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&mNonExistAperture,
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&mNonExistAperture
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);
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}
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/**
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Free the root bridge instances array returned from
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PciHostBridgeGetRootBridges().
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@param The root bridge instances array.
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@param The count of the array.
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**/
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VOID
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EFIAPI
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PciHostBridgeFreeRootBridges (
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PCI_ROOT_BRIDGE *Bridges,
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UINTN Count
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)
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{
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PciHostBridgeUtilityFreeRootBridges (Bridges, Count);
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}
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/**
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Inform the platform that the resource conflict happens.
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@param HostBridgeHandle Handle of the Host Bridge.
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@param Configuration Pointer to PCI I/O and PCI memory resource
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descriptors. The Configuration contains the resources
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for all the root bridges. The resource for each root
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bridge is terminated with END descriptor and an
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additional END is appended indicating the end of the
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entire resources. The resource descriptor field
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values follow the description in
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EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
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.SubmitResources().
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**/
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VOID
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EFIAPI
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PciHostBridgeResourceConflict (
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EFI_HANDLE HostBridgeHandle,
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VOID *Configuration
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)
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{
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PciHostBridgeUtilityResourceConflict (Configuration);
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}
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