On PIIX4, function 3, the PMREGMISC register at offset 0x80, with default value 0x00 has its bit 0 (PMIOSE) indicate whether the PM IO space given in the PMBA register (offset 0x40) is enabled. PMBA must be configured *before* setting this bit. On Q35/ICH9+, function 0x1f, the equivalent role is fulfilled by bit 7 (ACPI_EN) in the ACPI Control Register (ACPI_CNTL) at offset 0x44, also with a default value of 0x00. Currently, OVMF hangs when Q35 reboots, because while PMBA is reset by QEMU, the register at offset 0x80 (matching PMREGMISC on PIIX4) is not reset, since it has a completely different meaning on LPC. As such, the power management initialization logic in OVMF finds the "PMIOSE" bit enabled after a reboot and decides to skip setting PMBA. This causes the ACPI timer tick routine to read a constant value from the wrong register, which in turn causes the ACPI delay loop to hang indefinitely. This patch modifies the Base[Rom]AcpiTimerLib constructors and the PlatformPei ACPI PM init routines to use ACPI_CNTL:ACPI_EN instead of PMREGMISC:PMIOSE when running on Q35. Reported-by: Reza Jelveh <reza.jelveh@tuhh.de> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17076 6f19259b-4bc3-4df7-8a09-765794883524
118 lines
3.0 KiB
C
118 lines
3.0 KiB
C
/** @file
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Provide constructor and GetTick for Base instance of ACPI Timer Library
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Copyright (C) 2014, Gabriel L. Somlo <somlo@cmu.edu>
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This program and the accompanying materials are licensed and made
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available under the terms and conditions of the BSD License which
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accompanies this distribution. The full text of the license may
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be found at http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/PciLib.h>
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#include <Library/PcdLib.h>
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#include <OvmfPlatforms.h>
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//
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// Power Management PCI Configuration Register fields
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//
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#define PMBA_RTE BIT0
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#define PIIX4_PMIOSE BIT0
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#define Q35_ACPI_EN BIT7
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//
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// Offset in the Power Management Base Address to the ACPI Timer
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//
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#define ACPI_TIMER_OFFSET 0x8
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//
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// Cached ACPI Timer IO Address
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//
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STATIC UINT32 mAcpiTimerIoAddr;
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/**
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The constructor function caches the ACPI tick counter address, and,
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if necessary, enables ACPI IO space.
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@retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.
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**/
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RETURN_STATUS
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EFIAPI
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AcpiTimerLibConstructor (
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VOID
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)
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{
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UINT16 HostBridgeDevId;
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UINTN Pmba;
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UINTN AcpiCtlReg;
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UINT8 AcpiEnBit;
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//
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// Query Host Bridge DID to determine platform type
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//
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HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
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switch (HostBridgeDevId) {
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case INTEL_82441_DEVICE_ID:
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Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
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AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (0x80); // PMREGMISC
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AcpiEnBit = PIIX4_PMIOSE;
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break;
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case INTEL_Q35_MCH_DEVICE_ID:
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Pmba = POWER_MGMT_REGISTER_Q35 (0x40);
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AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (0x44); // ACPI_CNTL
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AcpiEnBit = Q35_ACPI_EN;
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break;
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default:
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DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
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__FUNCTION__, HostBridgeDevId));
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ASSERT (FALSE);
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return RETURN_UNSUPPORTED;
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}
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mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET;
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//
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// Check to see if the Power Management Base Address is already enabled
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//
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if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
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//
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// If the Power Management Base Address is not programmed,
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// then program the Power Management Base Address from a PCD.
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//
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PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
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//
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// Enable PMBA I/O port decodes
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//
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PciOr8 (AcpiCtlReg, AcpiEnBit);
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}
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return RETURN_SUCCESS;
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}
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/**
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Internal function to read the current tick counter of ACPI.
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Read the current ACPI tick counter using the counter address cached
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by this instance's constructor.
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@return The tick counter read.
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**/
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UINT32
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InternalAcpiGetTimerTick (
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VOID
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)
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{
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//
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// Return the current ACPI timer value.
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//
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return IoRead32 (mAcpiTimerIoAddr);
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}
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