e51a677dea
For historical reasons, the files under ArmLib are split up into 'common' files under Common/, containing common C files as well as AArch64 and Arm specific asm files, and ArmV7 and AArch64 files under ArmV7/ and AArch64/, respectively. This presumably dates back to the time when ArmLib supported different revisions of the 32-bit architecture (i.e., pre-V7) Since the PI spec requires V7 or later, we can simplify this to Arm/ and AArch64, which aligns ArmLib with the majority of other modules that carry ARM or AArch64 specific code. So move the files around so that shared files live at the same level as ArmBaseLib.inf, and ARM/AArch64 specific files live in Arm/ or AArch64/, respectively. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
108 lines
1.8 KiB
C
108 lines
1.8 KiB
C
/** @file
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include "ArmLibPrivate.h"
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VOID
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EFIAPI
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ArmSetAuxCrBit (
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IN UINT32 Bits
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)
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{
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UINT32 val = ArmReadAuxCr();
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val |= Bits;
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ArmWriteAuxCr(val);
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}
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VOID
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EFIAPI
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ArmUnsetAuxCrBit (
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IN UINT32 Bits
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)
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{
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UINT32 val = ArmReadAuxCr();
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val &= ~Bits;
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ArmWriteAuxCr(val);
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}
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//
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// Helper functions for accessing CPUACTLR
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//
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VOID
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EFIAPI
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ArmSetCpuActlrBit (
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IN UINTN Bits
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)
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{
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UINTN Value;
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Value = ArmReadCpuActlr ();
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Value |= Bits;
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ArmWriteCpuActlr (Value);
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}
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VOID
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EFIAPI
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ArmUnsetCpuActlrBit (
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IN UINTN Bits
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)
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{
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UINTN Value;
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Value = ArmReadCpuActlr ();
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Value &= ~Bits;
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ArmWriteCpuActlr (Value);
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}
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UINTN
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EFIAPI
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ArmDataCacheLineLength (
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VOID
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)
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{
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return 4 << ((ArmCacheInfo () >> 16) & 0xf); // CTR_EL0.DminLine
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}
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UINTN
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EFIAPI
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ArmInstructionCacheLineLength (
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VOID
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)
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{
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return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine
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}
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UINTN
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EFIAPI
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ArmCacheWritebackGranule (
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VOID
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)
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{
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UINTN CWG;
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CWG = (ArmCacheInfo () >> 24) & 0xf; // CTR_EL0.CWG
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if (CWG == 0) {
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return SIZE_2KB;
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}
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return 4 << CWG;
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}
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