Star Zeng e8097a74b7 IntelSiliconPkg IntelVTdPmrPei: Refine comments about PHMR/PLMR.Limit ...

According to VTd spec, the real hardware decoded limit should be
PHMR/PLMR.Limit value + alignment value.

"Bits N:0 of the limit register are
decoded by hardware as all 1s."

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

2018-01-17 10:34:22 +08:00

..

IntelVTdDxe

IntelSiliconPkg IntelVTdDxe: Fix potential NULL pointer dereference

2018-01-16 09:01:50 +08:00

IntelVTdPmrPei

IntelSiliconPkg IntelVTdPmrPei: Refine comments about PHMR/PLMR.Limit

2018-01-17 10:34:22 +08:00

PlatformVTdInfoSamplePei

IntelSiliconPkg/VtdPeiSample: Add premem support.

2017-10-30 09:27:56 +08:00

PlatformVTdSampleDxe

IntelSiliconPkg/VTdDxe: return unsupported for exceptionlist

2017-10-30 09:25:54 +08:00