9344f09215
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
71 lines
2.3 KiB
C
71 lines
2.3 KiB
C
/** @file
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GUID used for MemoryOverwriteRequestControl UEFI variable defined in
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TCG Platform Reset Attack Mitigation Specification 1.00.
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See http://trustedcomputinggroup.org for the latest specification
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The purpose of the MemoryOverwriteRequestControl UEFI variable is to give users (e.g., OS, loader) the ability to
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indicate to the platform that secrets are present in memory and that the platform firmware must clear memory upon
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a restart. The OS loader should not create the variable. Rather, the firmware is required to create it.
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Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _MEMORY_OVERWRITE_CONTROL_DATA_GUID_H_
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#define _MEMORY_OVERWRITE_CONTROL_DATA_GUID_H_
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#define MEMORY_ONLY_RESET_CONTROL_GUID \
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{ \
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0xe20939be, 0x32d4, 0x41be, {0xa1, 0x50, 0x89, 0x7f, 0x85, 0xd4, 0x98, 0x29} \
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}
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///
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/// Variable name is "MemoryOverwriteRequestControl" and it is a 1 byte unsigned value.
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/// The attributes should be:
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/// EFI_VARIABLE_NON_VOLATILE |
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/// EFI_VARIABLE_BOOTSERVICE_ACCESS |
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/// EFI_VARIABLE_RUNTIME_ACCESS
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///
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#define MEMORY_OVERWRITE_REQUEST_VARIABLE_NAME L"MemoryOverwriteRequestControl"
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///
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/// 0 = Firmware MUST clear the MOR bit
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/// 1 = Firmware MUST set the MOR bit
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///
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#define MOR_CLEAR_MEMORY_BIT_MASK 0x01
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///
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/// 0 = Firmware MAY autodetect a clean shutdown of the Static RTM OS.
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/// 1 = Firmware MUST NOT autodetect a clean shutdown of the Static RTM OS.
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///
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#define MOR_DISABLEAUTODETECT_BIT_MASK 0x10
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///
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/// MOR field bit offset
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///
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#define MOR_CLEAR_MEMORY_BIT_OFFSET 0
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#define MOR_DISABLEAUTODETECT_BIT_OFFSET 4
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/**
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Return the ClearMemory bit value 0 or 1.
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@param mor 1 byte value that contains ClearMemory and DisableAutoDetect bit.
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@return ClearMemory bit value
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**/
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#define MOR_CLEAR_MEMORY_VALUE(mor) (((UINT8)(mor) & MOR_CLEAR_MEMORY_BIT_MASK) >> MOR_CLEAR_MEMORY_BIT_OFFSET)
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/**
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Return the DisableAutoDetect bit value 0 or 1.
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@param mor 1 byte value that contains ClearMemory and DisableAutoDetect bit.
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@return DisableAutoDetect bit value
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**/
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#define MOR_DISABLE_AUTO_DETECT_VALUE(mor) (((UINT8)(mor) & MOR_DISABLEAUTODETECT_BIT_MASK) >> MOR_DISABLEAUTODETECT_BIT_OFFSET)
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extern EFI_GUID gEfiMemoryOverwriteControlDataGuid;
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#endif
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