SoC Integrated Address Translation Cache (SATC) reporting structure is one of the Remapping Structure, which is imported since Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture Specification v3.2. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109 Signed-off-by: Sheng Wei <w.sheng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jenny Huang <jenny.huang@intel.com> Cc: Kowalewski Robert <robert.kowalewski@intel.com> Cc: Feng Roger <roger.feng@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
		
			
				
	
	
		
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			292 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/** @file
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  DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
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  Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
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  Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
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  SPDX-License-Identifier: BSD-2-Clause-Patent
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  @par Revision Reference:
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    - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
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      Specification v3.2, Dated October 2020.
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      https://software.intel.com/content/dam/develop/external/us/en/documents/vt-directed-io-spec.pdf
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  @par Glossary:
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    - HPET - High Precision Event Timer
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    - NUMA - Non-uniform Memory Access
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**/
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#ifndef _DMA_REMAPPING_REPORTING_TABLE_H_
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#define _DMA_REMAPPING_REPORTING_TABLE_H_
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#include <IndustryStandard/Acpi.h>
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#pragma pack(1)
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///
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/// DMA-Remapping Reporting Structure definitions from section 8.1
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///@{
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#define EFI_ACPI_DMAR_REVISION                             0x01
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#define EFI_ACPI_DMAR_FLAGS_INTR_REMAP                     BIT0
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#define EFI_ACPI_DMAR_FLAGS_X2APIC_OPT_OUT                 BIT1
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#define EFI_ACPI_DMAR_FLAGS_DMA_CTRL_PLATFORM_OPT_IN_FLAG  BIT2
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///@}
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///
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/// Remapping Structure Types definitions from section 8.2
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///@{
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#define EFI_ACPI_DMAR_TYPE_DRHD                   0x00
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#define EFI_ACPI_DMAR_TYPE_RMRR                   0x01
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#define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
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#define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
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#define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
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#define EFI_ACPI_DMAR_TYPE_SATC                   0x05
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///@}
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///
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/// DMA-Remapping Hardware Unit definitions from section 8.3
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///
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#define EFI_ACPI_DMAR_DRHD_FLAGS_INCLUDE_PCI_ALL  BIT0
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///
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/// DMA-Remapping Device Scope Entry Structure definitions from section 8.3.1
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///@{
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#define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT           0x01
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#define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE             0x02
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#define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_IOAPIC                 0x03
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#define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_MSI_CAPABLE_HPET       0x04
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#define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_ACPI_NAMESPACE_DEVICE  0x05
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///@}
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///
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/// Root Port ATS Capability Reporting Structure definitions from section 8.5
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///
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#define EFI_ACPI_DMAR_ATSR_FLAGS_ALL_PORTS                      BIT0
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///
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/// Definition for DMA Remapping Structure Header
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///
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typedef struct {
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  UINT16        Type;
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  UINT16        Length;
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} EFI_ACPI_DMAR_STRUCTURE_HEADER;
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///
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/// Definition for DMA-Remapping PCI Path
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///
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typedef struct {
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  UINT8         Device;
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  UINT8         Function;
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} EFI_ACPI_DMAR_PCI_PATH;
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///
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/// Device Scope Structure is defined in section 8.3.1
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///
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typedef struct {
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  UINT8         Type;
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  UINT8         Length;
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  UINT16        Reserved2;
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  UINT8         EnumerationId;
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  UINT8         StartBusNumber;
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} EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER;
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/**
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  DMA-remapping hardware unit definition (DRHD) structure is defined in
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  section 8.3. This uniquely represents a remapping hardware unit present
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  in the platform. There must be at least one instance of this structure
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  for each PCI segment in the platform.
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**/
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typedef struct {
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  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
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  /**
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    - Bit[0]: INCLUDE_PCI_ALL
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              - If Set, this remapping hardware unit has under its scope all
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                PCI compatible devices in the specified Segment, except devices
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                reported under the scope of other remapping hardware units for
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                the same Segment.
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              - If Clear, this remapping hardware unit has under its scope only
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                devices in the specified Segment that are explicitly identified
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                through the DeviceScope field.
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    - Bits[7:1] Reserved.
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  **/
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  UINT8                           Flags;
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  UINT8                           Reserved;
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  ///
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  /// The PCI Segment associated with this unit.
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  ///
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  UINT16                          SegmentNumber;
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  ///
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  /// Base address of remapping hardware register-set for this unit.
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  ///
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  UINT64                          RegisterBaseAddress;
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} EFI_ACPI_DMAR_DRHD_HEADER;
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/**
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  Reserved Memory Region Reporting Structure (RMRR) is described in section 8.4
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  Reserved memory ranges that may be DMA targets may be reported through the
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  RMRR structures, along with the devices that requires access to the specified
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  reserved memory region.
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**/
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typedef struct {
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  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
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  UINT8                           Reserved[2];
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  ///
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  /// PCI Segment Number associated with devices identified through
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  /// the Device Scope field.
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  ///
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  UINT16                          SegmentNumber;
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  ///
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  /// Base address of 4KB-aligned reserved memory region
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  ///
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  UINT64                          ReservedMemoryRegionBaseAddress;
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  /**
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    Last address of the reserved memory region. Value in this field must be
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    greater than the value in Reserved Memory Region Base Address field.
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    The reserved memory region size (Limit - Base + 1) must be an integer
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    multiple of 4KB.
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  **/
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  UINT64                          ReservedMemoryRegionLimitAddress;
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} EFI_ACPI_DMAR_RMRR_HEADER;
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/**
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  Root Port ATS Capability Reporting (ATSR) structure is defined in section 8.5.
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  This structure is applicable only for platforms supporting Device-TLBs as
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  reported through the Extended Capability Register. For each PCI Segment in
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  the platform that supports Device-TLBs, BIOS provides an ATSR structure. The
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  ATSR structures identifies PCI-Express Root-Ports supporting Address
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  Translation Services (ATS) transactions. Software must enable ATS on endpoint
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  devices behind a Root Port only if the Root Port is reported as supporting
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  ATS transactions.
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**/
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typedef struct {
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  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
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  /**
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    - Bit[0]: ALL_PORTS:
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              - If Set, indicates all PCI Express Root Ports in the specified
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                PCI Segment supports ATS transactions.
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              - If Clear, indicates ATS transactions are supported only on
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                Root Ports identified through the Device Scope field.
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    - Bits[7:1] Reserved.
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  **/
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  UINT8                           Flags;
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  UINT8                           Reserved;
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  ///
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  /// The PCI Segment associated with this ATSR structure
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  ///
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  UINT16                          SegmentNumber;
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} EFI_ACPI_DMAR_ATSR_HEADER;
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/**
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  Remapping Hardware Static Affinity (RHSA) is an optional structure defined
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  in section 8.6. This is intended to be used only on NUMA platforms with
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  Remapping hardware units and memory spanned across multiple nodes.
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  When used, there must be a RHSA structure for each Remapping hardware unit
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  reported through DRHD structure.
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**/
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typedef struct {
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  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
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  UINT8                           Reserved[4];
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  ///
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  /// Register Base Address of this Remap hardware unit reported in the
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  /// corresponding DRHD structure.
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  ///
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  UINT64                          RegisterBaseAddress;
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  ///
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  /// Proximity Domain to which the Remap hardware unit identified by the
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  /// Register Base Address field belongs.
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  ///
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  UINT32                          ProximityDomain;
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} EFI_ACPI_DMAR_RHSA_HEADER;
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/**
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  An ACPI Name-space Device Declaration (ANDD) structure is defined in section
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  8.7 and uniquely represents an ACPI name-space enumerated device capable of
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  issuing DMA requests in the platform. ANDD structures are used in conjunction
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  with Device-Scope entries of type ACPI_NAMESPACE_DEVICE.
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**/
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typedef struct {
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  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
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  UINT8                           Reserved[3];
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  /**
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    Each ACPI device enumerated through an ANDD structure must have a unique
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    value for this field. To report an ACPI device with ACPI Device Number
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    value of X, under the scope of a DRHD unit, a Device-Scope entry of type
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    ACPI_NAMESPACE_DEVICE is used with value of X in the Enumeration ID field.
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    The Start Bus Number and Path fields in the Device-Scope together
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    provides the 16-bit source-id allocated by platform for the ACPI device.
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  **/
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  UINT8                           AcpiDeviceNumber;
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} EFI_ACPI_DMAR_ANDD_HEADER;
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/**
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  An SoC Integrated Address Translation Cache (SATC) reporting structure is
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  defined in section 8.8.
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**/
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typedef struct {
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  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
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  /**
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    - Bit[0]: ATC_REQUIRED:
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              - If Set, indicates that every SoC integrated device enumerated
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                in this table has a functional requirement to enable its ATC
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                (via the ATS capability) for device operation.
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              - If Clear, any device enumerated in this table can operate when
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                its respective ATC is not enabled (albeit with reduced
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                performance or functionality).
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    - Bits[7:1] Reserved.
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  **/
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  UINT8                           Flags;
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  UINT8                           Reserved;
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  ///
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  /// The PCI Segment associated with this SATC structure. All SoC integrated
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  /// devices within a PCI segment with same value for Flags field must be
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  /// enumerated in the same SATC structure.
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  ///
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  UINT16                          SegmentNumber;
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} EFI_ACPI_DMAR_SATC_HEADER;
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/**
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  DMA Remapping Reporting Structure Header as defined in section 8.1
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  This header will be followed by list of Remapping Structures listed below
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    - DMA Remapping Hardware Unit Definition (DRHD)
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    - Reserved Memory Region Reporting (RMRR)
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    - Root Port ATS Capability Reporting (ATSR)
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    - Remapping Hardware Static Affinity (RHSA)
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    - ACPI Name-space Device Declaration (ANDD)
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    - SoC Integrated Address Translation Cache reporting (SATC)
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  These structure types must by reported in numerical order.
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  i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
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  structures of type 1 (RMRR), and so forth.
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**/
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typedef struct {
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  EFI_ACPI_DESCRIPTION_HEADER     Header;
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  /**
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    This field indicates the maximum DMA physical addressability supported by
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    this platform. The system address map reported by the BIOS indicates what
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    portions of this addresses are populated. The Host Address Width (HAW) of
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    the platform is computed as (N+1), where N is the value reported in this
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    field.
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    For example, for a platform supporting 40 bits of physical addressability,
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    the value of 100111b is reported in this field.
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  **/
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  UINT8                           HostAddressWidth;
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  /**
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    - Bit[0]:   INTR_REMAP - If Clear, the platform does not support interrupt
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                remapping. If Set, the platform supports interrupt remapping.
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    - Bit[1]:   X2APIC_OPT_OUT - For firmware compatibility reasons, platform
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                firmware may Set this field to request system software to opt
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                out of enabling Extended xAPIC (X2APIC) mode. This field is
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                valid only when the INTR_REMAP field (bit 0) is Set.
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    - Bit[2]:   DMA_CTRL_PLATFORM_OPT_IN_FLAG - Platform firmware is
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                recommended to Set this field to report any platform initiated
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                DMA is restricted to only reserved memory regions (reported in
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                RMRR structures) when transferring control to system software
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                such as on ExitBootServices().
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    - Bits[7:3] Reserved.
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  **/
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  UINT8                           Flags;
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  UINT8                           Reserved[10];
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} EFI_ACPI_DMAR_HEADER;
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#pragma pack()
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#endif
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