9344f09215
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
77 lines
2.6 KiB
C
77 lines
2.6 KiB
C
/** @file
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ACPI Low Power Idle Table (LPIT) definitions
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Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Revision Reference:
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- ACPI Low Power Idle Table (LPIT) Revision 001, dated July 2014
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http://www.uefi.org/sites/default/files/resources/ACPI_Low_Power_Idle_Table.pdf
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@par Glossary:
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- GAS - Generic Address Structure
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- LPI - Low Power Idle
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**/
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#ifndef _LOW_POWER_IDLE_TABLE_H_
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#define _LOW_POWER_IDLE_TABLE_H_
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#include <IndustryStandard/Acpi.h>
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#pragma pack(1)
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///
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/// LPI Structure Types
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///
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#define ACPI_LPI_STRUCTURE_TYPE_NATIVE_CSTATE 0x00
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///
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/// Low Power Idle (LPI) State Flags
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///
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typedef union {
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struct {
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UINT32 Disabled : 1; ///< If set, LPI state is not used
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/**
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If set, Residency counter is not available for this LPI state and
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Residency Counter Frequency is invalid
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**/
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UINT32 CounterUnavailable : 1;
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UINT32 Reserved : 30; ///< Reserved for future use. Must be zero
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} Bits;
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UINT32 Data32;
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} ACPI_LPI_STATE_FLAGS;
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///
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/// Low Power Idle (LPI) structure with Native C-state instruction entry trigger descriptor
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///
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typedef struct {
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UINT32 Type; ///< LPI State descriptor Type 0
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UINT32 Length; ///< Length of LPI state Descriptor Structure
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///
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/// Unique LPI state identifier: zero based, monotonically increasing identifier
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///
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UINT16 UniqueId;
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UINT8 Reserved[2]; ///< Must be Zero
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ACPI_LPI_STATE_FLAGS Flags; ///< LPI state flags
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/**
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The LPI entry trigger, matching an existing _CST.Register object, represented as a
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Generic Address Structure. All processors must request this state or deeper to trigger.
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**/
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EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE EntryTrigger;
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UINT32 Residency; ///< Minimum residency or break-even in uSec
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UINT32 Latency; ///< Worst case exit latency in uSec
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/**
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[optional] Residency counter, represented as a Generic Address Structure.
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If not present, Flags[1] bit should be set.
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**/
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EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE ResidencyCounter;
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/**
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[optional] Residency counter frequency in cycles per second. Value 0 indicates that
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counter runs at TSC frequency. Valid only if Residency Counter is present.
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**/
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UINT64 ResidencyCounterFrequency;
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} ACPI_LPI_NATIVE_CSTATE_DESCRIPTOR;
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#pragma pack()
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#endif
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