86094561f6
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
57 lines
1.9 KiB
C
57 lines
1.9 KiB
C
/** @file
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Definition of GUIDed HOB for reserving MMRAM regions.
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This file defines:
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* the GUID used to identify the GUID HOB for reserving MMRAM regions.
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* the data structure of MMRAM descriptor to describe MMRAM candidate regions
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* values of state of MMRAM candidate regions
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* the GUID specific data structure of HOB for reserving MMRAM regions.
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This GUIDed HOB can be used to convey the existence of the T-SEG reservation and H-SEG usage
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Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Revision Reference:
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GUIDs defined in MmCis spec version 0.9.
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**/
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#ifndef _EFI_MM_PEI_MMRAM_MEMORY_RESERVE_H_
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#define _EFI_MM_PEI_MMRAM_MEMORY_RESERVE_H_
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#define EFI_MM_PEI_MMRAM_MEMORY_RESERVE \
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{ \
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0x0703f912, 0xbf8d, 0x4e2a, {0xbe, 0x07, 0xab, 0x27, 0x25, 0x25, 0xc5, 0x92 } \
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}
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/**
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* GUID specific data structure of HOB for reserving MMRAM regions.
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*
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* Inconsistent with specification here:
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* EFI_HOB_MMRAM_DESCRIPTOR_BLOCK has been changed to EFI_MMRAM_HOB_DESCRIPTOR_BLOCK.
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* This inconsistency is kept in code in order for backward compatibility.
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**/
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typedef struct {
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///
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/// Designates the number of possible regions in the system
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/// that can be usable for MMRAM.
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///
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/// Inconsistent with specification here:
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/// In Framework MM CIS 0.91 specification, it defines the field type as UINTN.
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/// However, HOBs are supposed to be CPU neutral, so UINT32 should be used instead.
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///
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UINT32 NumberOfMmReservedRegions;
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///
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/// Used throughout this protocol to describe the candidate
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/// regions for MMRAM that are supported by this platform.
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///
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EFI_MMRAM_DESCRIPTOR Descriptor[1];
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} EFI_MMRAM_HOB_DESCRIPTOR_BLOCK;
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extern EFI_GUID gEfiMmPeiSmramMemoryReserveGuid;
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#endif
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