0acd869796
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
220 lines
10 KiB
C
220 lines
10 KiB
C
/** @file
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Internal include file for the CPU I/O 2 Protocol.
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Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _CPU_IO2_DXE_H_
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#define _CPU_IO2_DXE_H_
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#include <PiDxe.h>
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#include <Protocol/CpuIo2.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#define MAX_IO_PORT_ADDRESS 0xFFFF
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/**
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Reads memory-mapped registers.
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The I/O operations are carried out exactly as requested. The caller is responsible
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for satisfying any alignment and I/O width restrictions that a PI System on a
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platform might require. For example on some platforms, width requests of
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EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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each of the Count operations that is performed.
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If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times on the same Address.
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If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times from the first element of Buffer.
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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@param[in] Address The base address of the I/O operation.
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@param[in] Count The number of I/O operations to perform. The number of
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bytes moved is Width size * Count, starting at Address.
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@param[out] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@retval EFI_SUCCESS The data was read from or written to the PI system.
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuMemoryServiceRead (
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IN EFI_CPU_IO2_PROTOCOL *This,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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OUT VOID *Buffer
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);
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/**
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Writes memory-mapped registers.
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The I/O operations are carried out exactly as requested. The caller is responsible
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for satisfying any alignment and I/O width restrictions that a PI System on a
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platform might require. For example on some platforms, width requests of
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EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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each of the Count operations that is performed.
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If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times on the same Address.
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If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times from the first element of Buffer.
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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@param[in] Address The base address of the I/O operation.
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@param[in] Count The number of I/O operations to perform. The number of
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bytes moved is Width size * Count, starting at Address.
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@param[in] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@retval EFI_SUCCESS The data was read from or written to the PI system.
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuMemoryServiceWrite (
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IN EFI_CPU_IO2_PROTOCOL *This,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN VOID *Buffer
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);
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/**
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Reads I/O registers.
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The I/O operations are carried out exactly as requested. The caller is responsible
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for satisfying any alignment and I/O width restrictions that a PI System on a
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platform might require. For example on some platforms, width requests of
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EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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each of the Count operations that is performed.
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If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times on the same Address.
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If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times from the first element of Buffer.
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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@param[in] Address The base address of the I/O operation.
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@param[in] Count The number of I/O operations to perform. The number of
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bytes moved is Width size * Count, starting at Address.
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@param[out] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@retval EFI_SUCCESS The data was read from or written to the PI system.
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuIoServiceRead (
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IN EFI_CPU_IO2_PROTOCOL *This,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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OUT VOID *Buffer
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);
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/**
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Write I/O registers.
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The I/O operations are carried out exactly as requested. The caller is responsible
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for satisfying any alignment and I/O width restrictions that a PI System on a
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platform might require. For example on some platforms, width requests of
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EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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each of the Count operations that is performed.
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If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times on the same Address.
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If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times from the first element of Buffer.
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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@param[in] Address The base address of the I/O operation.
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@param[in] Count The number of I/O operations to perform. The number of
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bytes moved is Width size * Count, starting at Address.
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@param[in] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@retval EFI_SUCCESS The data was read from or written to the PI system.
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuIoServiceWrite (
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IN EFI_CPU_IO2_PROTOCOL *This,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN VOID *Buffer
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);
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#endif
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