0acd869796
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
911 lines
27 KiB
C
911 lines
27 KiB
C
/** @file
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Produces the CPU I/O PPI.
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Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "CpuIoPei.h"
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//
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// Instance of CPU I/O PPI
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//
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EFI_PEI_CPU_IO_PPI gCpuIoPpi = {
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{
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CpuMemoryServiceRead,
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CpuMemoryServiceWrite
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},
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{
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CpuIoServiceRead,
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CpuIoServiceWrite
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},
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CpuIoRead8,
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CpuIoRead16,
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CpuIoRead32,
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CpuIoRead64,
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CpuIoWrite8,
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CpuIoWrite16,
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CpuIoWrite32,
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CpuIoWrite64,
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CpuMemRead8,
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CpuMemRead16,
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CpuMemRead32,
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CpuMemRead64,
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CpuMemWrite8,
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CpuMemWrite16,
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CpuMemWrite32,
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CpuMemWrite64
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};
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//
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// PPI Descriptor used to install the CPU I/O PPI
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//
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EFI_PEI_PPI_DESCRIPTOR gPpiList = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiPeiCpuIoPpiInstalledGuid,
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NULL
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};
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//
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// Lookup table for increment values based on transfer widths
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//
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UINT8 mInStride[] = {
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1, // EfiPeiCpuIoWidthUint8
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2, // EfiPeiCpuIoWidthUint16
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4, // EfiPeiCpuIoWidthUint32
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8, // EfiPeiCpuIoWidthUint64
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0, // EfiPeiCpuIoWidthFifoUint8
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0, // EfiPeiCpuIoWidthFifoUint16
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0, // EfiPeiCpuIoWidthFifoUint32
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0, // EfiPeiCpuIoWidthFifoUint64
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1, // EfiPeiCpuIoWidthFillUint8
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2, // EfiPeiCpuIoWidthFillUint16
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4, // EfiPeiCpuIoWidthFillUint32
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8 // EfiPeiCpuIoWidthFillUint64
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};
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//
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// Lookup table for increment values based on transfer widths
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//
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UINT8 mOutStride[] = {
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1, // EfiPeiCpuIoWidthUint8
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2, // EfiPeiCpuIoWidthUint16
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4, // EfiPeiCpuIoWidthUint32
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8, // EfiPeiCpuIoWidthUint64
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1, // EfiPeiCpuIoWidthFifoUint8
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2, // EfiPeiCpuIoWidthFifoUint16
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4, // EfiPeiCpuIoWidthFifoUint32
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8, // EfiPeiCpuIoWidthFifoUint64
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0, // EfiPeiCpuIoWidthFillUint8
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0, // EfiPeiCpuIoWidthFillUint16
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0, // EfiPeiCpuIoWidthFillUint32
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0 // EfiPeiCpuIoWidthFillUint64
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};
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/**
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Check parameters to a CPU I/O PPI service request.
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@param[in] MmioOperation TRUE for an MMIO operation, FALSE for I/O Port operation.
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@param[in] Width The width of the access. Enumerated in bytes.
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@param[in] Address The physical address of the access.
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@param[in] Count The number of accesses to perform.
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@param[in] Buffer A pointer to the buffer of data.
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@retval EFI_SUCCESS The parameters for this request pass the checks.
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@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this EFI system.
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**/
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EFI_STATUS
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CpuIoCheckParameter (
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IN BOOLEAN MmioOperation,
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IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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UINT64 MaxCount;
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UINT64 Limit;
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//
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// Check to see if Buffer is NULL
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//
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if (Buffer == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// Check to see if Width is in the valid range
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//
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if ((UINT32)Width >= EfiPeiCpuIoWidthMaximum) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// For FIFO type, the target address won't increase during the access,
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// so treat Count as 1
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//
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if (Width >= EfiPeiCpuIoWidthFifoUint8 && Width <= EfiPeiCpuIoWidthFifoUint64) {
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Count = 1;
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}
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//
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// Check to see if Width is in the valid range for I/O Port operations
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//
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Width = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
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if (!MmioOperation && (Width == EfiPeiCpuIoWidthUint64)) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// Check to see if any address associated with this transfer exceeds the maximum
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// allowed address. The maximum address implied by the parameters passed in is
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// Address + Size * Count. If the following condition is met, then the transfer
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// is not supported.
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//
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// Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1
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//
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// Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
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// can also be the maximum integer value supported by the CPU, this range
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// check must be adjusted to avoid all overflow conditions.
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//
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// The following form of the range check is equivalent but assumes that
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// MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
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//
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Limit = (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS);
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if (Count == 0) {
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if (Address > Limit) {
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return EFI_UNSUPPORTED;
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}
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} else {
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MaxCount = RShiftU64 (Limit, Width);
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if (MaxCount < (Count - 1)) {
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return EFI_UNSUPPORTED;
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}
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if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
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return EFI_UNSUPPORTED;
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Reads memory-mapped registers.
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@param[in] PeiServices An indirect pointer to the PEI Services Table
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published by the PEI Foundation.
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@param[in] This Pointer to local data for the interface.
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@param[in] Width The width of the access. Enumerated in bytes.
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@param[in] Address The physical address of the access.
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@param[in] Count The number of accesses to perform.
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@param[out] Buffer A pointer to the buffer of data.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this EFI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuMemoryServiceRead (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_CPU_IO_PPI *This,
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IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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OUT VOID *Buffer
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)
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{
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EFI_STATUS Status;
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UINT8 InStride;
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UINT8 OutStride;
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EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
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BOOLEAN Aligned;
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UINT8 *Uint8Buffer;
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Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Select loop based on the width of the transfer
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//
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InStride = mInStride[Width];
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OutStride = mOutStride[Width];
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OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
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Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
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for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
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if (OperationWidth == EfiPeiCpuIoWidthUint8) {
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*Uint8Buffer = MmioRead8 ((UINTN)Address);
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} else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
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if (Aligned) {
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*((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
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} else {
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WriteUnaligned16 ((UINT16 *)Uint8Buffer, MmioRead16 ((UINTN)Address));
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}
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} else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
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if (Aligned) {
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*((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
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} else {
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WriteUnaligned32 ((UINT32 *)Uint8Buffer, MmioRead32 ((UINTN)Address));
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}
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} else if (OperationWidth == EfiPeiCpuIoWidthUint64) {
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if (Aligned) {
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*((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
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} else {
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WriteUnaligned64 ((UINT64 *)Uint8Buffer, MmioRead64 ((UINTN)Address));
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}
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Writes memory-mapped registers.
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@param[in] PeiServices An indirect pointer to the PEI Services Table
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published by the PEI Foundation.
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@param[in] This Pointer to local data for the interface.
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@param[in] Width The width of the access. Enumerated in bytes.
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@param[in] Address The physical address of the access.
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@param[in] Count The number of accesses to perform.
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@param[in] Buffer A pointer to the buffer of data.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this EFI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuMemoryServiceWrite (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_CPU_IO_PPI *This,
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IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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EFI_STATUS Status;
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UINT8 InStride;
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UINT8 OutStride;
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EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
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BOOLEAN Aligned;
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UINT8 *Uint8Buffer;
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Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Select loop based on the width of the transfer
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//
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InStride = mInStride[Width];
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OutStride = mOutStride[Width];
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OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
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Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
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for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
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if (OperationWidth == EfiPeiCpuIoWidthUint8) {
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MmioWrite8 ((UINTN)Address, *Uint8Buffer);
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} else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
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if (Aligned) {
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MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
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} else {
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MmioWrite16 ((UINTN)Address, ReadUnaligned16 ((UINT16 *)Uint8Buffer));
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}
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} else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
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if (Aligned) {
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MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
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} else {
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MmioWrite32 ((UINTN)Address, ReadUnaligned32 ((UINT32 *)Uint8Buffer));
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}
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} else if (OperationWidth == EfiPeiCpuIoWidthUint64) {
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if (Aligned) {
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MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
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} else {
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MmioWrite64 ((UINTN)Address, ReadUnaligned64 ((UINT64 *)Uint8Buffer));
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}
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Reads I/O registers.
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@param[in] PeiServices An indirect pointer to the PEI Services Table
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published by the PEI Foundation.
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@param[in] This Pointer to local data for the interface.
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@param[in] Width The width of the access. Enumerated in bytes.
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@param[in] Address The physical address of the access.
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@param[in] Count The number of accesses to perform.
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@param[out] Buffer A pointer to the buffer of data.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this EFI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuIoServiceRead (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_CPU_IO_PPI *This,
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IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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OUT VOID *Buffer
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)
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{
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EFI_STATUS Status;
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UINT8 InStride;
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UINT8 OutStride;
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EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
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BOOLEAN Aligned;
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UINT8 *Uint8Buffer;
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Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Select loop based on the width of the transfer
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//
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InStride = mInStride[Width];
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OutStride = mOutStride[Width];
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OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
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//
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// Fifo operations supported for (mInStride[Width] == 0)
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//
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if (InStride == 0) {
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switch (OperationWidth) {
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case EfiPeiCpuIoWidthUint8:
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IoReadFifo8 ((UINTN)Address, Count, Buffer);
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return EFI_SUCCESS;
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case EfiPeiCpuIoWidthUint16:
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IoReadFifo16 ((UINTN)Address, Count, Buffer);
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return EFI_SUCCESS;
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case EfiPeiCpuIoWidthUint32:
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IoReadFifo32 ((UINTN)Address, Count, Buffer);
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return EFI_SUCCESS;
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default:
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//
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// The CpuIoCheckParameter call above will ensure that this
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// path is not taken.
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//
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ASSERT (FALSE);
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break;
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}
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}
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Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
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for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
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if (OperationWidth == EfiPeiCpuIoWidthUint8) {
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*Uint8Buffer = IoRead8 ((UINTN)Address);
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} else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
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if (Aligned) {
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*((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
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} else {
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WriteUnaligned16 ((UINT16 *)Uint8Buffer, IoRead16 ((UINTN)Address));
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}
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} else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
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if (Aligned) {
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*((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
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} else {
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WriteUnaligned32 ((UINT32 *)Uint8Buffer, IoRead32 ((UINTN)Address));
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}
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Write I/O registers.
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@param[in] PeiServices An indirect pointer to the PEI Services Table
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published by the PEI Foundation.
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@param[in] This Pointer to local data for the interface.
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@param[in] Width The width of the access. Enumerated in bytes.
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@param[in] Address The physical address of the access.
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@param[in] Count The number of accesses to perform.
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@param[in] Buffer A pointer to the buffer of data.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this EFI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuIoServiceWrite (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_CPU_IO_PPI *This,
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IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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EFI_STATUS Status;
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UINT8 InStride;
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UINT8 OutStride;
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EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
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BOOLEAN Aligned;
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UINT8 *Uint8Buffer;
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//
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// Make sure the parameters are valid
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//
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Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Select loop based on the width of the transfer
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//
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InStride = mInStride[Width];
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OutStride = mOutStride[Width];
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OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
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//
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// Fifo operations supported for (mInStride[Width] == 0)
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//
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if (InStride == 0) {
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switch (OperationWidth) {
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case EfiPeiCpuIoWidthUint8:
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IoWriteFifo8 ((UINTN)Address, Count, Buffer);
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return EFI_SUCCESS;
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case EfiPeiCpuIoWidthUint16:
|
|
IoWriteFifo16 ((UINTN)Address, Count, Buffer);
|
|
return EFI_SUCCESS;
|
|
case EfiPeiCpuIoWidthUint32:
|
|
IoWriteFifo32 ((UINTN)Address, Count, Buffer);
|
|
return EFI_SUCCESS;
|
|
default:
|
|
//
|
|
// The CpuIoCheckParameter call above will ensure that this
|
|
// path is not taken.
|
|
//
|
|
ASSERT (FALSE);
|
|
break;
|
|
}
|
|
}
|
|
|
|
Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
|
|
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
|
|
if (OperationWidth == EfiPeiCpuIoWidthUint8) {
|
|
IoWrite8 ((UINTN)Address, *Uint8Buffer);
|
|
} else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
|
|
if (Aligned) {
|
|
IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
|
|
} else {
|
|
IoWrite16 ((UINTN)Address, ReadUnaligned16 ((UINT16 *)Uint8Buffer));
|
|
}
|
|
} else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
|
|
if (Aligned) {
|
|
IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
|
|
} else {
|
|
IoWrite32 ((UINTN)Address, ReadUnaligned32 ((UINT32 *)Uint8Buffer));
|
|
}
|
|
}
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
8-bit I/O read operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
|
|
@return An 8-bit value returned from the I/O space.
|
|
**/
|
|
UINT8
|
|
EFIAPI
|
|
CpuIoRead8 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address
|
|
)
|
|
{
|
|
return IoRead8 ((UINTN)Address);
|
|
}
|
|
|
|
/**
|
|
16-bit I/O read operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
|
|
@return A 16-bit value returned from the I/O space.
|
|
|
|
**/
|
|
UINT16
|
|
EFIAPI
|
|
CpuIoRead16 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address
|
|
)
|
|
{
|
|
return IoRead16 ((UINTN)Address);
|
|
}
|
|
|
|
/**
|
|
32-bit I/O read operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
|
|
@return A 32-bit value returned from the I/O space.
|
|
|
|
**/
|
|
UINT32
|
|
EFIAPI
|
|
CpuIoRead32 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address
|
|
)
|
|
{
|
|
return IoRead32 ((UINTN)Address);
|
|
}
|
|
|
|
/**
|
|
64-bit I/O read operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
|
|
@return A 64-bit value returned from the I/O space.
|
|
|
|
**/
|
|
UINT64
|
|
EFIAPI
|
|
CpuIoRead64 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address
|
|
)
|
|
{
|
|
return IoRead64 ((UINTN)Address);
|
|
}
|
|
|
|
/**
|
|
8-bit I/O write operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
@param[in] Data The data to write.
|
|
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
CpuIoWrite8 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address,
|
|
IN UINT8 Data
|
|
)
|
|
{
|
|
IoWrite8 ((UINTN)Address, Data);
|
|
}
|
|
|
|
/**
|
|
16-bit I/O write operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
@param[in] Data The data to write.
|
|
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
CpuIoWrite16 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address,
|
|
IN UINT16 Data
|
|
)
|
|
{
|
|
IoWrite16 ((UINTN)Address, Data);
|
|
}
|
|
|
|
/**
|
|
32-bit I/O write operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
@param[in] Data The data to write.
|
|
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
CpuIoWrite32 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address,
|
|
IN UINT32 Data
|
|
)
|
|
{
|
|
IoWrite32 ((UINTN)Address, Data);
|
|
}
|
|
|
|
/**
|
|
64-bit I/O write operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
@param[in] Data The data to write.
|
|
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
CpuIoWrite64 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address,
|
|
IN UINT64 Data
|
|
)
|
|
{
|
|
IoWrite64 ((UINTN)Address, Data);
|
|
}
|
|
|
|
/**
|
|
8-bit memory read operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
|
|
@return An 8-bit value returned from the memory space.
|
|
|
|
**/
|
|
UINT8
|
|
EFIAPI
|
|
CpuMemRead8 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address
|
|
)
|
|
{
|
|
return MmioRead8 ((UINTN)Address);
|
|
}
|
|
|
|
/**
|
|
16-bit memory read operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
|
|
@return A 16-bit value returned from the memory space.
|
|
|
|
**/
|
|
UINT16
|
|
EFIAPI
|
|
CpuMemRead16 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address
|
|
)
|
|
{
|
|
return MmioRead16 ((UINTN)Address);
|
|
}
|
|
|
|
/**
|
|
32-bit memory read operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
|
|
@return A 32-bit value returned from the memory space.
|
|
|
|
**/
|
|
UINT32
|
|
EFIAPI
|
|
CpuMemRead32 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address
|
|
)
|
|
{
|
|
return MmioRead32 ((UINTN)Address);
|
|
}
|
|
|
|
/**
|
|
64-bit memory read operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
|
|
@return A 64-bit value returned from the memory space.
|
|
|
|
**/
|
|
UINT64
|
|
EFIAPI
|
|
CpuMemRead64 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address
|
|
)
|
|
{
|
|
return MmioRead64 ((UINTN)Address);
|
|
}
|
|
|
|
/**
|
|
8-bit memory write operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
@param[in] Data The data to write.
|
|
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
CpuMemWrite8 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address,
|
|
IN UINT8 Data
|
|
)
|
|
{
|
|
MmioWrite8 ((UINTN)Address, Data);
|
|
}
|
|
|
|
/**
|
|
16-bit memory write operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
@param[in] Data The data to write.
|
|
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
CpuMemWrite16 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address,
|
|
IN UINT16 Data
|
|
)
|
|
{
|
|
MmioWrite16 ((UINTN)Address, Data);
|
|
}
|
|
|
|
/**
|
|
32-bit memory write operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
@param[in] Data The data to write.
|
|
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
CpuMemWrite32 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address,
|
|
IN UINT32 Data
|
|
)
|
|
{
|
|
MmioWrite32 ((UINTN)Address, Data);
|
|
}
|
|
|
|
/**
|
|
64-bit memory write operations.
|
|
|
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
|
by the PEI Foundation.
|
|
@param[in] This Pointer to local data for the interface.
|
|
@param[in] Address The physical address of the access.
|
|
@param[in] Data The data to write.
|
|
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
CpuMemWrite64 (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
IN UINT64 Address,
|
|
IN UINT64 Data
|
|
)
|
|
{
|
|
MmioWrite64 ((UINTN)Address, Data);
|
|
}
|
|
|
|
/**
|
|
The Entry point of the CPU I/O PEIM
|
|
|
|
This function is the Entry point of the CPU I/O PEIM which installs CpuIoPpi.
|
|
|
|
@param[in] FileHandle Pointer to image file handle.
|
|
@param[in] PeiServices Pointer to PEI Services Table
|
|
|
|
@retval EFI_SUCCESS CPU I/O PPI successfully installed
|
|
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
CpuIoInitialize (
|
|
IN EFI_PEI_FILE_HANDLE FileHandle,
|
|
IN CONST EFI_PEI_SERVICES **PeiServices
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
|
|
//
|
|
// Register so it will be automatically shadowed to memory
|
|
//
|
|
Status = PeiServicesRegisterForShadow (FileHandle);
|
|
|
|
//
|
|
// Make CpuIo pointer in PeiService table point to gCpuIoPpi
|
|
//
|
|
(*((EFI_PEI_SERVICES **)PeiServices))->CpuIo = &gCpuIoPpi;
|
|
|
|
if (Status == EFI_ALREADY_STARTED) {
|
|
//
|
|
// Shadow completed and running from memory
|
|
//
|
|
DEBUG ((EFI_D_INFO, "CpuIO PPI has been loaded into memory. Reinstalled PPI=0x%x\n", &gCpuIoPpi));
|
|
} else {
|
|
Status = PeiServicesInstallPpi (&gPpiList);
|
|
ASSERT_EFI_ERROR (Status);
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|