CorebootModulePkg and CorebootPayloadPkg originally supports coreboot only. In order to support other bootloaders, such as Slim Bootloader, they need be updated to be more generic. UEFI Payload (UefiPayloadPkg) a converged package from CorebootModulePkg and CorebootPayloadPkg with following updates: a. Support both coreboot and Slim Bootloader b. Removed SataControllerDxe and BaseSerialPortLib16550 to use EDK2 modules c. Support passing bootloader parameter to UEFI payload, e.g. coreboot table from coreboot or HOB list from Slim Bootloader d. Using GraphicsOutputDxe from EDK2 with minor change instead of FbGop e. Remove the dependency to IntelFrameworkPkg and IntelFrameworkModulePkg and QuarkSocPkg f. Use BaseDebugLibSerialPort library as DebugLib g. Use HPET timer, drop legacy 8254 timer support h. Use BaseXApicX2ApicLib instead of BaseXApicLib i. Remove HOB gUefiFrameBufferInfoGuid to use EDK2 graphics HOBs. j. Other clean ups On how UefiPayloadPkg could work with coreboot/Slim Bootloader, please refer UefiPayloadPkg/BuildAndIntegrationInstructions.txt Once UefiPayloadPkg is checked-in, CorebootModulePkg and CorebootPayloadPkg could be retired. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
32 lines
658 B
C
32 lines
658 B
C
/** @file
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This file defines the hob structure for serial port.
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Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __SERIAL_PORT_INFO_GUID_H__
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#define __SERIAL_PORT_INFO_GUID_H__
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///
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/// Serial Port Information GUID
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///
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extern EFI_GUID gUefiSerialPortInfoGuid;
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#define PLD_SERIAL_TYPE_IO_MAPPED 1
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#define PLD_SERIAL_TYPE_MEMORY_MAPPED 2
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typedef struct {
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UINT8 Revision;
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UINT8 Reserved0[3];
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UINT32 Type;
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UINT32 BaseAddr;
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UINT32 Baud;
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UINT32 RegWidth;
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UINT32 InputHertz;
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UINT32 UartPciAddr;
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} SERIAL_PORT_INFO;
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#endif
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