7c4ab1c2ef
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3100 It is not necessary to have a PEI phase in the UEFI payload since no specific PEI task is required. This patch adds a UefiPayloadEntry driver to get UEFI Payload required information from the bootloaders, convert them into a HOB list, load DXE core and transfer control to it. Here is the change details: 1) Removed PEI phase, including Peicore, BlSupportPei, SecCore, etc. 2) Added UefiPayloadEntry driver. this is the only driver before DXE core. 3) Added Pure X64 support, dropped Pure IA32 (Could add later if required) 64bit payload with 32bit entry point is still supported. 4) Use one DSC file UefiPayloadPkg.dsc to support X64 and IA32X64 build. Removed UefiPayloadIa32.dsc and UefiPayloadIa32X64.dsc Tested with SBL and coreboot on QEMU. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
108 lines
3.1 KiB
C
108 lines
3.1 KiB
C
/** @file
|
|
x64-specifc functionality for DxeLoad.
|
|
|
|
Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.<BR>
|
|
SPDX-License-Identifier: BSD-2-Clause-Patent
|
|
|
|
**/
|
|
|
|
#include <PiPei.h>
|
|
#include <Library/BaseLib.h>
|
|
#include <Library/DebugLib.h>
|
|
#include <Library/BaseMemoryLib.h>
|
|
#include <Library/MemoryAllocationLib.h>
|
|
#include <Library/PcdLib.h>
|
|
#include <Library/HobLib.h>
|
|
#include "X64/VirtualMemory.h"
|
|
#include "UefiPayloadEntry.h"
|
|
#define STACK_SIZE 0x20000
|
|
|
|
|
|
/**
|
|
Transfers control to DxeCore.
|
|
|
|
This function performs a CPU architecture specific operations to execute
|
|
the entry point of DxeCore with the parameters of HobList.
|
|
It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
|
|
|
|
@param DxeCoreEntryPoint The entry point of DxeCore.
|
|
@param HobList The start of HobList passed to DxeCore.
|
|
|
|
**/
|
|
VOID
|
|
HandOffToDxeCore (
|
|
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
|
|
IN EFI_PEI_HOB_POINTERS HobList
|
|
)
|
|
{
|
|
VOID *BaseOfStack;
|
|
VOID *TopOfStack;
|
|
UINTN PageTables;
|
|
VOID *GhcbBase;
|
|
UINTN GhcbSize;
|
|
|
|
//
|
|
// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
|
|
//
|
|
if (IsNullDetectionEnabled ()) {
|
|
ClearFirst4KPage (HobList.Raw);
|
|
BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);
|
|
}
|
|
|
|
|
|
//
|
|
// Allocate 128KB for the Stack
|
|
//
|
|
BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
|
|
ASSERT (BaseOfStack != NULL);
|
|
|
|
//
|
|
// Compute the top of the stack we were allocated. Pre-allocate a UINTN
|
|
// for safety.
|
|
//
|
|
TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
|
|
TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
|
|
|
|
//
|
|
// Get the address and size of the GHCB pages
|
|
//
|
|
GhcbBase = (VOID *) PcdGet64 (PcdGhcbBase);
|
|
GhcbSize = PcdGet64 (PcdGhcbSize);
|
|
|
|
PageTables = 0;
|
|
if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
|
|
//
|
|
// Create page table and save PageMapLevel4 to CR3
|
|
//
|
|
PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE,
|
|
(EFI_PHYSICAL_ADDRESS) (UINTN) GhcbBase, GhcbSize);
|
|
} else {
|
|
//
|
|
// Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
|
|
// for the DxeIpl and the DxeCore are both X64.
|
|
//
|
|
ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE);
|
|
ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);
|
|
}
|
|
|
|
|
|
if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
|
|
AsmWriteCr3 (PageTables);
|
|
}
|
|
|
|
//
|
|
// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
|
|
//
|
|
UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);
|
|
|
|
//
|
|
// Transfer the control to the entry point of DxeCore.
|
|
//
|
|
SwitchStack (
|
|
(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
|
|
HobList.Raw,
|
|
NULL,
|
|
TopOfStack
|
|
);
|
|
}
|