2ce4bfb843
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Implement LoongArch DxeIPL instance. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Guomin Jiang <guomin.jiang@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
/** @file
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LoongArch specifc functionality for DxeLoad.
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Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "DxeIpl.h"
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/**
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Transfers control to DxeCore.
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This function performs a CPU architecture specific operations to execute
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the entry point of DxeCore with the parameters of HobList.
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It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
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@param[in] DxeCoreEntryPoint The entry point of DxeCore.
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@param[in] HobList The start of HobList passed to DxeCore.
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**/
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VOID
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HandOffToDxeCore (
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IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
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IN EFI_PEI_HOB_POINTERS HobList
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)
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{
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VOID *BaseOfStack;
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VOID *TopOfStack;
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EFI_STATUS Status;
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//
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// Allocate 128KB for the Stack
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//
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BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
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ASSERT (BaseOfStack != NULL);
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//
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// Compute the top of the stack we were allocated. Pre-allocate a UINTN
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// for safety.
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//
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TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
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TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
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//
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// End of PEI phase signal
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//
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Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);
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ASSERT_EFI_ERROR (Status);
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//
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// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
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//
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UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);
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SwitchStack (
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(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
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HobList.Raw,
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NULL,
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TopOfStack
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);
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}
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