REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1237 Sometimes the memory will be contaminated by random data left in last boot (warm reset). The code should not assume the allocated memory is always filled with zero. This patch add code to clear data structure used for stack switch to prevent such problem from happening. Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
433 lines
15 KiB
C
433 lines
15 KiB
C
/** @file
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x64 CPU Exception Handler.
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Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CpuExceptionCommon.h"
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/**
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Return address map of exception handler template so that C code can generate
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exception tables.
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@param IdtEntry Pointer to IDT entry to be updated.
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@param InterruptHandler IDT handler value.
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**/
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VOID
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ArchUpdateIdtEntry (
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IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry,
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IN UINTN InterruptHandler
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)
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{
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IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
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IdtEntry->Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
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IdtEntry->Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
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IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
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}
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/**
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Read IDT handler value from IDT entry.
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@param IdtEntry Pointer to IDT entry to be read.
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**/
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UINTN
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ArchGetIdtHandler (
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IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry
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)
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{
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return IdtEntry->Bits.OffsetLow + (((UINTN) IdtEntry->Bits.OffsetHigh) << 16) +
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(((UINTN) IdtEntry->Bits.OffsetUpper) << 32);
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}
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/**
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Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
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@param[in] ExceptionType Exception type.
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@param[in] SystemContext Pointer to EFI_SYSTEM_CONTEXT.
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@param[in] ExceptionHandlerData Pointer to exception handler data.
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**/
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VOID
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ArchSaveExceptionContext (
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IN UINTN ExceptionType,
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IN EFI_SYSTEM_CONTEXT SystemContext,
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IN EXCEPTION_HANDLER_DATA *ExceptionHandlerData
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)
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{
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IA32_EFLAGS32 Eflags;
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RESERVED_VECTORS_DATA *ReservedVectors;
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ReservedVectors = ExceptionHandlerData->ReservedVectors;
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//
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// Save Exception context in global variable in first entry of the exception handler.
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// So when original exception handler returns to the new exception handler (second entry),
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// the Eflags/Cs/Eip/ExceptionData can be used.
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//
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ReservedVectors[ExceptionType].OldSs = SystemContext.SystemContextX64->Ss;
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ReservedVectors[ExceptionType].OldSp = SystemContext.SystemContextX64->Rsp;
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ReservedVectors[ExceptionType].OldFlags = SystemContext.SystemContextX64->Rflags;
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ReservedVectors[ExceptionType].OldCs = SystemContext.SystemContextX64->Cs;
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ReservedVectors[ExceptionType].OldIp = SystemContext.SystemContextX64->Rip;
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ReservedVectors[ExceptionType].ExceptionData = SystemContext.SystemContextX64->ExceptionData;
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//
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// Clear IF flag to avoid old IDT handler enable interrupt by IRET
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//
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Eflags.UintN = SystemContext.SystemContextX64->Rflags;
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Eflags.Bits.IF = 0;
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SystemContext.SystemContextX64->Rflags = Eflags.UintN;
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//
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// Modify the EIP in stack, then old IDT handler will return to HookAfterStubBegin.
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//
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SystemContext.SystemContextX64->Rip = (UINTN) ReservedVectors[ExceptionType].HookAfterStubHeaderCode;
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}
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/**
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Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
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@param[in] ExceptionType Exception type.
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@param[in] SystemContext Pointer to EFI_SYSTEM_CONTEXT.
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@param[in] ExceptionHandlerData Pointer to exception handler data.
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**/
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VOID
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ArchRestoreExceptionContext (
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IN UINTN ExceptionType,
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IN EFI_SYSTEM_CONTEXT SystemContext,
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IN EXCEPTION_HANDLER_DATA *ExceptionHandlerData
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)
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{
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RESERVED_VECTORS_DATA *ReservedVectors;
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ReservedVectors = ExceptionHandlerData->ReservedVectors;
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SystemContext.SystemContextX64->Ss = ReservedVectors[ExceptionType].OldSs;
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SystemContext.SystemContextX64->Rsp = ReservedVectors[ExceptionType].OldSp;
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SystemContext.SystemContextX64->Rflags = ReservedVectors[ExceptionType].OldFlags;
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SystemContext.SystemContextX64->Cs = ReservedVectors[ExceptionType].OldCs;
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SystemContext.SystemContextX64->Rip = ReservedVectors[ExceptionType].OldIp;
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SystemContext.SystemContextX64->ExceptionData = ReservedVectors[ExceptionType].ExceptionData;
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}
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/**
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Setup separate stack for given exceptions.
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@param[in] StackSwitchData Pointer to data required for setuping up
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stack switch.
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@retval EFI_SUCCESS The exceptions have been successfully
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initialized with new stack.
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@retval EFI_INVALID_PARAMETER StackSwitchData contains invalid content.
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**/
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EFI_STATUS
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ArchSetupExcpetionStack (
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IN CPU_EXCEPTION_INIT_DATA *StackSwitchData
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)
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{
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IA32_DESCRIPTOR Gdtr;
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IA32_DESCRIPTOR Idtr;
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IA32_IDT_GATE_DESCRIPTOR *IdtTable;
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IA32_TSS_DESCRIPTOR *TssDesc;
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IA32_TASK_STATE_SEGMENT *Tss;
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UINTN StackTop;
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UINTN Index;
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UINTN Vector;
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UINTN TssBase;
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UINTN GdtSize;
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if (StackSwitchData == NULL ||
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StackSwitchData->Ia32.Revision != CPU_EXCEPTION_INIT_DATA_REV ||
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StackSwitchData->X64.KnownGoodStackTop == 0 ||
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StackSwitchData->X64.KnownGoodStackSize == 0 ||
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StackSwitchData->X64.StackSwitchExceptions == NULL ||
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StackSwitchData->X64.StackSwitchExceptionNumber == 0 ||
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StackSwitchData->X64.StackSwitchExceptionNumber > CPU_EXCEPTION_NUM ||
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StackSwitchData->X64.GdtTable == NULL ||
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StackSwitchData->X64.IdtTable == NULL ||
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StackSwitchData->X64.ExceptionTssDesc == NULL ||
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StackSwitchData->X64.ExceptionTss == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// The caller is responsible for that the GDT table, no matter the existing
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// one or newly allocated, has enough space to hold descriptors for exception
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// task-state segments.
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//
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if (((UINTN)StackSwitchData->X64.GdtTable & (IA32_GDT_ALIGNMENT - 1)) != 0) {
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return EFI_INVALID_PARAMETER;
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}
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if ((UINTN)StackSwitchData->X64.ExceptionTssDesc < (UINTN)(StackSwitchData->X64.GdtTable)) {
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return EFI_INVALID_PARAMETER;
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}
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if (((UINTN)StackSwitchData->X64.ExceptionTssDesc + StackSwitchData->X64.ExceptionTssDescSize) >
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((UINTN)(StackSwitchData->X64.GdtTable) + StackSwitchData->X64.GdtTableSize)) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// One task gate descriptor and one task-state segment are needed.
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//
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if (StackSwitchData->X64.ExceptionTssDescSize < sizeof (IA32_TSS_DESCRIPTOR)) {
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return EFI_INVALID_PARAMETER;
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}
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if (StackSwitchData->X64.ExceptionTssSize < sizeof (IA32_TASK_STATE_SEGMENT)) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// Interrupt stack table supports only 7 vectors.
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//
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TssDesc = StackSwitchData->X64.ExceptionTssDesc;
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Tss = StackSwitchData->X64.ExceptionTss;
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if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->IST)) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// Initialize new GDT table and/or IDT table, if any
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//
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AsmReadIdtr (&Idtr);
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AsmReadGdtr (&Gdtr);
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GdtSize = (UINTN)TssDesc + sizeof (IA32_TSS_DESCRIPTOR) -
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(UINTN)(StackSwitchData->X64.GdtTable);
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if ((UINTN)StackSwitchData->X64.GdtTable != Gdtr.Base) {
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CopyMem (StackSwitchData->X64.GdtTable, (VOID *)Gdtr.Base, Gdtr.Limit + 1);
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Gdtr.Base = (UINTN)StackSwitchData->X64.GdtTable;
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Gdtr.Limit = (UINT16)GdtSize - 1;
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}
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if ((UINTN)StackSwitchData->X64.IdtTable != Idtr.Base) {
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Idtr.Base = (UINTN)StackSwitchData->X64.IdtTable;
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}
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if (StackSwitchData->X64.IdtTableSize > 0) {
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Idtr.Limit = (UINT16)(StackSwitchData->X64.IdtTableSize - 1);
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}
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//
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// Fixup current task descriptor. Task-state segment for current task will
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// be filled by processor during task switching.
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//
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TssBase = (UINTN)Tss;
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TssDesc->Uint128.Uint64 = 0;
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TssDesc->Uint128.Uint64_1= 0;
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TssDesc->Bits.LimitLow = sizeof(IA32_TASK_STATE_SEGMENT) - 1;
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TssDesc->Bits.BaseLow = (UINT16)TssBase;
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TssDesc->Bits.BaseMidl = (UINT8)(TssBase >> 16);
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TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
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TssDesc->Bits.P = 1;
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TssDesc->Bits.LimitHigh = 0;
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TssDesc->Bits.BaseMidh = (UINT8)(TssBase >> 24);
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TssDesc->Bits.BaseHigh = (UINT32)(TssBase >> 32);
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//
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// Fixup exception task descriptor and task-state segment
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//
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ZeroMem (Tss, sizeof (*Tss));
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StackTop = StackSwitchData->X64.KnownGoodStackTop - CPU_STACK_ALIGNMENT;
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StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);
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IdtTable = StackSwitchData->X64.IdtTable;
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for (Index = 0; Index < StackSwitchData->X64.StackSwitchExceptionNumber; ++Index) {
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//
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// Fixup IST
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//
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Tss->IST[Index] = StackTop;
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StackTop -= StackSwitchData->X64.KnownGoodStackSize;
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//
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// Set the IST field to enable corresponding IST
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//
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Vector = StackSwitchData->X64.StackSwitchExceptions[Index];
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if (Vector >= CPU_EXCEPTION_NUM ||
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Vector >= (Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR)) {
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continue;
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}
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IdtTable[Vector].Bits.Reserved_0 = (UINT8)(Index + 1);
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}
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//
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// Publish GDT
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//
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AsmWriteGdtr (&Gdtr);
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//
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// Load current task
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//
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AsmWriteTr ((UINT16)((UINTN)StackSwitchData->X64.ExceptionTssDesc - Gdtr.Base));
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//
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// Publish IDT
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//
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AsmWriteIdtr (&Idtr);
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return EFI_SUCCESS;
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}
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/**
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Display CPU information.
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@param ExceptionType Exception type.
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@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
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**/
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VOID
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EFIAPI
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DumpCpuContext (
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IN EFI_EXCEPTION_TYPE ExceptionType,
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IN EFI_SYSTEM_CONTEXT SystemContext
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)
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{
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InternalPrintMessage (
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"!!!! X64 Exception Type - %02x(%a) CPU Apic ID - %08x !!!!\n",
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ExceptionType,
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GetExceptionNameStr (ExceptionType),
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GetApicId ()
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);
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if ((mErrorCodeFlag & (1 << ExceptionType)) != 0) {
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InternalPrintMessage (
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"ExceptionData - %016lx",
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SystemContext.SystemContextX64->ExceptionData
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);
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if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {
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InternalPrintMessage (
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" I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_PK) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SGX) != 0
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);
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}
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InternalPrintMessage ("\n");
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}
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InternalPrintMessage (
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"RIP - %016lx, CS - %016lx, RFLAGS - %016lx\n",
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SystemContext.SystemContextX64->Rip,
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SystemContext.SystemContextX64->Cs,
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SystemContext.SystemContextX64->Rflags
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);
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InternalPrintMessage (
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"RAX - %016lx, RCX - %016lx, RDX - %016lx\n",
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SystemContext.SystemContextX64->Rax,
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SystemContext.SystemContextX64->Rcx,
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SystemContext.SystemContextX64->Rdx
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);
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InternalPrintMessage (
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"RBX - %016lx, RSP - %016lx, RBP - %016lx\n",
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SystemContext.SystemContextX64->Rbx,
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SystemContext.SystemContextX64->Rsp,
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SystemContext.SystemContextX64->Rbp
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);
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InternalPrintMessage (
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"RSI - %016lx, RDI - %016lx\n",
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SystemContext.SystemContextX64->Rsi,
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SystemContext.SystemContextX64->Rdi
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);
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InternalPrintMessage (
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"R8 - %016lx, R9 - %016lx, R10 - %016lx\n",
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SystemContext.SystemContextX64->R8,
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SystemContext.SystemContextX64->R9,
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SystemContext.SystemContextX64->R10
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);
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InternalPrintMessage (
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"R11 - %016lx, R12 - %016lx, R13 - %016lx\n",
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SystemContext.SystemContextX64->R11,
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SystemContext.SystemContextX64->R12,
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SystemContext.SystemContextX64->R13
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);
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InternalPrintMessage (
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"R14 - %016lx, R15 - %016lx\n",
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SystemContext.SystemContextX64->R14,
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SystemContext.SystemContextX64->R15
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);
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InternalPrintMessage (
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"DS - %016lx, ES - %016lx, FS - %016lx\n",
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SystemContext.SystemContextX64->Ds,
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SystemContext.SystemContextX64->Es,
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SystemContext.SystemContextX64->Fs
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);
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InternalPrintMessage (
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"GS - %016lx, SS - %016lx\n",
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SystemContext.SystemContextX64->Gs,
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SystemContext.SystemContextX64->Ss
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);
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InternalPrintMessage (
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"CR0 - %016lx, CR2 - %016lx, CR3 - %016lx\n",
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SystemContext.SystemContextX64->Cr0,
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SystemContext.SystemContextX64->Cr2,
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SystemContext.SystemContextX64->Cr3
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);
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InternalPrintMessage (
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"CR4 - %016lx, CR8 - %016lx\n",
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SystemContext.SystemContextX64->Cr4,
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SystemContext.SystemContextX64->Cr8
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);
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InternalPrintMessage (
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"DR0 - %016lx, DR1 - %016lx, DR2 - %016lx\n",
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SystemContext.SystemContextX64->Dr0,
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SystemContext.SystemContextX64->Dr1,
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SystemContext.SystemContextX64->Dr2
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);
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InternalPrintMessage (
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"DR3 - %016lx, DR6 - %016lx, DR7 - %016lx\n",
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SystemContext.SystemContextX64->Dr3,
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SystemContext.SystemContextX64->Dr6,
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SystemContext.SystemContextX64->Dr7
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);
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InternalPrintMessage (
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"GDTR - %016lx %016lx, LDTR - %016lx\n",
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SystemContext.SystemContextX64->Gdtr[0],
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SystemContext.SystemContextX64->Gdtr[1],
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SystemContext.SystemContextX64->Ldtr
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);
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InternalPrintMessage (
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"IDTR - %016lx %016lx, TR - %016lx\n",
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SystemContext.SystemContextX64->Idtr[0],
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SystemContext.SystemContextX64->Idtr[1],
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SystemContext.SystemContextX64->Tr
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);
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InternalPrintMessage (
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"FXSAVE_STATE - %016lx\n",
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&SystemContext.SystemContextX64->FxSaveState
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);
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}
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/**
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Display CPU information.
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@param ExceptionType Exception type.
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@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
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**/
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VOID
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DumpImageAndCpuContent (
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IN EFI_EXCEPTION_TYPE ExceptionType,
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IN EFI_SYSTEM_CONTEXT SystemContext
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)
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{
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DumpCpuContext (ExceptionType, SystemContext);
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//
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// Dump module image base and module entry point by RIP
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//
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if ((ExceptionType == EXCEPT_IA32_PAGE_FAULT) &&
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((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0)) {
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//
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// The RIP in SystemContext could not be used
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// if it is page fault with I/D set.
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//
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DumpModuleImageInfo ((*(UINTN *)(UINTN)SystemContext.SystemContextX64->Rsp));
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} else {
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DumpModuleImageInfo (SystemContext.SystemContextX64->Rip);
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}
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}
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