Replace the dummy C implementation of SpeculationBarrier() with implementations consisting of the recommended DSB SY + ISB sequence, as recommended by ARM in the whitepaper "Cache Speculation Side-channels" version 2.4, dated October 2018. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>