a33a2f6221
Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Ravi Rangarajan <ravi.p.rangarajan@intel.com> Reviewed by: Maurice Ma <maurice.ma@intel.com> Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com> Reviewed by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15676 6f19259b-4bc3-4df7-8a09-765794883524
326 lines
9.3 KiB
ArmAsm
326 lines
9.3 KiB
ArmAsm
#------------------------------------------------------------------------------
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#
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# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# SecEntry.S
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#
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# Abstract:
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#
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# This is the code that goes from real-mode to protected mode.
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# It consumes the reset vector, calls TempRamInit API from FSP binary.
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#
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#------------------------------------------------------------------------------
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#include "Fsp.h"
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ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
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ASM_PFX(_TEXT_REALMODE):
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#----------------------------------------------------------------------------
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#
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# Procedure: _ModuleEntryPoint
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#
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# Input: None
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#
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# Output: None
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#
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# Destroys: Assume all registers
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#
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# Description:
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#
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# Transition to non-paged flat-model protected mode from a
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# hard-coded GDT that provides exactly two descriptors.
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# This is a bare bones transition to protected mode only
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# used for a while in PEI and possibly DXE.
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#
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# After enabling protected mode, a far jump is executed to
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# transfer to PEI using the newly loaded GDT.
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#
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# Return: None
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#
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# MMX Usage:
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# MM0 = BIST State
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# MM5 = Save time-stamp counter value high32bit
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# MM6 = Save time-stamp counter value low32bit.
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#
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#----------------------------------------------------------------------------
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.align 4
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ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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fninit # clear any pending Floating point exceptions
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#
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# Store the BIST value in mm0
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#
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movd %eax, %mm0
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#
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# Save time-stamp counter value
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# rdtsc load 64bit time-stamp counter to EDX:EAX
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#
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rdtsc
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movd %edx, %mm5
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movd %ecx, %mm6
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#
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# Load the GDT table in GdtDesc
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#
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movl $GdtDesc, %esi
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.byte 0x66
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lgdt %cs:(%si)
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#
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# Transition to 16 bit protected mode
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#
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movl %cr0, %eax # Get control register 0
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orl $0x00000003, %eax # Set PE bit (bit #0) & MP bit (bit #1)
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movl %eax, %cr0 # Activate protected mode
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movl %cr4, %eax # Get control register 4
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orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
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movl %eax, %cr4
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#
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# Now we're in 16 bit protected mode
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# Set up the selectors for 32 bit protected mode entry
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#
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movw SYS_DATA_SEL, %ax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %fs
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movw %ax, %gs
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movw %ax, %ss
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#
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# Transition to Flat 32 bit protected mode
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# The jump to a far pointer causes the transition to 32 bit mode
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#
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movl $ProtectedModeEntryLinearAddress, %esi
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jmp *%cs:(%si)
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ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)
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ASM_PFX(_TEXT_PROTECTED_MODE):
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#----------------------------------------------------------------------------
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#
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# Procedure: ProtectedModeEntryPoint
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#
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# Input: None
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#
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# Output: None
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#
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# Destroys: Assume all registers
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#
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# Description:
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#
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# This function handles:
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# Call two basic APIs from FSP binary
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# Initializes stack with some early data (BIST, PEI entry, etc)
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#
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# Return: None
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#
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#----------------------------------------------------------------------------
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.align 4
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ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint)
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ASM_PFX(ProtectedModeEntryPoint):
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# Find the fsp info header
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movl PcdGet32 (PcdFlashFvFspBase), %edi
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movl PcdGet32 (PcdFlashFvFspSize), %ecx
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movl FVH_SIGINATURE_OFFSET(%edi), %eax
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cmp $FVH_SIGINATURE_VALID_VALUE, %eax
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jnz FspHeaderNotFound
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xorl %eax, %eax
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movw FVH_EXTHEADER_OFFSET_OFFSET(%edi), %ax
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cmp %ax, 0
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jnz FspFvExtHeaderExist
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xorl %eax, %eax
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movw FVH_HEADER_LENGTH_OFFSET(%edi), %ax # Bypass Fv Header
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addl %eax, %edi
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jmp FspCheckFfsHeader
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FspFvExtHeaderExist:
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addl %eax, %edi
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movl FVH_EXTHEADER_SIZE_OFFSET(%edi), %eax # Bypass Ext Fv Header
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addl %eax, %edi
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# Round up to 8 byte alignment
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movl %edi, %eax
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andb $0x07, %al
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jz FspCheckFfsHeader
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and $0xFFFFFFF8, %edi
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add $0x08, %edi
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FspCheckFfsHeader:
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# Check the ffs guid
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movl (%edi), %eax
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cmp $FSP_HEADER_GUID_DWORD1, %eax
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jnz FspHeaderNotFound
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movl 0x4(%edi), %eax
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cmp $FSP_HEADER_GUID_DWORD2, %eax
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jnz FspHeaderNotFound
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movl 0x08(%edi), %eax
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cmp $FSP_HEADER_GUID_DWORD3, %eax
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jnz FspHeaderNotFound
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movl 0x0c(%edi), %eax
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cmp $FSP_HEADER_GUID_DWORD4, %eax
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jnz FspHeaderNotFound
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add $FFS_HEADER_SIZE_VALUE, %edi # Bypass the ffs header
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# Check the section type as raw section
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movb SECTION_HEADER_TYPE_OFFSET(%edi), %al
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cmp $0x19, %al
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jnz FspHeaderNotFound
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addl $RAW_SECTION_HEADER_SIZE_VALUE, %edi # Bypass the section header
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jmp FspHeaderFound
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FspHeaderNotFound:
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jmp .
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FspHeaderFound:
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# Get the fsp TempRamInit Api address
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movl FSP_HEADER_IMAGEBASE_OFFSET(%edi), %eax
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addl FSP_HEADER_TEMPRAMINIT_OFFSET(%edi), %eax
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# Setup the hardcode stack
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movl $TempRamInitStack, %esp
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# Call the fsp TempRamInit Api
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jmp *%eax
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TempRamInitDone:
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cmp $0x0, %eax
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jnz FspApiFailed
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# ECX: start of range
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# EDX: end of range
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movl %edx, %esp
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pushl %edx
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pushl %ecx
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pushl %eax # zero - no hob list yet
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call ASM_PFX(CallPeiCoreEntryPoint)
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FspApiFailed:
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jmp .
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.align 0x10
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TempRamInitStack:
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.long TempRamInitDone
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.long TempRamInitParams
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#
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# ROM-based Global-Descriptor Table for the Tiano PEI Phase
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#
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.align 16
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#
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# GDT[0]: 0x00: Null entry, never used.
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#
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.equ NULL_SEL, . - GDT_BASE # Selector [0]
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GDT_BASE:
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BootGdtTable: .long 0
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.long 0
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#
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# Linear data segment descriptor
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#
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.equ LINEAR_SEL, . - GDT_BASE # Selector [0x8]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x92 # present, ring 0, data, expand-up, writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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#
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# Linear code segment descriptor
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#
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.equ LINEAR_CODE_SEL, . - GDT_BASE # Selector [0x10]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x9B # present, ring 0, data, expand-up, not-writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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#
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# System data segment descriptor
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#
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.equ SYS_DATA_SEL, . - GDT_BASE # Selector [0x18]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x93 # present, ring 0, data, expand-up, not-writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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#
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# System code segment descriptor
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#
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.equ SYS_CODE_SEL, . - GDT_BASE # Selector [0x20]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x9A # present, ring 0, data, expand-up, writable
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.byte 0xCF # page-granular, 32-bit
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.byte 0
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#
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# Spare segment descriptor
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#
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.equ SYS16_CODE_SEL, . - GDT_BASE # Selector [0x28]
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.word 0xFFFF # limit 0xFFFFF
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.word 0 # base 0
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.byte 0x0E # Changed from F000 to E000.
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.byte 0x9B # present, ring 0, code, expand-up, writable
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.byte 0x00 # byte-granular, 16-bit
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.byte 0
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#
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# Spare segment descriptor
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#
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.equ SYS16_DATA_SEL, . - GDT_BASE # Selector [0x30]
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.word 0xFFFF # limit 0xFFFF
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.word 0 # base 0
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.byte 0
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.byte 0x93 # present, ring 0, data, expand-up, not-writable
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.byte 0x00 # byte-granular, 16-bit
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.byte 0
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#
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# Spare segment descriptor
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#
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.equ SPARE5_SEL, . - GDT_BASE # Selector [0x38]
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.word 0 # limit 0
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.word 0 # base 0
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.byte 0
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.byte 0 # present, ring 0, data, expand-up, writable
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.byte 0 # page-granular, 32-bit
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.byte 0
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.equ GDT_SIZE, . - BootGdtTable # Size, in bytes
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#
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# GDT Descriptor
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#
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GdtDesc: # GDT descriptor
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.word GDT_SIZE - 1 # GDT limit
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.long BootGdtTable # GDT base address
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ASM_PFX(ProtectedModeEntryLinearAddress):
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ProtectedModeEntryLinearOffset:
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.long ProtectedModeEntryPoint # Offset of our 32 bit code
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.word LINEAR_CODE_SEL
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