f168816c49
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1537 Use 16-bit and 32-bit IO widths for SDMMC MMIO to prevent all register accesses from being split up into 8-bit accesses. The SDHCI specification states that the registers shall be accessible in byte, word, and double word accesses. (SD Host Controller Simplified Specification 4.20 Section 1.2) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>