f2dc28f0b6
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 An SEV-SNP guest requires that private memory (aka pages mapped encrypted) must be validated before being accessed. The validation process consist of the following sequence: 1) Set the memory encryption attribute in the page table (aka C-bit). Note: If the processor is in non-PAE mode, then all the memory accesses are considered private. 2) Add the memory range as private in the RMP table. This can be performed using the Page State Change VMGEXIT defined in the GHCB specification. 3) Use the PVALIDATE instruction to set the Validated Bit in the RMP table. During the guest creation time, the VMM encrypts the OVMF_CODE.fd using the SEV-SNP firmware provided LAUNCH_UPDATE_DATA command. In addition to encrypting the content, the command also validates the memory region. This allows us to execute the code without going through the validation sequence. During execution, the reset vector need to access some data pages (such as page tables, SevESWorkarea, Sec stack). The data pages are accessed as private memory. The data pages are not part of the OVMF_CODE.fd, so they were not validated during the guest creation. There are two approaches we can take to validate the data pages before the access: a) Enhance the OVMF reset vector code to validate the pages as described above (go through step 2 - 3). OR b) Validate the pages during the guest creation time. The SEV firmware provides a command which can be used by the VMM to validate the pages without affecting the measurement of the launch. Approach #b seems much simpler; it does not require any changes to the OVMF reset vector code. Update the OVMF metadata with the list of regions that must be pre-validated by the VMM before the boot. Cc: Michael Roth <michael.roth@amd.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
144 lines
5.8 KiB
Plaintext
144 lines
5.8 KiB
Plaintext
;------------------------------------------------------------------------------
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; @file
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; This file includes all other code files to assemble the reset vector code
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;
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; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;------------------------------------------------------------------------------
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;
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; If neither ARCH_IA32 nor ARCH_X64 are defined, then try to include
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; Base.h to use the C pre-processor to determine the architecture.
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;
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%ifndef ARCH_IA32
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%ifndef ARCH_X64
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#include <Base.h>
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#if defined (MDE_CPU_IA32)
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%define ARCH_IA32
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#elif defined (MDE_CPU_X64)
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%define ARCH_X64
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#endif
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%endif
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%endif
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%ifdef ARCH_IA32
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%ifdef ARCH_X64
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%error "Only one of ARCH_IA32 or ARCH_X64 can be defined."
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%endif
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%elifdef ARCH_X64
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%else
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%error "Either ARCH_IA32 or ARCH_X64 must be defined."
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%endif
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%include "CommonMacros.inc"
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%include "PostCodes.inc"
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%ifdef DEBUG_PORT80
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%include "Port80Debug.asm"
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%elifdef DEBUG_SERIAL
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%include "SerialDebug.asm"
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%else
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%include "DebugDisabled.asm"
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%endif
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%include "Ia32/SearchForBfvBase.asm"
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%include "Ia32/SearchForSecEntry.asm"
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%define WORK_AREA_GUEST_TYPE (FixedPcdGet32 (PcdOvmfWorkAreaBase))
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%ifdef ARCH_X64
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#include <AutoGen.h>
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%if (FixedPcdGet32 (PcdOvmfSecPageTablesSize) != 0x6000)
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%error "This implementation inherently depends on PcdOvmfSecPageTablesSize"
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%endif
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%if (FixedPcdGet32 (PcdOvmfSecGhcbPageTableSize) != 0x1000)
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%error "This implementation inherently depends on PcdOvmfSecGhcbPageTableSize"
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%endif
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%if (FixedPcdGet32 (PcdOvmfSecGhcbSize) != 0x2000)
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%error "This implementation inherently depends on PcdOvmfSecGhcbSize"
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%endif
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%if ((FixedPcdGet32 (PcdOvmfSecGhcbBase) >> 21) != \
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((FixedPcdGet32 (PcdOvmfSecGhcbBase) + FixedPcdGet32 (PcdOvmfSecGhcbSize) - 1) >> 21))
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%error "This implementation inherently depends on PcdOvmfSecGhcbBase not straddling a 2MB boundary"
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%endif
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%define TDX_BFV_RAW_DATA_OFFSET FixedPcdGet32 (PcdBfvRawDataOffset)
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%define TDX_BFV_RAW_DATA_SIZE FixedPcdGet32 (PcdBfvRawDataSize)
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%define TDX_BFV_MEMORY_BASE FixedPcdGet32 (PcdBfvBase)
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%define TDX_BFV_MEMORY_SIZE FixedPcdGet32 (PcdBfvRawDataSize)
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%define TDX_CFV_RAW_DATA_OFFSET FixedPcdGet32 (PcdCfvRawDataOffset)
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%define TDX_CFV_RAW_DATA_SIZE FixedPcdGet32 (PcdCfvRawDataSize)
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%define TDX_CFV_MEMORY_BASE FixedPcdGet32 (PcdCfvBase),
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%define TDX_CFV_MEMORY_SIZE FixedPcdGet32 (PcdCfvRawDataSize),
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%define TDX_HEAP_STACK_BASE FixedPcdGet32 (PcdOvmfSecPeiTempRamBase)
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%define TDX_HEAP_STACK_SIZE FixedPcdGet32 (PcdOvmfSecPeiTempRamSize)
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%define TDX_HOB_MEMORY_BASE FixedPcdGet32 (PcdOvmfSecGhcbBase)
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%define TDX_HOB_MEMORY_SIZE FixedPcdGet32 (PcdOvmfSecGhcbSize)
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%define TDX_INIT_MEMORY_BASE FixedPcdGet32 (PcdOvmfWorkAreaBase)
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%define TDX_INIT_MEMORY_SIZE (FixedPcdGet32 (PcdOvmfWorkAreaSize) + FixedPcdGet32 (PcdOvmfSecGhcbBackupSize))
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%define OVMF_PAGE_TABLE_BASE FixedPcdGet32 (PcdOvmfSecPageTablesBase)
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%define OVMF_PAGE_TABLE_SIZE FixedPcdGet32 (PcdOvmfSecPageTablesSize)
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%define TDX_WORK_AREA_PGTBL_READY (FixedPcdGet32 (PcdOvmfWorkAreaBase) + 4)
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%define TDX_WORK_AREA_GPAW (FixedPcdGet32 (PcdOvmfWorkAreaBase) + 8)
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%define PT_ADDR(Offset) (FixedPcdGet32 (PcdOvmfSecPageTablesBase) + (Offset))
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%define GHCB_PT_ADDR (FixedPcdGet32 (PcdOvmfSecGhcbPageTableBase))
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%define GHCB_BASE (FixedPcdGet32 (PcdOvmfSecGhcbBase))
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%define GHCB_SIZE (FixedPcdGet32 (PcdOvmfSecGhcbSize))
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%define SEV_ES_WORK_AREA (FixedPcdGet32 (PcdSevEsWorkAreaBase))
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%define SEV_ES_WORK_AREA_RDRAND (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 8)
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%define SEV_ES_WORK_AREA_ENC_MASK (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 16)
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%define SEV_ES_VC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))
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%define SEV_SNP_SECRETS_BASE (FixedPcdGet32 (PcdOvmfSnpSecretsBase))
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%define SEV_SNP_SECRETS_SIZE (FixedPcdGet32 (PcdOvmfSnpSecretsSize))
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%define CPUID_BASE (FixedPcdGet32 (PcdOvmfCpuidBase))
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%define CPUID_SIZE (FixedPcdGet32 (PcdOvmfCpuidSize))
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%define SNP_SEC_MEM_BASE_DESC_1 (FixedPcdGet32 (PcdOvmfSecPageTablesBase))
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%define SNP_SEC_MEM_SIZE_DESC_1 (FixedPcdGet32 (PcdOvmfSecGhcbBase) - SNP_SEC_MEM_BASE_DESC_1)
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;
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; The PcdOvmfSecGhcbBase reserves two GHCB pages. The first page is used
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; as GHCB shared page and second is used for bookkeeping to support the
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; nested GHCB in SEC phase. The bookkeeping page is mapped private. The VMM
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; does not need to validate the shared page but it need to validate the
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; bookkeeping page.
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;
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%define SNP_SEC_MEM_BASE_DESC_2 (GHCB_BASE + 0x1000)
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%define SNP_SEC_MEM_SIZE_DESC_2 (SEV_SNP_SECRETS_BASE - SNP_SEC_MEM_BASE_DESC_2)
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%define SNP_SEC_MEM_BASE_DESC_3 (CPUID_BASE + CPUID_SIZE)
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%define SNP_SEC_MEM_SIZE_DESC_3 (FixedPcdGet32 (PcdOvmfPeiMemFvBase) - SNP_SEC_MEM_BASE_DESC_3)
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%include "X64/IntelTdxMetadata.asm"
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%include "Ia32/Flat32ToFlat64.asm"
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%include "Ia32/AmdSev.asm"
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%include "Ia32/PageTables64.asm"
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%include "Ia32/IntelTdx.asm"
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%include "X64/OvmfSevMetadata.asm"
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%endif
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%include "Ia16/Real16ToFlat32.asm"
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%include "Ia16/Init16.asm"
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%include "Main.asm"
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%define SEV_ES_AP_RESET_IP FixedPcdGet32 (PcdSevEsWorkAreaBase)
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%define SEV_LAUNCH_SECRET_BASE FixedPcdGet32 (PcdSevLaunchSecretBase)
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%define SEV_LAUNCH_SECRET_SIZE FixedPcdGet32 (PcdSevLaunchSecretSize)
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%define SEV_FW_HASH_BLOCK_BASE FixedPcdGet32 (PcdQemuHashTableBase)
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%define SEV_FW_HASH_BLOCK_SIZE FixedPcdGet32 (PcdQemuHashTableSize)
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%include "Ia16/ResetVectorVtf0.asm"
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