Fix various typos in comments and documentation. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-18-philmd@redhat.com>
		
			
				
	
	
		
			393 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			393 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/** @file
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  Data structure and functions to allocate and free memory space.
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _HEAPGUARD_H_
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#define _HEAPGUARD_H_
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#include "PiSmmCore.h"
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//
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// Following macros are used to define and access the guarded memory bitmap
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// table.
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//
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// To simplify the access and reduce the memory used for this table, the
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// table is constructed in the similar way as page table structure but in
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// reverse direction, i.e. from bottom growing up to top.
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//
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//    - 1-bit tracks 1 page (4KB)
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//    - 1-UINT64 map entry tracks 256KB memory
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//    - 1K-UINT64 map table tracks 256MB memory
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//    - Five levels of tables can track any address of memory of 64-bit
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//      system, like below.
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//
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//       512   *   512   *   512   *   512    *    1K   *  64b *     4K
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//    111111111 111111111 111111111 111111111 1111111111 111111 111111111111
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//    63        54        45        36        27         17     11         0
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//       9b        9b        9b        9b         10b      6b       12b
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//       L0   ->   L1   ->   L2   ->   L3   ->    L4   -> bits  ->  page
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//      1FF       1FF       1FF       1FF         3FF      3F       FFF
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//
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// L4 table has 1K * sizeof(UINT64) = 8K (2-page), which can track 256MB
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// memory. Each table of L0-L3 will be allocated when its memory address
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// range is to be tracked. Only 1-page will be allocated each time. This
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// can save memories used to establish this map table.
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//
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// For a normal configuration of system with 4G memory, two levels of tables
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// can track the whole memory, because two levels (L3+L4) of map tables have
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// already covered 37-bit of memory address. And for a normal UEFI BIOS,
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// less than 128M memory would be consumed during boot. That means we just
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// need
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//
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//          1-page (L3) + 2-page (L4)
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//
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// memory (3 pages) to track the memory allocation works. In this case,
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// there's no need to setup L0-L2 tables.
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//
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//
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// Each entry occupies 8B/64b. 1-page can hold 512 entries, which spans 9
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// bits in address. (512 = 1 << 9)
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//
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#define BYTE_LENGTH_SHIFT                   3             // (8 = 1 << 3)
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#define GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT  \
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        (EFI_PAGE_SHIFT - BYTE_LENGTH_SHIFT)
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#define GUARDED_HEAP_MAP_TABLE_DEPTH        5
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// Use UINT64_index + bit_index_of_UINT64 to locate the bit in may
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#define GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT    6             // (64 = 1 << 6)
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#define GUARDED_HEAP_MAP_ENTRY_BITS         \
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        (1 << GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT)
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#define GUARDED_HEAP_MAP_ENTRY_BYTES        \
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        (GUARDED_HEAP_MAP_ENTRY_BITS / 8)
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// L4 table address width: 64 - 9 * 4 - 6 - 12 = 10b
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#define GUARDED_HEAP_MAP_ENTRY_SHIFT              \
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        (GUARDED_HEAP_MAP_ENTRY_BITS              \
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         - GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT * 4 \
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         - GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT       \
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         - EFI_PAGE_SHIFT)
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// L4 table address mask: (1 << 10 - 1) = 0x3FF
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#define GUARDED_HEAP_MAP_ENTRY_MASK               \
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        ((1 << GUARDED_HEAP_MAP_ENTRY_SHIFT) - 1)
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// Size of each L4 table: (1 << 10) * 8 = 8KB = 2-page
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#define GUARDED_HEAP_MAP_SIZE                     \
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        ((1 << GUARDED_HEAP_MAP_ENTRY_SHIFT) * GUARDED_HEAP_MAP_ENTRY_BYTES)
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// Memory size tracked by one L4 table: 8KB * 8 * 4KB = 256MB
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#define GUARDED_HEAP_MAP_UNIT_SIZE                \
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        (GUARDED_HEAP_MAP_SIZE * 8 * EFI_PAGE_SIZE)
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// L4 table entry number: 8KB / 8 = 1024
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#define GUARDED_HEAP_MAP_ENTRIES_PER_UNIT         \
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        (GUARDED_HEAP_MAP_SIZE / GUARDED_HEAP_MAP_ENTRY_BYTES)
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// L4 table entry indexing
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#define GUARDED_HEAP_MAP_ENTRY_INDEX(Address)                       \
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        (RShiftU64 (Address, EFI_PAGE_SHIFT                         \
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                             + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT)    \
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         & GUARDED_HEAP_MAP_ENTRY_MASK)
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// L4 table entry bit indexing
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#define GUARDED_HEAP_MAP_ENTRY_BIT_INDEX(Address)       \
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        (RShiftU64 (Address, EFI_PAGE_SHIFT)            \
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         & ((1 << GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT) - 1))
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//
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// Total bits (pages) tracked by one L4 table (65536-bit)
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//
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#define GUARDED_HEAP_MAP_BITS                               \
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        (1 << (GUARDED_HEAP_MAP_ENTRY_SHIFT                 \
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               + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT))
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//
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// Bit indexing inside the whole L4 table (0 - 65535)
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//
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#define GUARDED_HEAP_MAP_BIT_INDEX(Address)                     \
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        (RShiftU64 (Address, EFI_PAGE_SHIFT)                    \
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         & ((1 << (GUARDED_HEAP_MAP_ENTRY_SHIFT                 \
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                   + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT)) - 1))
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//
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// Memory address bit width tracked by L4 table: 10 + 6 + 12 = 28
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//
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#define GUARDED_HEAP_MAP_TABLE_SHIFT                                      \
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        (GUARDED_HEAP_MAP_ENTRY_SHIFT + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT  \
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         + EFI_PAGE_SHIFT)
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//
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// Macro used to initialize the local array variable for map table traversing
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// {55, 46, 37, 28, 18}
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//
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#define GUARDED_HEAP_MAP_TABLE_DEPTH_SHIFTS                                 \
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  {                                                                         \
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    GUARDED_HEAP_MAP_TABLE_SHIFT + GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT * 3,  \
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    GUARDED_HEAP_MAP_TABLE_SHIFT + GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT * 2,  \
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    GUARDED_HEAP_MAP_TABLE_SHIFT + GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT,      \
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    GUARDED_HEAP_MAP_TABLE_SHIFT,                                           \
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    EFI_PAGE_SHIFT + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT                       \
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  }
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//
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// Masks used to extract address range of each level of table
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// {0x1FF, 0x1FF, 0x1FF, 0x1FF, 0x3FF}
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//
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#define GUARDED_HEAP_MAP_TABLE_DEPTH_MASKS                                  \
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  {                                                                         \
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    (1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1,                          \
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    (1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1,                          \
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    (1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1,                          \
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    (1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1,                          \
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    (1 << GUARDED_HEAP_MAP_ENTRY_SHIFT) - 1                                 \
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  }
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//
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// Memory type to guard (matching the related PCD definition)
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//
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#define GUARD_HEAP_TYPE_PAGE        BIT2
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#define GUARD_HEAP_TYPE_POOL        BIT3
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//
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// Debug message level
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//
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#define HEAP_GUARD_DEBUG_LEVEL  (DEBUG_POOL|DEBUG_PAGE)
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typedef struct {
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  UINT32                TailMark;
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  UINT32                HeadMark;
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  EFI_PHYSICAL_ADDRESS  Address;
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  LIST_ENTRY            Link;
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} HEAP_GUARD_NODE;
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/**
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  Set head Guard and tail Guard for the given memory range.
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  @param[in]  Memory          Base address of memory to set guard for.
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  @param[in]  NumberOfPages   Memory size in pages.
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  @return VOID.
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**/
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VOID
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SetGuardForMemory (
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  IN EFI_PHYSICAL_ADDRESS   Memory,
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  IN UINTN                  NumberOfPages
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  );
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/**
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  Unset head Guard and tail Guard for the given memory range.
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  @param[in]  Memory          Base address of memory to unset guard for.
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  @param[in]  NumberOfPages   Memory size in pages.
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  @return VOID.
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**/
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VOID
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UnsetGuardForMemory (
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  IN EFI_PHYSICAL_ADDRESS   Memory,
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  IN UINTN                  NumberOfPages
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  );
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/**
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  Adjust the base and number of pages to really allocate according to Guard.
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  @param[in,out]  Memory          Base address of free memory.
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  @param[in,out]  NumberOfPages   Size of memory to allocate.
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  @return VOID.
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**/
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VOID
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AdjustMemoryA (
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  IN OUT EFI_PHYSICAL_ADDRESS    *Memory,
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  IN OUT UINTN                   *NumberOfPages
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  );
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/**
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  Adjust the start address and number of pages to free according to Guard.
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  The purpose of this function is to keep the shared Guard page with adjacent
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  memory block if it's still in guard, or free it if no more sharing. Another
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  is to reserve pages as Guard pages in partial page free situation.
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  @param[in,out]  Memory          Base address of memory to free.
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  @param[in,out]  NumberOfPages   Size of memory to free.
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  @return VOID.
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**/
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VOID
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AdjustMemoryF (
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  IN OUT EFI_PHYSICAL_ADDRESS    *Memory,
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  IN OUT UINTN                   *NumberOfPages
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  );
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/**
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  Check to see if the pool at the given address should be guarded or not.
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  @param[in]  MemoryType      Pool type to check.
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  @return TRUE  The given type of pool should be guarded.
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  @return FALSE The given type of pool should not be guarded.
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**/
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BOOLEAN
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IsPoolTypeToGuard (
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  IN EFI_MEMORY_TYPE        MemoryType
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  );
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/**
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  Check to see if the page at the given address should be guarded or not.
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  @param[in]  MemoryType      Page type to check.
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  @param[in]  AllocateType    Allocation type to check.
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  @return TRUE  The given type of page should be guarded.
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  @return FALSE The given type of page should not be guarded.
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**/
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BOOLEAN
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IsPageTypeToGuard (
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  IN EFI_MEMORY_TYPE        MemoryType,
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  IN EFI_ALLOCATE_TYPE      AllocateType
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  );
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/**
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  Check to see if the page at the given address is guarded or not.
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  @param[in]  Address     The address to check for.
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  @return TRUE  The page at Address is guarded.
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  @return FALSE The page at Address is not guarded.
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**/
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BOOLEAN
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EFIAPI
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IsMemoryGuarded (
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  IN EFI_PHYSICAL_ADDRESS    Address
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  );
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/**
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  Check to see if the page at the given address is a Guard page or not.
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  @param[in]  Address     The address to check for.
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  @return TRUE  The page at Address is a Guard page.
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  @return FALSE The page at Address is not a Guard page.
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**/
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BOOLEAN
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EFIAPI
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IsGuardPage (
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  IN EFI_PHYSICAL_ADDRESS    Address
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  );
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/**
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  Dump the guarded memory bit map.
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**/
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VOID
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EFIAPI
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DumpGuardedMemoryBitmap (
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  VOID
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  );
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/**
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  Adjust the pool head position to make sure the Guard page is adjavent to
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  pool tail or pool head.
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  @param[in]  Memory    Base address of memory allocated.
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  @param[in]  NoPages   Number of pages actually allocated.
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  @param[in]  Size      Size of memory requested.
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                        (plus pool head/tail overhead)
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  @return Address of pool head.
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**/
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VOID *
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AdjustPoolHeadA (
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  IN EFI_PHYSICAL_ADDRESS    Memory,
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  IN UINTN                   NoPages,
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  IN UINTN                   Size
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  );
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/**
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  Get the page base address according to pool head address.
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  @param[in]  Memory    Head address of pool to free.
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  @return Address of pool head.
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**/
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VOID *
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AdjustPoolHeadF (
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  IN EFI_PHYSICAL_ADDRESS    Memory
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  );
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/**
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  Helper function of memory allocation with Guard pages.
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  @param  FreePageList           The free page node.
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  @param  NumberOfPages          Number of pages to be allocated.
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  @param  MaxAddress             Request to allocate memory below this address.
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  @param  MemoryType             Type of memory requested.
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  @return Memory address of allocated pages.
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**/
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UINTN
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InternalAllocMaxAddressWithGuard (
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  IN OUT LIST_ENTRY           *FreePageList,
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  IN     UINTN                NumberOfPages,
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  IN     UINTN                MaxAddress,
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  IN     EFI_MEMORY_TYPE      MemoryType
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  );
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/**
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  Helper function of memory free with Guard pages.
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  @param[in]  Memory                 Base address of memory being freed.
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  @param[in]  NumberOfPages          The number of pages to free.
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  @param[in]  AddRegion              If this memory is new added region.
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  @retval EFI_NOT_FOUND          Could not find the entry that covers the range.
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  @retval EFI_INVALID_PARAMETER  Address not aligned, Address is zero or
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                                 NumberOfPages is zero.
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  @return EFI_SUCCESS            Pages successfully freed.
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**/
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EFI_STATUS
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SmmInternalFreePagesExWithGuard (
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  IN EFI_PHYSICAL_ADDRESS  Memory,
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  IN UINTN                 NumberOfPages,
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  IN BOOLEAN               AddRegion
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  );
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/**
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  Check to see if the heap guard is enabled for page and/or pool allocation.
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  @return TRUE/FALSE.
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**/
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BOOLEAN
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IsHeapGuardEnabled (
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  VOID
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  );
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/**
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  Debug function used to verify if the Guard page is well set or not.
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  @param[in]  BaseAddress     Address of memory to check.
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  @param[in]  NumberOfPages   Size of memory in pages.
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  @return TRUE    The head Guard and tail Guard are both well set.
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  @return FALSE   The head Guard and/or tail Guard are not well set.
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**/
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BOOLEAN
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VerifyMemoryGuard (
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  IN  EFI_PHYSICAL_ADDRESS      BaseAddress,
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  IN  UINTN                     NumberOfPages
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  );
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extern BOOLEAN mOnGuarding;
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#endif
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