dbab994991
Under certain circumstances, QEMU exposes the "etc/msr_feature_control" fw_cfg file, with a 64-bit little endian value. The firmware is supposed to write this value to MSR_IA32_FEATURE_CONTROL (0x3a), on all processors, on the normal and the S3 resume boot paths. Utilize EFI_PEI_MPSERVICES_PPI to implement this feature. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Fixes: https://github.com/tianocore/edk2/issues/97 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
113 lines
3.6 KiB
INI
113 lines
3.6 KiB
INI
## @file
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# Platform PEI driver
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#
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# This module provides platform specific function to detect boot mode.
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# Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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##
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = PlatformPei
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FILE_GUID = 222c386d-5abc-4fb4-b124-fbb82488acf4
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MODULE_TYPE = PEIM
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VERSION_STRING = 1.0
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ENTRY_POINT = InitializePlatform
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#
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# The following information is for reference only and not required by the build tools.
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#
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# VALID_ARCHITECTURES = IA32 X64 IPF EBC
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#
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[Sources]
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Cmos.c
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FeatureControl.c
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Fv.c
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MemDetect.c
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Platform.c
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Xen.c
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[Packages]
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IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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UefiCpuPkg/UefiCpuPkg.dec
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OvmfPkg/OvmfPkg.dec
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[Guids]
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gEfiMemoryTypeInformationGuid
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gEfiXenInfoGuid
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[LibraryClasses]
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BaseLib
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DebugLib
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HobLib
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IoLib
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PciLib
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PeiResourcePublicationLib
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PeiServicesLib
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PeiServicesTablePointerLib
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PeimEntryPoint
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QemuFwCfgLib
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MtrrLib
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PcdLib
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[Pcd]
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize
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gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId
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gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase
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gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd
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gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
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gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
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gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
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gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
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gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
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gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode
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gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable
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gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack
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gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable
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gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable
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gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize
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[FixedPcd]
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gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
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[FeaturePcd]
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gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
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[Ppis]
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gEfiPeiMasterBootModePpiGuid
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gEfiPeiMpServicesPpiGuid
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[Depex]
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TRUE
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