d0bf562330
signed-off-by: jiewen.yao@intel.com reviewed-by: rui.sun@intel.com git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13631 6f19259b-4bc3-4df7-8a09-765794883524
131 lines
3.7 KiB
ArmAsm
131 lines
3.7 KiB
ArmAsm
## @file
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# This is the assembly code for transferring to control to OS S3 waking vector
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# for X64 platform
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#
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# Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
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#
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# This program and the accompanying materials are
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# licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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##
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ASM_GLOBAL ASM_PFX(AsmTransferControl)
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ASM_PFX(AsmTransferControl):
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# rcx S3WakingVector :DWORD
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# rdx AcpiLowMemoryBase :DWORD
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lea _AsmTransferControl_al_0000, %eax
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movq $0x2800000000, %r8
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orq %r8, %rax
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pushq %rax
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shrd $20, %ecx, %ebx
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andl $0x0f, %ecx
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movw %cx, %bx
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movl %ebx, jmp_addr
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lret
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_AsmTransferControl_al_0000:
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.byte 0x0b8, 0x30, 0 # mov ax, 30h as selector
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %fs
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movl %eax, %gs
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movl %eax, %ss
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movq %cr0, %rax
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movq %cr4, %rbx
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.byte 0x66
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andl $0x7ffffffe, %eax
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andb $0xdf, %bl
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movq %rax, %cr0
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.byte 0x66
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movl $0x0c0000080, %ecx
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rdmsr
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andb $0xfe, %ah
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wrmsr
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movq %rbx, %cr4
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.byte 0x0ea # jmp far jmp_addr
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jmp_addr:
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.long 0
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ASM_GLOBAL ASM_PFX(AsmTransferControl32)
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ASM_PFX(AsmTransferControl32):
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# S3WakingVector :DWORD
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# AcpiLowMemoryBase :DWORD
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pushq %rbp
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movl %esp,%ebp
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.byte 0x8d, 0x05 # lea eax, AsmTransferControl16
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ASM_GLOBAL ASM_PFX(AsmFixAddress16)
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ASM_PFX(AsmFixAddress16):
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.long 0
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pushq $0x28 # CS
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pushq %rax
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lret
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ASM_GLOBAL ASM_PFX(AsmTransferControl16)
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ASM_PFX(AsmTransferControl16):
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.byte 0xb8,0x30,0 # mov ax, 30h as selector
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movw %ax,%ds
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movw %ax,%es
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movw %ax,%fs
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movw %ax,%gs
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movw %ax,%ss
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movq %cr0, %rax # Get control register 0
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.byte 0x66
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.byte 0x83,0xe0,0xfe # and eax, 0fffffffeh ; Clear PE bit (bit #0)
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.byte 0xf,0x22,0xc0 # mov cr0, eax ; Activate real mode
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.byte 0xea # jmp far AsmJmpAddr32
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ASM_GLOBAL ASM_PFX(AsmJmpAddr32)
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ASM_PFX(AsmJmpAddr32):
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.long 0
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ASM_GLOBAL ASM_PFX(PageFaultHandlerHook)
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ASM_PFX(PageFaultHandlerHook):
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pushq %rax # save all volatile registers
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pushq %rcx
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pushq %rdx
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pushq %r8
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pushq %r9
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pushq %r10
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pushq %r11
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# save volatile fp registers
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addq $-0x68, %rsp
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stmxcsr 0x60(%rsp)
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movdqa %xmm0, 0x0(%rsp)
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movdqa %xmm1, 0x10(%rsp)
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movdqa %xmm2, 0x20(%rsp)
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movdqa %xmm3, 0x30(%rsp)
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movdqa %xmm4, 0x40(%rsp)
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movdqa %xmm5, 0x50(%rsp)
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addq $-0x20, %rsp
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call ASM_PFX(PageFaultHandler)
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addq $0x20, %rsp
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# load volatile fp registers
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ldmxcsr 0x60(%rsp)
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movdqa 0x0(%rsp), %xmm0
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movdqa 0x10(%rsp), %xmm1
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movdqa 0x20(%rsp), %xmm2
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movdqa 0x30(%rsp), %xmm3
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movdqa 0x40(%rsp), %xmm4
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movdqa 0x50(%rsp), %xmm5
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addq $0x68, %rsp
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testb %al, %al
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popq %r11
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popq %r10
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popq %r9
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popq %r8
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popq %rdx
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popq %rcx
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popq %rax # restore all volatile registers
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jnz L1
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jmpq *ASM_PFX(mOriginalHandler)
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L1:
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addq $0x08, %rsp # skip error code for PF
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iretq
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