6995a1b79b
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 A GHCB page is needed during the Sec phase, so this new page must be created. Since the #VC exception handler routines assume that a per-CPU variable area is immediately after the GHCB, this per-CPU variable area must also be created. Since the GHCB must be marked as an un-encrypted, or shared, page, an additional pagetable page is required to break down the 2MB region where the GHCB page lives into 4K pagetable entries. Create a new entry in the OVMF memory layout for the new page table page and for the SEC GHCB and per-CPU variable pages. After breaking down the 2MB page, update the GHCB page table entry to remove the encryption mask. The GHCB page will be used by the SEC #VC exception handler. The #VC exception handler will fill in the necessary fields of the GHCB and exit to the hypervisor using the VMGEXIT instruction. The hypervisor then accesses the GHCB in order to perform the requested function. Four new fixed PCDs are needed to support the SEC GHCB page: - PcdOvmfSecGhcbBase UINT32 value that is the base address of the GHCB used during the SEC phase. - PcdOvmfSecGhcbSize UINT32 value that is the size, in bytes, of the GHCB area used during the SEC phase. - PcdOvmfSecGhcbPageTableBase UINT32 value that is address of a page table page used to break down the 2MB page into 512 4K pages. - PcdOvmfSecGhcbPageTableSize UINT32 value that is the size, in bytes, of the page table page. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
359 lines
18 KiB
Plaintext
359 lines
18 KiB
Plaintext
## @file
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# EFI/Framework Open Virtual Machine Firmware (OVMF) platform
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#
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# Copyright (c) 2020, Rebecca Cran <rebecca@bsdio.com>
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# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2014, Pluribus Networks, Inc.
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = OvmfPkg
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PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5
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PACKAGE_VERSION = 0.1
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[Includes]
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Include
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Csm/Include
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[LibraryClasses]
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## @libraryclass Access bhyve's firmware control interface.
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BhyveFwCtlLib|Include/Library/BhyveFwCtlLib.h
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## @libraryclass Loads and boots a Linux kernel image
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#
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LoadLinuxLib|Include/Library/LoadLinuxLib.h
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## @libraryclass Declares helper functions for Secure Encrypted
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# Virtualization (SEV) guests.
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MemEncryptSevLib|Include/Library/MemEncryptSevLib.h
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## @libraryclass Save and restore variables using a file
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#
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NvVarsFileLib|Include/Library/NvVarsFileLib.h
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## @libraryclass Provides services to work with PCI capabilities in PCI
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# config space.
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PciCapLib|Include/Library/PciCapLib.h
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## @libraryclass Layered on top of PciCapLib, allows clients to plug an
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# EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config
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# space access.
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PciCapPciIoLib|Include/Library/PciCapPciIoLib.h
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## @libraryclass Layered on top of PciCapLib, allows clients to plug a
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# PciSegmentLib backend into PciCapLib, for config space
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# access.
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PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h
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## @libraryclass Register a status code handler for printing the Boot
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# Manager's LoadImage() and StartImage() preparations, and
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# return codes, to the UEFI console.
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PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h
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## @libraryclass Customize FVB2 protocol member functions for a platform.
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PlatformFvbLib|Include/Library/PlatformFvbLib.h
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## @libraryclass Access QEMU's firmware configuration interface
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#
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QemuFwCfgLib|Include/Library/QemuFwCfgLib.h
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## @libraryclass S3 support for QEMU fw_cfg
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#
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QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h
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## @libraryclass Parse the contents of named fw_cfg files as simple
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# (scalar) data types.
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QemuFwCfgSimpleParserLib|Include/Library/QemuFwCfgSimpleParserLib.h
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## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"
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# fw_cfg file.
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#
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QemuBootOrderLib|Include/Library/QemuBootOrderLib.h
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## @libraryclass Load a kernel image and command line passed to QEMU via
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# the command line
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#
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QemuLoadImageLib|Include/Library/QemuLoadImageLib.h
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## @libraryclass Serialize (and deserialize) variables
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#
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SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
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## @libraryclass Declares utility functions for virtio device drivers.
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VirtioLib|Include/Library/VirtioLib.h
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## @libraryclass Install Virtio Device Protocol instances on virtio-mmio
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# transports.
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VirtioMmioDeviceLib|Include/Library/VirtioMmioDeviceLib.h
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## @libraryclass Invoke Xen hypercalls
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#
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XenHypercallLib|Include/Library/XenHypercallLib.h
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## @libraryclass Manage XenBus device path and I/O handles
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#
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XenIoMmioLib|Include/Library/XenIoMmioLib.h
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## @libraryclass Get information about Xen
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#
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XenPlatformLib|Include/Library/XenPlatformLib.h
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[Guids]
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gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
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gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}
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gOvmfPkKek1AppPrefixGuid = {0x4e32566d, 0x8e9e, 0x4f52, {0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27}}
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gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
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gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
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gQemuRamfbGuid = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}
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gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
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gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
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gMicrosoftVendorGuid = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}
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gEfiLegacyBiosGuid = {0x2E3044AC, 0x879F, 0x490F, {0x97, 0x60, 0xBB, 0xDF, 0xAF, 0x69, 0x5F, 0x50}}
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gEfiLegacyDevOrderVariableGuid = {0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52}}
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gLinuxEfiInitrdMediaGuid = {0x5568e427, 0x68fc, 0x4f3d, {0xac, 0x74, 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68}}
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gQemuKernelLoaderFsMediaGuid = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}}
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[Ppis]
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# PPI whose presence in the PPI database signals that the TPM base address
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# has been discovered and recorded
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gOvmfTpmDiscoveredPpiGuid = {0xb9a61ad0, 0x2802, 0x41f3, {0xb5, 0x13, 0x96, 0x51, 0xce, 0x6b, 0xd5, 0x75}}
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[Protocols]
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gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
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gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
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gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
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gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
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gEfiLegacy8259ProtocolGuid = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}
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gEfiFirmwareVolumeProtocolGuid = {0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xcd, 0x81, 0x54, 0xbd, 0x27, 0xf8}}
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gEfiIsaAcpiProtocolGuid = {0x64a892dc, 0x5561, 0x4536, {0x92, 0xc7, 0x79, 0x9b, 0xfc, 0x18, 0x33, 0x55}}
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gEfiIsaIoProtocolGuid = {0x7ee2bd44, 0x3da0, 0x11d4, {0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
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gEfiLegacyBiosProtocolGuid = {0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d}}
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gEfiLegacyBiosPlatformProtocolGuid = {0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x09, 0x07, 0x9c, 0x0c, 0xb4}}
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gEfiLegacyInterruptProtocolGuid = {0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe}}
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gEfiVgaMiniPortProtocolGuid = {0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3}}
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gOvmfLoadedX86LinuxKernelProtocolGuid = {0xa3edc05d, 0xb618, 0x4ff6, {0x95, 0x52, 0x76, 0xd7, 0x88, 0x63, 0x43, 0xc8}}
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[PcdsFixedAtBuild]
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
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## This flag is used to control the destination port for PlatformDebugLibIoPort
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gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
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## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
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# LUNs are retrieved from the host during virtio-scsi setup.
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# MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
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# possible devices. This can take extremely long, for example with
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# MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
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# MaxTarget and MaxLun, independently, should the host report higher values,
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# so that scanning the number of devices given by their product is still
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# acceptably fast.
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gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
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gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
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## Sets the *inclusive* number of targets and LUNs that PvScsi exposes for
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# scan by ScsiBusDxe.
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# As specified above for VirtioScsi, ScsiBusDxe scans all MaxTarget * MaxLun
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# possible devices, which can take extremely long. Thus, the below constants
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# are used so that scanning the number of devices given by their product
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# is still acceptably fast.
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gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x36
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gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x37
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## After PvScsiDxe sends a SCSI request to the device, it waits for
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# the request completion in a polling loop.
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# This constant defines how many micro-seconds to wait between each
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# polling loop iteration.
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gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiWaitForCmpStallInUsecs|5|UINT32|0x38
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## Set the *inclusive* number of targets that MptScsi exposes for scan
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# by ScsiBusDxe.
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gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiMaxTargetLimit|7|UINT8|0x39
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## Microseconds to stall between polling for MptScsi request result
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gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiStallPerPollUsec|5|UINT32|0x3a
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## Set the *inclusive* number of targets and LUNs that LsiScsi exposes for
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# scan by ScsiBusDxe.
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gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxTargetLimit|7|UINT8|0x3b
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gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxLunLimit|0|UINT8|0x3c
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## Microseconds to stall between polling for LsiScsi request result
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gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiStallPerPollUsec|5|UINT32|0x3d
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
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gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
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## Pcd8259LegacyModeMask defines the default mask value for platform. This
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# value is determined.
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# 1) If platform only support pure UEFI, value should be set to 0xFFFF or
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# 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
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# UEFI platform.
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# 2) If platform install CSM and use thunk module:
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# a) If thunk call provided by CSM binary requires some legacy interrupt
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# support, the corresponding bit should be opened as 0.
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# For example, if keyboard interfaces provided CSM binary use legacy
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# keyboard interrupt in 8259 bit 1, then the value should be set to
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# 0xFFFC.
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# b) If all thunk call provied by CSM binary do not require legacy
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# interrupt support, value should be set to 0xFFFF or 0xFFFE.
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#
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# The default value of legacy mode mask could be changed by
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# EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
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# except some special cases such as when initializing the CSM binary, it
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# should be set to 0xFFFF to mask all legacy interrupt. Please restore the
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# original legacy mask value if changing is made for these special case.
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gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3
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## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
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# mode's interrrupt controller.
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# For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
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gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5
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## Indicates if BiosVideo driver will switch to 80x25 Text VGA Mode when
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# exiting boot service.
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# TRUE - Switch to Text VGA Mode.
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# FALSE - Does not switch to Text VGA Mode.
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gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoSetTextVgaModeEnable|FALSE|BOOLEAN|0x28
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## Indicates if BiosVideo driver will check for VESA BIOS Extension service
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# support.
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# TRUE - Check for VESA BIOS Extension service.
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# FALSE - Does not check for VESA BIOS Extension service.
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gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable|TRUE|BOOLEAN|0x29
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## Indicates if BiosVideo driver will check for VGA service support.
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# NOTE: If both PcdBiosVideoCheckVbeEnable and PcdBiosVideoCheckVgaEnable
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# are set to FALSE, that means Graphics Output protocol will not be
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# installed, the VGA miniport protocol will be installed instead.
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# TRUE - Check for VGA service.<BR>
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# FALSE - Does not check for VGA service.<BR>
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gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable|TRUE|BOOLEAN|0x2a
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## Indicates if memory space for legacy region will be set as cacheable.
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# TRUE - Set cachebility for legacy region.
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# FALSE - Does not set cachebility for legacy region.
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gUefiOvmfPkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion|TRUE|BOOLEAN|0x2b
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## Specify memory size with bytes to reserve EBDA below 640K for OPROM.
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# The value should be a multiple of 4KB.
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gUefiOvmfPkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x2c
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## Specify memory base address for OPROM to find free memory.
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# Some OPROMs do not use EBDA or PMM to allocate memory for its usage,
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# instead they find the memory filled with zero from 0x20000.
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# The value should be a multiple of 4KB.
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# The range should be below the EBDA reserved range from
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# (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
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# CONVENTIONAL_MEMORY_TOP.
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gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x2d
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## Specify memory size with bytes for OPROM to find free memory.
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# The value should be a multiple of 4KB. And the range should be below the
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# EBDA reserved range from
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# (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
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# CONVENTIONAL_MEMORY_TOP.
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gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x2e
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## Specify the end of address below 1MB for the OPROM.
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# The last shadowed OpROM should not exceed this address.
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gUefiOvmfPkgTokenSpaceGuid.PcdEndOpromShadowAddress|0xdffff|UINT32|0x2f
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## Specify the low PMM (Post Memory Manager) size with bytes below 1MB.
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# The value should be a multiple of 4KB.
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# @Prompt Low PMM (Post Memory Manager) Size
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gUefiOvmfPkgTokenSpaceGuid.PcdLowPmmMemorySize|0x10000|UINT32|0x30
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## Specify the high PMM (Post Memory Manager) size with bytes above 1MB.
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# The value should be a multiple of 4KB.
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gUefiOvmfPkgTokenSpaceGuid.PcdHighPmmMemorySize|0x400000|UINT32|0x31
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gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|0x0|UINT32|0x17
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gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize|0x0|UINT32|0x32
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|
## Number of page frames to use for storing grant table entries.
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gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames|4|UINT32|0x33
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## Specify the extra page table needed to mark the GHCB as unencrypted.
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# The value should be a multiple of 4KB for each.
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase|0x0|UINT32|0x3e
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize|0x0|UINT32|0x3f
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## The base address of the SEC GHCB page used by SEV-ES.
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|0|UINT32|0x40
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize|0|UINT32|0x41
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|
[PcdsDynamic, PcdsDynamicEx]
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gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
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gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
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|
|
|
## The IO port aperture shared by all PCI root bridges.
|
|
#
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
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|
|
|
## The 32-bit MMIO aperture shared by all PCI root bridges.
|
|
#
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
|
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
|
|
|
|
## The 64-bit MMIO aperture shared by all PCI root bridges.
|
|
#
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
|
|
|
|
## The following setting controls how many megabytes we configure as TSEG on
|
|
# Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
|
|
# cause undefined behavior. During boot, the PCD is updated by PlatformPei
|
|
# to reflect the extended TSEG size, if one is advertized by QEMU.
|
|
#
|
|
# This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
|
|
|
|
## Set to TRUE by PlatformPei if the Q35 board supports the "SMRAM at default
|
|
# SMBASE" feature.
|
|
#
|
|
# This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE|BOOLEAN|0x34
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|
|
|
[PcdsFeatureFlag]
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
|
|
|
|
## This feature flag enables SMM/SMRAM support. Note that it also requires
|
|
# such support from the underlying QEMU instance; if that support is not
|
|
# present, the firmware will reject continuing after a certain point.
|
|
#
|
|
# The flag also acts as a general "security switch"; when TRUE, many
|
|
# components will change behavior, with the goal of preventing a malicious
|
|
# runtime OS from tampering with firmware structures (special memory ranges
|
|
# used by OVMF, the varstore pflash chip, LockBox etc).
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e
|
|
|
|
## Informs modules (including pre-DXE-phase modules) whether the platform
|
|
# firmware contains a CSM (Compatibility Support Module).
|
|
#
|
|
gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|FALSE|BOOLEAN|0x35
|