git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3 6f19259b-4bc3-4df7-8a09-765794883524
		
			
				
	
	
		
			199 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			199 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*++
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| 
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| Copyright (c) 2006, Intel Corporation                                                         
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| All rights reserved. This program and the accompanying materials                          
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| are licensed and made available under the terms and conditions of the BSD License         
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| which accompanies this distribution.  The full text of the license may be found at        
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| http://opensource.org/licenses/bsd-license.php                                            
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|                                                                                           
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| THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
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| WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
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| 
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| Module Name:
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| 
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|     tpl.c
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| 
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| Abstract:
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| 
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|     Task priority function    
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| 
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| --*/
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| 
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| #include <DxeMain.h>
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| 
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| STATIC
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| VOID
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| CoreSetInterruptState (
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|   IN BOOLEAN      Enable
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|   )
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| /*++
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| 
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| Routine Description:
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|   
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|   Set Interrupt State
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|   
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| Arguments:
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|   
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|   Enable - The state of enable or disable interrupt
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|   
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| Returns:
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|   
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|   None
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| 
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| --*/
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| 
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| {
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|   if (gCpu != NULL) {
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|     if (Enable) {
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|       gCpu->EnableInterrupt(gCpu);
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|     } else {
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|       gCpu->DisableInterrupt(gCpu);
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|     }
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|   }
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| }
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| 
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| //
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| // Return the highest set bit
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| //
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| UINTN
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| CoreHighestSetBit (
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|   IN UINTN     Number
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|   )
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| /*++
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| 
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| Routine Description:
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|   
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|   Return the highest set bit
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|   
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| Arguments:
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|   
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|   Number - The value to check
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|   
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| Returns:
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|   
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|   Bit position of the highest set bit
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| 
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| --*/
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| {
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|   UINTN   msb;
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|   
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|   msb = 31;
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|   while ((msb > 0) && ((Number & (UINTN)(1 << msb)) == 0)) {
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|     msb--;
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|   }
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| 
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|   return msb;
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| }
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| 
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| 
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| 
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| EFI_TPL
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| EFIAPI
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| CoreRaiseTpl (
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|   IN EFI_TPL      NewTpl
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|   )
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| /*++
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| 
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| Routine Description:
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| 
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|   Raise the task priority level to the new level.
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|   High level is implemented by disabling processor interrupts.
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| 
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| Arguments:
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| 
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|   NewTpl  - New task priority level
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|     
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| Returns:
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| 
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|   The previous task priority level
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| 
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| --*/
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| {
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|   EFI_TPL     OldTpl;
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| 
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|   OldTpl = gEfiCurrentTpl;
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|   ASSERT (OldTpl <= NewTpl);
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|   ASSERT (VALID_TPL (NewTpl));
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| 
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|   //
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|   // If raising to high level, disable interrupts
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|   //
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|   if (NewTpl >= EFI_TPL_HIGH_LEVEL  &&  OldTpl < EFI_TPL_HIGH_LEVEL) {
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|     CoreSetInterruptState (FALSE);
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|   }
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| 
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|   //
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|   // Set the new value
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|   //
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|   gEfiCurrentTpl = NewTpl;
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| 
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|   return OldTpl;
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| }
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| 
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| 
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| 
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| VOID
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| EFIAPI
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| CoreRestoreTpl (
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|   IN EFI_TPL NewTpl
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|   )
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| /*++
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| 
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| Routine Description:
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| 
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|   Lowers the task priority to the previous value.   If the new 
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|   priority unmasks events at a higher priority, they are dispatched.
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| 
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| Arguments:
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| 
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|   NewTpl  - New, lower, task priority
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|     
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| Returns:
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| 
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|   None
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| 
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| --*/
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| {
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|   EFI_TPL     OldTpl;
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| 
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|   OldTpl = gEfiCurrentTpl;
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|   ASSERT (NewTpl <= OldTpl);
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|   ASSERT (VALID_TPL (NewTpl));
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| 
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|   //
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|   // If lowering below HIGH_LEVEL, make sure
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|   // interrupts are enabled
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|   //
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| 
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|   if (OldTpl >= EFI_TPL_HIGH_LEVEL  &&  NewTpl < EFI_TPL_HIGH_LEVEL) {
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|     gEfiCurrentTpl = EFI_TPL_HIGH_LEVEL;  
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|   }
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| 
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|   //
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|   // Dispatch any pending events
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|   //
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| 
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|   while ((-2 << NewTpl) & gEventPending) {
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|     gEfiCurrentTpl = CoreHighestSetBit (gEventPending);
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|     if (gEfiCurrentTpl < EFI_TPL_HIGH_LEVEL) {
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|       CoreSetInterruptState (TRUE);
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|     }
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|     CoreDispatchEventNotifies (gEfiCurrentTpl);
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|   }
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| 
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|   //
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|   // Set the new value
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|   //
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| 
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|   gEfiCurrentTpl = NewTpl;
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| 
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|   //
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|   // If lowering below HIGH_LEVEL, make sure
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|   // interrupts are enabled
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|   //
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|   if (gEfiCurrentTpl < EFI_TPL_HIGH_LEVEL) {
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|     CoreSetInterruptState (TRUE);
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|   }
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| 
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| }
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