375683654d
The Generic ACPI for Arm Components 1.0 Platform Design
Document, s2.6.4 "ASL code examples" provides information
to describe an Arm CoreLink CMN-600 Coherent Mesh Network
using an ASL definition block table.
The SSDT CMN-600 Table Generator uses the Configuration
Manager protocol to obtain the following information about
the CMN-600 device on the platform:
- the PERIPHBASE address location and address range;
- the ROOTNODEBASE address location;
- the number of Debug and Trace Controller (DTC)
and their respective interrupt number;
The CMN-600 mesh is described using the CM_ARM_CMN_600_INFO
and CM_ARM_EXTENDED_INTERRUPT structures in the Configuration
Manager.
The SSDT CMN-600 Table generator:
- gets the CMN-600 hardware information
from the configuration manager.
- uses the AmlLib interfaces to parse the AML
template BLOB and construct an AML tree.
- uses the AmlLib to update:
- the "_UID" value;
- the address location and range of the PERIPHBASE;
- the address location of the ROOTNODEBASE;
- the number of Debug and Trace Controller (DTC)
and their respective interrupt number;
- serializes the AML tree to an output buffer.
This output buffer contains the fixed-up AML code,
which is then installed as an ACPI SSDT table.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Co-authored-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
82 lines
3.6 KiB
Plaintext
82 lines
3.6 KiB
Plaintext
/** @file
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SSDT CMN-600 Template
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Copyright (c) 2020, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Reference(s):
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- Arm CoreLink CMN-600 Coherent Mesh Network Technical Reference Manual r3p0
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- Generic ACPI for Arm Components 1.0 Platform Design Document
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@par Glossary:
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- {template} - Data fixed up using AML Fixup APIs.
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- {codegen} - Data generated using AML Codegen APIs.
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**/
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DefinitionBlock ("SsdtCmn600.aml", "SSDT", 2, "ARMLTD", "CMN-600", 1) {
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Scope (_SB) {
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// CMN-600 device object for a X * Y mesh, where (X >= 4) || (Y >= 4).
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Device (CMN0) { // {template}
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Name (_HID, "ARMHC600")
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Name (_UID, 0x0) // {template}
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Name (_CRS, ResourceTemplate () {
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// Descriptor for 256 MB of the CFG region at offset PERIPHBASE.
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QWordMemory (
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ResourceConsumer, // bit 0 of general flags is 0.
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PosDecode,
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MinFixed, // Range is fixed.
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MaxFixed, // Range is Fixed.
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NonCacheable,
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ReadWrite,
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0x00000000, // Granularity
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0xA0000000, // MinAddress // {template}
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0xAFFFFFFF, // MaxAddress // {template}
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0x00000000, // Translation
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0x10000000, // RangeLength // {template}
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, // ResourceSourceIndex
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, // ResourceSource
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CFGR // DescriptorName
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) // QWordMemory
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// Descriptor for the root node. This is a 16 KB region at offset
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// ROOTNODEBASE. In this example, ROOTNODEBASE starts at the 16 KB
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// aligned offset of PERIPHBASE.
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QWordMemory (
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ResourceConsumer, // bit 0 of general flags is 0.
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PosDecode,
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MinFixed, // Range is fixed.
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MaxFixed, // Range is Fixed.
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NonCacheable,
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ReadWrite,
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0x00000000, // Granularity
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0xA0000000, // MinAddress // {template}
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0xAFFFFFFF, // MaxAddress // {template}
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0x00000000, // Translation
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0x10000000, // RangeLength // {template}
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, // ResourceSourceIndex
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, // ResourceSource
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ROOT // DescriptorName
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) // QWordMemory
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// The Interrupt information is generated using AmlCodegen.
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// Interrupt on PMU0 overflow, attached to DTC [0], with GSIV = <gsiv0>.
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//
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// Interrupt ( // {codegen}
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// ResourceConsumer, // ResourceUsage
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// Level, // EdgeLevel
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// ActiveHigh, // ActiveLevel
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// Exclusive, // Shared
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// , // ResourceSourceIndex
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// , // ResourceSource
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// // DescriptorName
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// ) {
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// 0xA5 // <gsiv0 >
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// } // Interrupt
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}) // Name
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} // Device
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} // _SB
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} // DefinitionBlock
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