7c4ab1c2ef
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3100 It is not necessary to have a PEI phase in the UEFI payload since no specific PEI task is required. This patch adds a UefiPayloadEntry driver to get UEFI Payload required information from the bootloaders, convert them into a HOB list, load DXE core and transfer control to it. Here is the change details: 1) Removed PEI phase, including Peicore, BlSupportPei, SecCore, etc. 2) Added UefiPayloadEntry driver. this is the only driver before DXE core. 3) Added Pure X64 support, dropped Pure IA32 (Could add later if required) 64bit payload with 32bit entry point is still supported. 4) Use one DSC file UefiPayloadPkg.dsc to support X64 and IA32X64 build. Removed UefiPayloadIa32.dsc and UefiPayloadIa32X64.dsc Tested with SBL and coreboot on QEMU. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
72 lines
1.8 KiB
NASM
72 lines
1.8 KiB
NASM
;/** @file
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;
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; IDT vector entry.
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;
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; Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;**/
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SECTION .text
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;
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;------------------------------------------------------------------------------
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; Generic IDT Vector Handlers for the Host.
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;
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;------------------------------------------------------------------------------
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ALIGN 8
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global ASM_PFX(AsmGetVectorTemplatInfo)
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global ASM_PFX(AsmVectorFixup)
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@VectorTemplateBase:
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push eax
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db 0x6a ; push #VectorNumber
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@VectorNum:
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db 0
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mov eax, CommonInterruptEntry
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jmp eax
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@VectorTemplateEnd:
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global ASM_PFX(AsmGetVectorTemplatInfo)
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ASM_PFX(AsmGetVectorTemplatInfo):
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mov ecx, [esp + 4]
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mov dword [ecx], @VectorTemplateBase
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mov eax, (@VectorTemplateEnd - @VectorTemplateBase)
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ret
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global ASM_PFX(AsmVectorFixup)
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ASM_PFX(AsmVectorFixup):
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mov eax, dword [esp + 8]
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mov ecx, [esp + 4]
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mov [ecx + (@VectorNum - @VectorTemplateBase)], al
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ret
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;---------------------------------------;
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; CommonInterruptEntry ;
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;---------------------------------------;
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; The follow algorithm is used for the common interrupt routine.
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;
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; +---------------------+ <-- 16-byte aligned ensured by processor
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; + Old SS +
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; +---------------------+
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; + Old RSP +
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; +---------------------+
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; + RFlags +
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; +---------------------+
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; + CS +
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; +---------------------+
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; + RIP +
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; +---------------------+
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; + Error Code +
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; +---------------------+
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; + Vector Number +
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; +---------------------+
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CommonInterruptEntry:
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cli
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jmp $
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