5f0a17d83a
From Intel(R) 64 and IA-32 Architectures Software Developer's Manual, one lock or semaphore is suggested to be present within a cache line. If the processors are based on Intel NetBurst microarchitecture, two cache lines are suggested. This could minimize the bus traffic required to service locks. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
154 lines
4.9 KiB
C
154 lines
4.9 KiB
C
/** @file
|
|
Declaration of internal functions in BaseSynchronizationLib.
|
|
|
|
Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
|
|
This program and the accompanying materials
|
|
are licensed and made available under the terms and conditions of the BSD License
|
|
which accompanies this distribution. The full text of the license may be found at
|
|
http://opensource.org/licenses/bsd-license.php.
|
|
|
|
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
|
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
|
|
|
**/
|
|
|
|
#ifndef __BASE_SYNCHRONIZATION_LIB_INTERNALS__
|
|
#define __BASE_SYNCHRONIZATION_LIB_INTERNALS__
|
|
|
|
#include <Base.h>
|
|
#include <Library/SynchronizationLib.h>
|
|
#include <Library/BaseLib.h>
|
|
#include <Library/DebugLib.h>
|
|
#include <Library/TimerLib.h>
|
|
#include <Library/PcdLib.h>
|
|
|
|
/**
|
|
Performs an atomic increment of an 32-bit unsigned integer.
|
|
|
|
Performs an atomic increment of the 32-bit unsigned integer specified by
|
|
Value and returns the incremented value. The increment operation must be
|
|
performed using MP safe mechanisms. The state of the return value is not
|
|
guaranteed to be MP safe.
|
|
|
|
@param Value A pointer to the 32-bit value to increment.
|
|
|
|
@return The incremented value.
|
|
|
|
**/
|
|
UINT32
|
|
EFIAPI
|
|
InternalSyncIncrement (
|
|
IN volatile UINT32 *Value
|
|
);
|
|
|
|
|
|
/**
|
|
Performs an atomic decrement of an 32-bit unsigned integer.
|
|
|
|
Performs an atomic decrement of the 32-bit unsigned integer specified by
|
|
Value and returns the decrement value. The decrement operation must be
|
|
performed using MP safe mechanisms. The state of the return value is not
|
|
guaranteed to be MP safe.
|
|
|
|
@param Value A pointer to the 32-bit value to decrement.
|
|
|
|
@return The decrement value.
|
|
|
|
**/
|
|
UINT32
|
|
EFIAPI
|
|
InternalSyncDecrement (
|
|
IN volatile UINT32 *Value
|
|
);
|
|
|
|
|
|
/**
|
|
Performs an atomic compare exchange operation on a 16-bit unsigned integer.
|
|
|
|
Performs an atomic compare exchange operation on the 16-bit unsigned integer
|
|
specified by Value. If Value is equal to CompareValue, then Value is set to
|
|
ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
|
|
then Value is returned. The compare exchange operation must be performed using
|
|
MP safe mechanisms.
|
|
|
|
@param Value A pointer to the 16-bit value for the compare exchange
|
|
operation.
|
|
@param CompareValue A 16-bit value used in compare operation.
|
|
@param ExchangeValue A 16-bit value used in exchange operation.
|
|
|
|
@return The original *Value before exchange.
|
|
|
|
**/
|
|
UINT16
|
|
EFIAPI
|
|
InternalSyncCompareExchange16 (
|
|
IN volatile UINT16 *Value,
|
|
IN UINT16 CompareValue,
|
|
IN UINT16 ExchangeValue
|
|
);
|
|
|
|
|
|
/**
|
|
Performs an atomic compare exchange operation on a 32-bit unsigned integer.
|
|
|
|
Performs an atomic compare exchange operation on the 32-bit unsigned integer
|
|
specified by Value. If Value is equal to CompareValue, then Value is set to
|
|
ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
|
|
then Value is returned. The compare exchange operation must be performed using
|
|
MP safe mechanisms.
|
|
|
|
@param Value A pointer to the 32-bit value for the compare exchange
|
|
operation.
|
|
@param CompareValue A 32-bit value used in compare operation.
|
|
@param ExchangeValue A 32-bit value used in exchange operation.
|
|
|
|
@return The original *Value before exchange.
|
|
|
|
**/
|
|
UINT32
|
|
EFIAPI
|
|
InternalSyncCompareExchange32 (
|
|
IN volatile UINT32 *Value,
|
|
IN UINT32 CompareValue,
|
|
IN UINT32 ExchangeValue
|
|
);
|
|
|
|
|
|
/**
|
|
Performs an atomic compare exchange operation on a 64-bit unsigned integer.
|
|
|
|
Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
|
|
by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
|
|
CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
|
|
The compare exchange operation must be performed using MP safe mechanisms.
|
|
|
|
@param Value A pointer to the 64-bit value for the compare exchange
|
|
operation.
|
|
@param CompareValue A 64-bit value used in compare operation.
|
|
@param ExchangeValue A 64-bit value used in exchange operation.
|
|
|
|
@return The original *Value before exchange.
|
|
|
|
**/
|
|
UINT64
|
|
EFIAPI
|
|
InternalSyncCompareExchange64 (
|
|
IN volatile UINT64 *Value,
|
|
IN UINT64 CompareValue,
|
|
IN UINT64 ExchangeValue
|
|
);
|
|
|
|
/**
|
|
Internal function to retrieve the architecture specific spin lock alignment
|
|
requirements for optimal spin lock performance.
|
|
|
|
@return The architecture specific spin lock alignment.
|
|
|
|
**/
|
|
UINTN
|
|
InternalGetSpinLockProperties (
|
|
VOID
|
|
);
|
|
|
|
#endif
|