REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the ArmPlatformPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Andrew Fish <afish@apple.com>
		
			
				
	
	
		
			175 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			175 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /** @file
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|   This file contains the platform independent parts of HdLcd
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| 
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|   Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
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| 
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|   SPDX-License-Identifier: BSD-2-Clause-Patent
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| 
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| **/
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| 
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| #include <Library/DebugLib.h>
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| #include <Library/IoLib.h>
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| #include <Library/LcdHwLib.h>
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| #include <Library/LcdPlatformLib.h>
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| #include <Library/MemoryAllocationLib.h>
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| #include <Library/PcdLib.h>
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| 
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| #include "HdLcd.h"
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| 
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| #define BYTES_PER_PIXEL  4
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| 
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| /** Initialize display.
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| 
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|   @param[in]  VramBaseAddress    Address of the framebuffer.
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| 
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|   @retval EFI_SUCCESS            Display initialization successful.
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| **/
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| EFI_STATUS
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| LcdInitialize (
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|   IN EFI_PHYSICAL_ADDRESS  VramBaseAddress
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|   )
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| {
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|   // Disable the controller
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|   MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
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| 
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|   // Disable all interrupts
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|   MmioWrite32 (HDLCD_REG_INT_MASK, 0);
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| 
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|   // Define start of the VRAM. This never changes for any graphics mode
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|   MmioWrite32 (HDLCD_REG_FB_BASE, (UINT32)VramBaseAddress);
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| 
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|   // Setup various registers that never change
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|   MmioWrite32 (HDLCD_REG_BUS_OPTIONS, (4 << 8) | HDLCD_BURST_8);
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| 
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|   MmioWrite32 (HDLCD_REG_POLARITIES, HDLCD_DEFAULT_POLARITIES);
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| 
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|   MmioWrite32 (
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|     HDLCD_REG_PIXEL_FORMAT,
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|     HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL
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|     );
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| 
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|   return EFI_SUCCESS;
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| }
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| 
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| /** Set requested mode of the display.
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| 
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|   @param[in] ModeNumber          Display mode number.
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| 
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|   @retval EFI_SUCCESS            Display mode set successfully.
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|   @retval !(EFI_SUCCESS)         Other errors.
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| **/
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| EFI_STATUS
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| LcdSetMode (
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|   IN UINT32  ModeNumber
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|   )
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| {
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|   EFI_STATUS    Status;
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|   SCAN_TIMINGS  *Horizontal;
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|   SCAN_TIMINGS  *Vertical;
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| 
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|   EFI_GRAPHICS_PIXEL_FORMAT  PixelFormat;
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| 
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|   EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  ModeInfo;
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| 
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|   // Set the video mode timings and other relevant information
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|   Status = LcdPlatformGetTimings (
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|              ModeNumber,
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|              &Horizontal,
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|              &Vertical
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|              );
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|   if (EFI_ERROR (Status)) {
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|     ASSERT_EFI_ERROR (Status);
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|     return Status;
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|   }
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| 
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|   ASSERT (Horizontal != NULL);
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|   ASSERT (Vertical != NULL);
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| 
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|   // Get the pixel format information.
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|   Status = LcdPlatformQueryMode (ModeNumber, &ModeInfo);
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|   if (EFI_ERROR (Status)) {
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|     ASSERT_EFI_ERROR (Status);
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|     return Status;
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|   }
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| 
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|   // By default PcdArmHdLcdSwapBlueRedSelect is set to false
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|   // However on the Juno platform HW lines for BLUE and RED are swapped
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|   // Therefore PcdArmHdLcdSwapBlueRedSelect is set to TRUE for the Juno platform
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|   PixelFormat = FixedPcdGetBool (PcdArmHdLcdSwapBlueRedSelect)
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|                 ? PixelRedGreenBlueReserved8BitPerColor
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|                 : PixelBlueGreenRedReserved8BitPerColor;
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| 
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|   if (ModeInfo.PixelFormat == PixelFormat) {
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|     MmioWrite32 (HDLCD_REG_RED_SELECT, (8 << 8) | 16);
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|     MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 0);
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|   } else {
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|     MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 16);
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|     MmioWrite32 (HDLCD_REG_RED_SELECT, (8 << 8) | 0);
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|   }
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| 
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|   MmioWrite32 (HDLCD_REG_GREEN_SELECT, (8 << 8) | 8);
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| 
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|   // Disable the controller
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|   MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
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| 
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|   // Update the frame buffer information with the new settings
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|   MmioWrite32 (
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|     HDLCD_REG_FB_LINE_LENGTH,
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|     Horizontal->Resolution * BYTES_PER_PIXEL
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|     );
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| 
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|   MmioWrite32 (
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|     HDLCD_REG_FB_LINE_PITCH,
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|     Horizontal->Resolution * BYTES_PER_PIXEL
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|     );
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| 
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|   MmioWrite32 (HDLCD_REG_FB_LINE_COUNT, Vertical->Resolution - 1);
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| 
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|   // Set the vertical timing information
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|   MmioWrite32 (HDLCD_REG_V_SYNC, Vertical->Sync);
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|   MmioWrite32 (HDLCD_REG_V_BACK_PORCH, Vertical->BackPorch);
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|   MmioWrite32 (HDLCD_REG_V_DATA, Vertical->Resolution - 1);
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|   MmioWrite32 (HDLCD_REG_V_FRONT_PORCH, Vertical->FrontPorch);
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| 
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|   // Set the horizontal timing information
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|   MmioWrite32 (HDLCD_REG_H_SYNC, Horizontal->Sync);
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|   MmioWrite32 (HDLCD_REG_H_BACK_PORCH, Horizontal->BackPorch);
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|   MmioWrite32 (HDLCD_REG_H_DATA, Horizontal->Resolution - 1);
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|   MmioWrite32 (HDLCD_REG_H_FRONT_PORCH, Horizontal->FrontPorch);
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| 
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|   // Enable the controller
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|   MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_ENABLE);
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| 
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|   return EFI_SUCCESS;
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| }
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| 
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| /** De-initializes the display.
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| **/
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| VOID
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| LcdShutdown (
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|   VOID
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|   )
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| {
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|   // Disable the controller
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|   MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
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| }
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| 
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| /** Check for presence of HDLCD.
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| 
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|   @retval EFI_SUCCESS            Returns success if platform implements a HDLCD
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|                                  controller.
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|   @retval EFI_NOT_FOUND          HDLCD display controller not found on the
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|                                  platform.
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| **/
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| EFI_STATUS
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| LcdIdentify (
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|   VOID
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|   )
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| {
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|   if ((MmioRead32 (HDLCD_REG_VERSION) >> 16) == HDLCD_PRODUCT_ID) {
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|     return EFI_SUCCESS;
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|   }
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| 
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|   return EFI_NOT_FOUND;
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| }
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