sravan/system76-embedded-controller
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Fix style

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This commit is contained in:
Jeremy Soller
2023-02-22 21:01:49 -07:00
parent 6b80721138
commit 35d3c4f161
2 changed files with 9 additions and 9 deletions
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4
src/board/system76/common/peci.c
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@ -72,7 +72,7 @@ bool peci_available(void) {
}
// Returns true on success, false on error
bool peci_get_temp(int16_t * data) {
bool peci_get_temp(int16_t *data) {
//TODO: Wait for completion?
// Clear upstream status
ESUCTRL0 = ESUCTRL0;
@ -226,7 +226,7 @@ bool peci_available(void) {
}
// Returns true on success, false on error
bool peci_get_temp(int16_t * data) {
bool peci_get_temp(int16_t *data) {
// Wait for completion
while (HOSTAR & 1) {}
// Clear status

14
src/ec/ite/include/ec/espi.h
View File

@ -112,15 +112,15 @@ volatile uint8_t __xdata __at(0x31A3) ESGCTRL3;
// Upstream flags
volatile uint8_t __xdata __at(0x31B0) ESUCTRL0;
#define ESUCTRL0_ENABLE BIT(7)
#define ESUCTRL0_GO BIT(6)
#define ESUCTRL0_DONE BIT(1)
#define ESUCTRL0_BUSY BIT(0)
#define ESUCTRL0_ENABLE BIT(7)
#define ESUCTRL0_GO BIT(6)
#define ESUCTRL0_DONE BIT(1)
#define ESUCTRL0_BUSY BIT(0)
// Upstream cycle type
volatile uint8_t __xdata __at(0x31B1) ESUCTRL1;
// OOB message
#define ESUCTRL1_OOB 0x07
// OOB message
#define ESUCTRL1_OOB 0x07
// Upstream tag @ [7:4], upstream length [11:8] @ [3:0]
volatile uint8_t __xdata __at(0x31B2) ESUCTRL2;
@ -136,7 +136,7 @@ volatile uint8_t __xdata __at(0x31B8) ESUCTRL8;
// PUT_OOB status
volatile uint8_t __xdata __at(0x31C0) ESOCTRL0;
#define ESOCTRL0_STATUS BIT(7)
#define ESOCTRL0_STATUS BIT(7)
volatile uint8_t __xdata __at(0x31C1) ESOCTRL1;