diff --git a/src/board/system76/gaze17-3050/gpio.c b/src/board/system76/gaze17-3050/gpio.c
index cedd4ee..f2a869f 100644
--- a/src/board/system76/gaze17-3050/gpio.c
+++ b/src/board/system76/gaze17-3050/gpio.c
@@ -25,6 +25,7 @@ struct Gpio __code PCH_DPWROK_EC =  GPIO(H, 4);
 struct Gpio __code PCH_PWROK_EC =   GPIO(F, 3);
 struct Gpio __code PWR_BTN_N =      GPIO(D, 5);
 struct Gpio __code PWR_SW_N =       GPIO(B, 3);
+struct Gpio __code SLP_S0_N =       GPIO(C, 6); // XXX: Really CPU_C10_GATE#
 struct Gpio __code SLP_SUS_N =      GPIO(J, 4);
 struct Gpio __code SUSB_N_PCH =     GPIO(H, 6);
 struct Gpio __code SUSC_N_PCH =     GPIO(H, 1);
diff --git a/src/board/system76/gaze17-3050/include/board/gpio.h b/src/board/system76/gaze17-3050/include/board/gpio.h
index 63c0f35..3bd764a 100644
--- a/src/board/system76/gaze17-3050/include/board/gpio.h
+++ b/src/board/system76/gaze17-3050/include/board/gpio.h
@@ -32,6 +32,7 @@ extern struct Gpio __code PCH_PWROK_EC;
 #define HAVE_PM_PWROK 0
 extern struct Gpio __code PWR_BTN_N;
 extern struct Gpio __code PWR_SW_N;
+extern struct Gpio __code SLP_S0_N;
 extern struct Gpio __code SLP_SUS_N;
 #define HAVE_SUS_PWR_ACK 0
 extern struct Gpio __code SUSB_N_PCH;
diff --git a/src/board/system76/gaze17-3060/gpio.c b/src/board/system76/gaze17-3060/gpio.c
index 9aad360..fab4e9a 100644
--- a/src/board/system76/gaze17-3060/gpio.c
+++ b/src/board/system76/gaze17-3060/gpio.c
@@ -25,6 +25,7 @@ struct Gpio __code PCH_DPWROK_EC =  GPIO(F, 3);
 struct Gpio __code PCH_PWROK_EC =   GPIO(C, 6);
 struct Gpio __code PWR_BTN_N =      GPIO(D, 5);
 struct Gpio __code PWR_SW_N =       GPIO(B, 3);
+struct Gpio __code SLP_S0_N =       GPIO(J, 2); // XXX: Really CPU_C10_GATE#
 struct Gpio __code SLP_SUS_N =      GPIO(J, 7);
 struct Gpio __code SUSB_N_PCH =     GPIO(H, 6);
 struct Gpio __code SUSC_N_PCH =     GPIO(H, 1);
diff --git a/src/board/system76/gaze17-3060/include/board/gpio.h b/src/board/system76/gaze17-3060/include/board/gpio.h
index 63c0f35..3bd764a 100644
--- a/src/board/system76/gaze17-3060/include/board/gpio.h
+++ b/src/board/system76/gaze17-3060/include/board/gpio.h
@@ -32,6 +32,7 @@ extern struct Gpio __code PCH_PWROK_EC;
 #define HAVE_PM_PWROK 0
 extern struct Gpio __code PWR_BTN_N;
 extern struct Gpio __code PWR_SW_N;
+extern struct Gpio __code SLP_S0_N;
 extern struct Gpio __code SLP_SUS_N;
 #define HAVE_SUS_PWR_ACK 0
 extern struct Gpio __code SUSB_N_PCH;