diff --git a/src/board/system76/darp8/board.c b/src/board/system76/darp8/board.c new file mode 100644 index 0000000..1c88148 --- /dev/null +++ b/src/board/system76/darp8/board.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#include +#include +#include +#include +#include + +void board_init(void) { + espi_init(); + + // Make sure charger is in off state, also enables PSYS + battery_charger_disable(); + + // Allow CPU to boot + gpio_set(&SB_KBCRST_N, true); + // Allow backlight to be turned on + gpio_set(&BKL_EN, true); + // Enable camera + gpio_set(&CCD_EN, true); + // Enable wireless + gpio_set(&WLAN_EN, true); + gpio_set(&WLAN_PWR_EN, true); + // Assert SMI# and SWI# + gpio_set(&SMI_N, true); + gpio_set(&SWI_N, true); +} + +void board_event(void) { + espi_event(); + + ec_read_post_codes(); +} diff --git a/src/board/system76/darp8/board.mk b/src/board/system76/darp8/board.mk new file mode 100644 index 0000000..31c0aec --- /dev/null +++ b/src/board/system76/darp8/board.mk @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: GPL-3.0-only + +EC=it5570e + +# Enable eSPI +CFLAGS+=-DEC_ESPI=1 + +# Include keyboard +KEYBOARD=15in_102 + +# Set keyboard LED mechanism +KBLED=rgb_pwm + +# Set battery I2C bus +CFLAGS+=-DI2C_SMBUS=I2C_4 + +# Set touchpad PS2 bus +CFLAGS+=-DPS2_TOUCHPAD=PS2_3 + +# Set smart charger parameters +# Adapter input current = 4.74A +# PRS1 = 0.010 ohm. Divide adapter input current by 2. +# PRS2 = 0.010 ohm. Use desired charge current. +CHARGER=oz26786 +CFLAGS+=\ + -DCHARGER_CHARGE_CURRENT=0xB80 \ + -DCHARGER_CHARGE_VOLTAGE=8800 \ + -DCHARGER_INPUT_CURRENT=0x900 + +# Add system76 common code +include src/board/system76/common/common.mk diff --git a/src/board/system76/darp8/gpio.c b/src/board/system76/darp8/gpio.c new file mode 100644 index 0000000..6ffeae2 --- /dev/null +++ b/src/board/system76/darp8/gpio.c @@ -0,0 +1,297 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#include +#include +#include + +// clang-format off +struct Gpio __code ACIN_N = GPIO(B, 0); +struct Gpio __code AC_PRESENT = GPIO(E, 1); +struct Gpio __code ALL_SYS_PWRGD = GPIO(C, 0); +struct Gpio __code BKL_EN = GPIO(H, 2); +struct Gpio __code BUF_PLT_RST_N = GPIO(D, 2); // renamed to EC_ERST# +struct Gpio __code CCD_EN = GPIO(D, 1); +struct Gpio __code CPU_C10_GATE_N = GPIO(D, 3); +struct Gpio __code DD_ON = GPIO(E, 4); +struct Gpio __code EC_EN = GPIO(B, 6); // renamed to SUSBC_EC# +struct Gpio __code EC_RSMRST_N = GPIO(E, 5); +struct Gpio __code LAN_WAKEUP_N = GPIO(H, 4); +struct Gpio __code LED_ACIN = GPIO(C, 7); +struct Gpio __code LED_BAT_CHG = GPIO(H, 5); +struct Gpio __code LED_BAT_FULL = GPIO(J, 0); +struct Gpio __code LED_PWR = GPIO(D, 0); +struct Gpio __code LID_SW_N = GPIO(B, 1); +struct Gpio __code PCH_DPWROK_EC = GPIO(B, 2); +struct Gpio __code PCH_PWROK_EC = GPIO(A, 4); +struct Gpio __code PWR_BTN_N = GPIO(D, 5); +struct Gpio __code PWR_SW_N = GPIO(B, 3); +struct Gpio __code SB_KBCRST_N = GPIO(E, 6); +struct Gpio __code SLP_S0_N = GPIO(J, 3); +struct Gpio __code SLP_SUS_N = GPIO(J, 7); +struct Gpio __code SMI_N = GPIO(D, 4); +struct Gpio __code SUSB_N_PCH = GPIO(H, 6); +struct Gpio __code SUSC_N_PCH = GPIO(H, 1); +struct Gpio __code SWI_N = GPIO(B, 5); +struct Gpio __code VA_EC_EN = GPIO(J, 4); +struct Gpio __code WLAN_EN = GPIO(F, 3); +struct Gpio __code WLAN_PWR_EN = GPIO(G, 1); +struct Gpio __code XLP_OUT = GPIO(B, 4); +// clange-format on + +void gpio_init(void) { + // PWRSW WDT 2 Enable 2 + //GCR9 = BIT(5); + // PWRSW WDT 2 Enable 1 + //GCR8 = BIT(4); + + // Enable LPC reset on GPD2 + GCR = 0b10 << 1; + // Disable UARTs + GCR6 = 0; + // Enable SMBus channel 4 + GCR15 = BIT(4); + // Set GPD2 to 1.8V + GCR19 = BIT(0); + // Set GPF2 and GPF3 to 3.3V + GCR20 = 0; + + // Not documented + //GCR22 = BIT(7); + // Set GPM6 power domain to VCC + //GCR23 = BIT(0); + + // Set GPIO data + GPDRA = 0; + // XLP_OUT, PWR_SW#, PCH_DPWROK_EC + GPDRB = BIT(4) | BIT(3) | BIT(2); + GPDRC = 0; + // PWR_BTN#, SMI# + GPDRD = BIT(5) | BIT(4); + // USB_PWR_EN + GPDRE = BIT(3); + // H_PECI + GPDRF = BIT(6); + // H_PROCHOT_EC# + GPDRG = BIT(6); + GPDRH = 0; + GPDRI = 0; + // KBC_MUTE# + GPDRJ = BIT(1); + GPDRM = 0; + + // Set GPIO control + // EC_PWM_LEDKB_P + GPCRA0 = GPIO_ALT; + // KBC_BEEP + GPCRA1 = GPIO_ALT; + // CPU_FAN + GPCRA2 = GPIO_ALT; + // JACK_IN#_EC + GPCRA3 = GPIO_IN; + // PCH_PWROK_EC + GPCRA4 = GPIO_OUT | GPIO_UP; + // EC_PWM_LEDKB_R + GPCRA5 = GPIO_ALT; + // EC_PWM_LEDKB_G + GPCRA6 = GPIO_ALT; + // EC_PWM_LEDKB_B + GPCRA7 = GPIO_ALT; + // AC_IN# + GPCRB0 = GPIO_IN | GPIO_UP; + // LID_SW# + GPCRB1 = GPIO_IN | GPIO_UP; + // PCH_DPWROK_EC + GPCRB2 = GPIO_OUT | GPIO_UP; + // PWR_SW# + GPCRB3 = GPIO_IN; + // XLP_OUT + GPCRB4 = GPIO_OUT; + // SWI# + GPCRB5 = GPIO_OUT | GPIO_UP; + // SUSBC_EC# + GPCRB6 = GPIO_OUT | GPIO_UP; + // Does not exist + GPCRB7 = GPIO_IN | GPIO_DOWN; + // ALL_SYS_PWRGD + GPCRC0 = GPIO_IN; + // SMC_VGA_THERM + GPCRC1 = GPIO_ALT | GPIO_UP; + // SMD_VGA_THERM + GPCRC2 = GPIO_ALT | GPIO_UP; + // KB-SO16 + GPCRC3 = GPIO_IN; + // CNVI_DET# + GPCRC4 = GPIO_IN | GPIO_UP; + // KB-SO17 + GPCRC5 = GPIO_IN; + // Not connected + GPCRC6 = GPIO_IN | GPIO_DOWN; + // LED_ACIN + GPCRC7 = GPIO_OUT | GPIO_UP; + // LED_PWR + GPCRD0 = GPIO_OUT | GPIO_UP; + // CCD_EN + GPCRD1 = GPIO_OUT | GPIO_UP; + // EC_ERST# + GPCRD2 = GPIO_ALT; + // CPU_C10_GATE# + GPCRD3 = GPIO_IN | GPIO_DOWN; + // SMI# + GPCRD4 = GPIO_IN; + // PWR_BTN# + GPCRD5 = GPIO_OUT | GPIO_UP; + // CPU_FANSEN + GPCRD6 = GPIO_ALT; + // SINK_CTRL_EC + GPCRD7 = GPIO_IN; + // SMC_BAT + GPCRE0 = GPIO_ALT; + // AC_PRESENT + GPCRE1 = GPIO_OUT | GPIO_UP; + // RGBKB-DET# + GPCRE2 = GPIO_IN | GPIO_UP; + // USB_PWR_EN + GPCRE3 = GPIO_OUT; + // DD_ON + GPCRE4 = GPIO_OUT | GPIO_DOWN; + // EC_RSMRST# + GPCRE5 = GPIO_OUT; + // SB_KBCRST# + GPCRE6 = GPIO_IN; + // SMD_BAT + GPCRE7 = GPIO_ALT; + // 80CLK + GPCRF0 = GPIO_IN; + // USB_CHARGE_EN + GPCRF1 = GPIO_OUT | GPIO_UP; + // 3IN1 + GPCRF2 = GPIO_IN | GPIO_UP; + // WLAN_EN + GPCRF3 = GPIO_OUT | GPIO_UP; + // TP_CLK + GPCRF4 = GPIO_ALT; + // TP_DATA + GPCRF5 = GPIO_ALT; + // H_PECI + GPCRF6 = GPIO_ALT; + // CC_EN + GPCRF7 = GPIO_IN | GPIO_UP; + // VCCIN_AUX_PG + GPCRG0 = GPIO_IN; + // WLAN_PWR_EN + GPCRG1 = GPIO_OUT | GPIO_UP; + // AUTO_LOAD_PWR + GPCRG2 = GPIO_IN; + // ALSPI_CE# + GPCRG3 = GPIO_ALT; + // ALSPI_MSI + GPCRG4 = GPIO_ALT; + // ALSPI_MSO + GPCRG5 = GPIO_ALT; + // H_PROCHOT_EC# + GPCRG6 = GPIO_OUT | GPIO_UP; + // ALSPI_SCLK + GPCRG7 = GPIO_ALT; + // EC_GPIO + GPCRH0 = GPIO_IN; + // SUSC#_PCH + GPCRH1 = GPIO_IN; + // BKL_EN + GPCRH2 = GPIO_OUT | GPIO_UP; + // PCIE_WAKE# + GPCRH3 = GPIO_IN; + // EC_LAN_WAKEUP# + GPCRH4 = GPIO_IN | GPIO_UP; + // LED_BAT_CHG + GPCRH5 = GPIO_OUT | GPIO_UP; + // SUSB#_PCH + GPCRH6 = GPIO_IN; + // Not connected + GPCRH7 = GPIO_IN | GPIO_DOWN; + // BAT_DET + GPCRI0 = GPIO_ALT; + // BAT_VOLT + GPCRI1 = GPIO_ALT; + // ME_WE + GPCRI2 = GPIO_OUT; + // THERM_VOLT_CPU + GPCRI3 = GPIO_ALT; + // TOTAL_CUR + GPCRI4 = GPIO_ALT; + // USB_CC1 + GPCRI5 = GPIO_ALT; + // USB_CC2 + GPCRI6 = GPIO_ALT; + // MODEL_ID + GPCRI7 = GPIO_IN; + // LED_BAT_FULL + GPCRJ0 = GPIO_OUT | GPIO_UP; + // KBC_MUTE# + GPCRJ1 = GPIO_OUT; + // EC_SDCARD_WAKEUP# + GPCRJ2 = GPIO_IN; + // SLP_S0# + GPCRJ3 = GPIO_IN; + // VA_EC_EN + GPCRJ4 = GPIO_OUT; + // VBATT_BOOST# + GPCRJ5 = GPIO_OUT; + // SLP_WLAN# + GPCRJ6 = GPIO_IN; + // SLP_SUS# + GPCRJ7 = GPIO_IN; + // ESPI_IO0_EC + GPCRM0 = GPIO_ALT | GPIO_UP | GPIO_DOWN; + // ESPI_IO1_EC + GPCRM1 = GPIO_ALT | GPIO_UP | GPIO_DOWN; + // ESPI_IO2_EC + GPCRM2 = GPIO_ALT | GPIO_UP | GPIO_DOWN; + // ESPI_IO3_EC + GPCRM3 = GPIO_ALT | GPIO_UP | GPIO_DOWN; + // ESPI_CLK_EC + GPCRM4 = GPIO_ALT | GPIO_UP | GPIO_DOWN; + // ESPI_CS_EC# + GPCRM5 = GPIO_ALT; + // ESPI_ALRT0# + GPCRM6 = GPIO_IN | GPIO_UP | GPIO_DOWN; +} + +#if GPIO_DEBUG +void gpio_debug_bank( + char * bank, + uint8_t data, + uint8_t mirror, + uint8_t pot, + volatile uint8_t * control +) { + for(char i = 0; i < 8; i++) { + DEBUG( + "%s%d: data %d mirror %d pot %d control %02X\n", + bank, + i, + (data >> i) & 1, + (mirror >> i) & 1, + (pot >> i) & 1, + *(control + i) + ); + } +} + +void gpio_debug(void) { + #define bank(BANK) gpio_debug_bank(#BANK, GPDR ## BANK, GPDMR ## BANK, GPOT ## BANK, &GPCR ## BANK ## 0) + bank(A); + bank(B); + bank(C); + bank(D); + bank(E); + bank(F); + bank(G); + bank(H); + bank(I); + bank(J); + #define GPOTM 0 + bank(M); + #undef GPOTM + #undef bank +} +#endif diff --git a/src/board/system76/darp8/include/board/gpio.h b/src/board/system76/darp8/include/board/gpio.h new file mode 100644 index 0000000..910e578 --- /dev/null +++ b/src/board/system76/darp8/include/board/gpio.h @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#ifndef _BOARD_GPIO_H +#define _BOARD_GPIO_H + +#include + +void gpio_init(void); +void gpio_debug(void); + +// clang-format off +extern struct Gpio __code ACIN_N; +extern struct Gpio __code AC_PRESENT; +extern struct Gpio __code ALL_SYS_PWRGD; +extern struct Gpio __code BKL_EN; +extern struct Gpio __code BUF_PLT_RST_N; +extern struct Gpio __code CCD_EN; +extern struct Gpio __code CPU_C10_GATE_N; +extern struct Gpio __code DD_ON; +extern struct Gpio __code EC_EN; +extern struct Gpio __code EC_RSMRST_N; +extern struct Gpio __code LAN_WAKEUP_N; +extern struct Gpio __code LED_ACIN; +#define HAVE_LED_AIRPLANE_N 0 +extern struct Gpio __code LED_BAT_CHG; +extern struct Gpio __code LED_BAT_FULL; +extern struct Gpio __code LED_PWR; +extern struct Gpio __code LID_SW_N; +extern struct Gpio __code PCH_DPWROK_EC; +extern struct Gpio __code PCH_PWROK_EC; +#define HAVE_PM_PWROK 0 +extern struct Gpio __code PWR_BTN_N; +extern struct Gpio __code PWR_SW_N; +extern struct Gpio __code SB_KBCRST_N; +extern struct Gpio __code SLP_S0_N; +extern struct Gpio __code SLP_SUS_N; +#define HAVE_SUSWARN_N 0 +#define HAVE_SUS_PWR_ACK 0 +extern struct Gpio __code SMI_N; +extern struct Gpio __code SUSB_N_PCH; +extern struct Gpio __code SUSC_N_PCH; +extern struct Gpio __code SWI_N; +extern struct Gpio __code VA_EC_EN; +extern struct Gpio __code WLAN_EN; +extern struct Gpio __code WLAN_PWR_EN; +extern struct Gpio __code XLP_OUT; +// clang-format on + +#endif // _BOARD_GPIO_H diff --git a/src/ec/ite/include/ec/gpio.h b/src/ec/ite/include/ec/gpio.h index 7b60b24..4a9c1e2 100644 --- a/src/ec/ite/include/ec/gpio.h +++ b/src/ec/ite/include/ec/gpio.h @@ -56,6 +56,8 @@ volatile uint8_t __xdata __at(0x16E2) GCR18; volatile uint8_t __xdata __at(0x16E4) GCR19; volatile uint8_t __xdata __at(0x16E5) GCR20; volatile uint8_t __xdata __at(0x16E6) GCR21; +volatile uint8_t __xdata __at(0x16E7) GCR22; +volatile uint8_t __xdata __at(0x16E8) GCR23; #endif volatile uint8_t __xdata __at(0x1601) GPDRA;