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Add oryp8

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This commit is contained in:
Jeremy Soller
2021-09-14 09:27:31 -06:00
committed by Jeremy Soller
parent 15c5f936b5
commit 9046f1e527
5 changed files with 410 additions and 0 deletions
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2
.github/workflows/ci.yml vendored
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@ -66,6 +66,8 @@ jobs:
board: oryp6 board: oryp6
- vendor: system76 - vendor: system76
board: oryp7 board: oryp7
- vendor: system76
board: oryp8
steps: steps:
- uses: actions/checkout@v2 - uses: actions/checkout@v2

26
src/board/system76/oryp8/board.c Normal file
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// SPDX-License-Identifier: GPL-3.0-only
#include <board/board.h>
#include <board/espi.h>
#include <board/gctrl.h>
#include <board/gpio.h>
#include <board/power.h>
#include <common/debug.h>
#include <ec/ec.h>
void board_init(void) {
espi_init();
// Allow backlight to be turned on
gpio_set(&BKL_EN, true);
// Enable camera
gpio_set(&CCD_EN, true);
}
void board_event(void) {
power_set_limit();
espi_event();
ec_read_post_codes();
}

61
src/board/system76/oryp8/board.mk Normal file
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# SPDX-License-Identifier: GPL-3.0-only
EC=it5570e
# Enable eSPI
CFLAGS+=-DEC_ESPI=1
# Include keyboard
KEYBOARD=15in_102
# Set keyboard LED mechanism
KBLED=rgb_pwm
# Set discrete GPU I2C bus
CFLAGS+=-DI2C_DGPU=I2C_1
# Set battery I2C bus
CFLAGS+=-DI2C_SMBUS=I2C_4
# Set touchpad PS2 bus
CFLAGS+=-DPS2_TOUCHPAD=PS2_3
# Set smart charger parameters
CFLAGS+=\
-DCHARGER_CHARGE_CURRENT=1536 \
-DCHARGER_CHARGE_VOLTAGE=13050 \
-DCHARGER_INPUT_CURRENT=9230
# Set CPU power limits in watts
CFLAGS+=\
-DPOWER_LIMIT_AC=180 \
-DPOWER_LIMIT_DC=28
# Don't smooth fan speed changes below 25% to mitigate buzzing
CFLAGS+=-DSMOOTH_FANS_MIN=25
# Custom fan curve
CFLAGS+=-DBOARD_FAN_POINTS="\
FAN_POINT(55, 25), \
FAN_POINT(65, 30), \
FAN_POINT(70, 40), \
FAN_POINT(75, 60), \
FAN_POINT(80, 75), \
FAN_POINT(85, 90), \
FAN_POINT(90, 100) \
"
# Enable DGPU support
CFLAGS+=-DHAVE_DGPU=1
CFLAGS+=-DBOARD_DGPU_FAN_POINTS="\
FAN_POINT(55, 25), \
FAN_POINT(65, 30), \
FAN_POINT(70, 40), \
FAN_POINT(75, 60), \
FAN_POINT(80, 75), \
FAN_POINT(85, 90), \
FAN_POINT(90, 100) \
"
# Add system76 common code
include src/board/system76/common/common.mk

279
src/board/system76/oryp8/gpio.c Normal file
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// SPDX-License-Identifier: GPL-3.0-only
#include <board/gpio.h>
#include <common/debug.h>
struct Gpio __code ACIN_N = GPIO(B, 0);
struct Gpio __code AC_PRESENT = GPIO(E, 1);
struct Gpio __code ALL_SYS_PWRGD = GPIO(C, 0);
struct Gpio __code BKL_EN = GPIO(C, 7);
struct Gpio __code BUF_PLT_RST_N = GPIO(D, 2); // renamed to ESPI_RESET#
struct Gpio __code CCD_EN = GPIO(D, 1);
struct Gpio __code CPU_C10_GATE_N = GPIO(J, 2);
struct Gpio __code DD_ON = GPIO(E, 4);
struct Gpio __code DGPU_PWR_EN = GPIO(H, 3);
struct Gpio __code EC_EN = GPIO(B, 6); // renamed to SUSBC_EC#
struct Gpio __code EC_RSMRST_N = GPIO(E, 5);
struct Gpio __code GC6_FB_EN = GPIO(J, 3);
struct Gpio __code LAN_WAKEUP_N = GPIO(B, 2);
struct Gpio __code LED_ACIN = GPIO(H, 2);
struct Gpio __code LED_BAT_CHG = GPIO(H, 5);
struct Gpio __code LED_BAT_FULL = GPIO(J, 0);
struct Gpio __code LED_PWR = GPIO(D, 0);
struct Gpio __code LID_SW_N = GPIO(B, 1);
struct Gpio __code PCH_DPWROK_EC = GPIO(F, 3);
struct Gpio __code PCH_PWROK_EC = GPIO(C, 6);
struct Gpio __code PWR_BTN_N = GPIO(D, 5);
struct Gpio __code PWR_SW_N = GPIO(B, 3);
struct Gpio __code SLP_SUS_N = GPIO(D, 4);
struct Gpio __code SUSB_N_PCH = GPIO(H, 6);
struct Gpio __code SUSC_N_PCH = GPIO(H, 1);
struct Gpio __code VA_EC_EN = GPIO(J, 4); // renamed to EC_SLP_SUS#
struct Gpio __code XLP_OUT = GPIO(B, 4);
void gpio_init() {
// Enable LPC reset on GPD2
GCR = 0x04;
// Disable UARTs
GCR6 = 0;
// Enable SMBus channel 4
GCR15 = BIT(4);
// Set GPD2 to 1.8V
GCR19 = BIT(0);
// Set GPF2 and GPF3 to 3.3V
GCR20 = 0;
// Set GPH0 to 1.8V
GCR21 = BIT(2);
// Set GPIO data
// WLAN_PWR_EN
GPDRA = BIT(3);
// SWI#, XLP_OUT, PWR_SW#
GPDRB = BIT(5) | BIT(4) | BIT(3);
GPDRC = 0;
// PWR_BTN#
GPDRD = BIT(5);
GPDRE = 0;
// BL_PWM_EN_EC, PCH_DPWROK_EC
GPDRF = BIT(7) | BIT(3);
// H_PROCHOT#_EC, WLAN_EN
GPDRG = BIT(6) | BIT(1);
// WLAN_PWR_EN
GPDRH = BIT(4);
// PLVDD_RST_EC, EC_AMP_EN
GPDRI = BIT(6) | BIT(5);
GPDRJ = 0;
// Set GPIO control
// EC_PWM_LEDKB_P
GPCRA0 = GPIO_ALT;
// KBC_BEEP
GPCRA1 = GPIO_ALT;
// CPU_FAN_PWM
GPCRA2 = GPIO_ALT;
// DDS_EC_PWM
GPCRA3 = GPIO_IN;
// VGA_FAN_PWM1
GPCRA4 = GPIO_ALT;
// EC_PWM_LEDKB_R
GPCRA5 = GPIO_ALT;
// EC_PWM_LEDKB_G
GPCRA6 = GPIO_ALT;
// EC_PWM_LEDKB_B
GPCRA7 = GPIO_ALT;
// AC_IN#
GPCRB0 = GPIO_IN | GPIO_UP;
// LID_SW#
GPCRB1 = GPIO_IN | GPIO_UP;
// LAN_WAKEUP#
GPCRB2 = GPIO_IN | GPIO_UP;
// PWR_SW#
GPCRB3 = GPIO_IN;
// XLP_OUT
GPCRB4 = GPIO_OUT;
// SWI#
GPCRB5 = GPIO_OUT | GPIO_UP;
// SUSBC_EC#
GPCRB6 = GPIO_OUT | GPIO_UP;
// Doesn't exist
GPCRB7 = GPIO_IN;
// ALL_SYS_PWRGD
GPCRC0 = GPIO_IN;
// SMC_VGA_THERM
GPCRC1 = GPIO_ALT;
// SMD_VGA_THERM
GPCRC2 = GPIO_ALT;
// KB-SO16
GPCRC3 = GPIO_IN;
// CNVI_DET#
GPCRC4 = GPIO_IN | GPIO_UP;
// KB-SO17
GPCRC5 = GPIO_IN;
// PCH_PWROK_EC
GPCRC6 = GPIO_OUT;
// BKL_EN
GPCRC7 = GPIO_OUT | GPIO_UP;
// LED_PWR
GPCRD0 = GPIO_OUT | GPIO_UP;
// CCD_EN
GPCRD1 = GPIO_OUT | GPIO_UP;
// ESPI_RESET#
GPCRD2 = GPIO_ALT;
// SLP_A#
GPCRD3 = GPIO_IN;
// SLP_SUS#
GPCRD4 = GPIO_IN;
// PWR_BTN#
GPCRD5 = GPIO_OUT | GPIO_UP;
// CPU_FANSEN
GPCRD6 = GPIO_ALT;
// VGA_FANSEN
GPCRD7 = GPIO_ALT;
// SMC_BAT
GPCRE0 = GPIO_ALT;
// AC_PRESENT
GPCRE1 = GPIO_OUT | GPIO_UP;
// PERKB_DET#
GPCRE2 = GPIO_IN | GPIO_UP;
// USB_PWR_EN#
GPCRE3 = GPIO_OUT;
// DD_ON
GPCRE4 = GPIO_OUT | GPIO_DOWN;
// EC_RSMRST#
GPCRE5 = GPIO_OUT;
// SB_KBCRST#
GPCRE6 = GPIO_IN;
// SMD_BAT
GPCRE7 = GPIO_ALT;
// 80CLK
GPCRF0 = GPIO_IN;
// USB_CHARGE_EN
GPCRF1 = GPIO_OUT | GPIO_UP;
// 3IN1
GPCRF2 = GPIO_IN | GPIO_UP;
// PCH_DPWROK_EC
GPCRF3 = GPIO_OUT;
// TP_CLK
GPCRF4 = GPIO_ALT;
// TP_DATA
GPCRF5 = GPIO_ALT;
// H_PECI
GPCRF6 = GPIO_ALT;
// BL_PWM_EN_EC
GPCRF7 = GPIO_OUT;
// dGPU_OVERT_EC
GPCRG0 = GPIO_IN | GPIO_UP;
// WLAN_EN
GPCRG1 = GPIO_OUT | GPIO_UP;
// AUTO_LOAD_PWR
GPCRG2 = GPIO_IN;
// ALSPI_CE#
GPCRG3 = GPIO_ALT;
// ALSPI_MSI
GPCRG4 = GPIO_ALT;
// ALSPI_MSO
GPCRG5 = GPIO_ALT;
// H_PROCHOT_EC
GPCRG6 = GPIO_OUT | GPIO_UP;
// ALSPI_SCLK
GPCRG7 = GPIO_ALT;
// ME_WE
GPCRH0 = GPIO_OUT;
// SUSC#_PCH
GPCRH1 = GPIO_IN;
// LED_ACIN
GPCRH2 = GPIO_OUT | GPIO_UP;
// DGPU_PWR_EN
GPCRH3 = GPIO_IN;
// WLAN_PWR_EN
GPCRH4 = GPIO_OUT;
// LED_BAT_CHG
GPCRH5 = GPIO_OUT;
// SUSB#_PCH
GPCRH6 = GPIO_IN;
// ACE_I2C_IRQ2Z_EC
GPCRH7 = GPIO_OUT | GPIO_UP;
// BAT_DET
GPCRI0 = GPIO_ALT;
// BAT_VOLT
GPCRI1 = GPIO_ALT;
// MUX_CTRL_BIOS
GPCRI2 = GPIO_OUT;
// THERM_VOLT
GPCRI3 = GPIO_ALT;
// TOTAL_CUR
GPCRI4 = GPIO_ALT;
// EC_AMP_EN
GPCRI5 = GPIO_OUT;
// PLVDD_RST_EC
GPCRI6 = GPIO_OUT;
// MODEL_ID
GPCRI7 = GPIO_IN;
// LED_BAT_FULL
GPCRJ0 = GPIO_OUT | GPIO_UP;
// KBC_MUTE#
GPCRJ1 = GPIO_IN;
// CPU_C10_GATE#
GPCRJ2 = GPIO_IN;
// GC6_FB_EN_PCH
GPCRJ3 = GPIO_IN;
// EC_SLP_SUS#
GPCRJ4 = GPIO_OUT;
// VBATT_BOOST#
GPCRJ5 = GPIO_OUT;
// EC_GPIO
GPCRJ6 = GPIO_OUT;
// RGBKB-DET#
GPCRJ7 = GPIO_IN | GPIO_UP;
// ESPI_IO0_EC
GPCRM0 = GPIO_ALT;
// ESPI_IO1_EC
GPCRM1 = GPIO_ALT;
// ESPI_IO2_EC
GPCRM2 = GPIO_ALT;
// ESPI_IO3_EC
GPCRM3 = GPIO_ALT;
// ESPI_CLK_EC
GPCRM4 = GPIO_ALT;
// ESPI_CS#_EC
GPCRM5 = GPIO_ALT;
// SERIRQ_ESPI_ALERT0
GPCRM6 = GPIO_IN | GPIO_UP;
}
#if GPIO_DEBUG
void gpio_debug_bank(
char * bank,
uint8_t data,
uint8_t mirror,
uint8_t pot,
volatile uint8_t * control
) {
for(char i = 0; i < 8; i++) {
DEBUG(
"%s%d:\n\tdata %d\n\tmirror %d\n\tpot %d\n\tcontrol %02X\n",
bank,
i,
(data >> i) & 1,
(mirror >> i) & 1,
(pot >> i) & 1,
*(control + i)
);
}
}
void gpio_debug(void) {
#define bank(BANK) gpio_debug_bank(#BANK, GPDR ## BANK, GPDMR ## BANK, GPOT ## BANK, &GPCR ## BANK ## 0)
bank(A);
bank(B);
bank(C);
bank(D);
bank(E);
bank(F);
bank(G);
bank(H);
bank(I);
bank(J);
#undef bank
}
#endif

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src/board/system76/oryp8/include/board/gpio.h Normal file
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// SPDX-License-Identifier: GPL-3.0-only
#ifndef _BOARD_GPIO_H
#define _BOARD_GPIO_H
#include <ec/gpio.h>
void gpio_init(void);
void gpio_debug(void);
extern struct Gpio __code ACIN_N;
extern struct Gpio __code AC_PRESENT;
extern struct Gpio __code ALL_SYS_PWRGD;
extern struct Gpio __code BKL_EN;
extern struct Gpio __code BUF_PLT_RST_N;
extern struct Gpio __code CCD_EN;
extern struct Gpio __code CPU_C10_GATE_N;
extern struct Gpio __code DD_ON;
extern struct Gpio __code DGPU_PWR_EN;
extern struct Gpio __code EC_EN;
extern struct Gpio __code EC_RSMRST_N;
extern struct Gpio __code GC6_FB_EN;
extern struct Gpio __code LAN_WAKEUP_N;
extern struct Gpio __code LED_ACIN;
#define HAVE_LED_AIRPLANE_N 0
extern struct Gpio __code LED_BAT_CHG;
extern struct Gpio __code LED_BAT_FULL;
extern struct Gpio __code LED_PWR;
extern struct Gpio __code LID_SW_N;
extern struct Gpio __code PCH_DPWROK_EC;
extern struct Gpio __code PCH_PWROK_EC;
#define HAVE_PM_PWROK 0
extern struct Gpio __code PWR_BTN_N;
extern struct Gpio __code PWR_SW_N;
extern struct Gpio __code SLP_SUS_N;
#define HAVE_SUS_PWR_ACK 0
extern struct Gpio __code SUSB_N_PCH;
extern struct Gpio __code SUSC_N_PCH;
extern struct Gpio __code VA_EC_EN;
extern struct Gpio __code XLP_OUT;
#endif // _BOARD_GPIO_H