This commit is contained in:
Jeremy Soller 2020-01-12 20:19:20 -07:00
parent e9c308b789
commit 98467ac449
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GPG Key ID: E988B49EE78A7FB1
5 changed files with 20 additions and 26 deletions

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@ -65,7 +65,6 @@ static void peci_config(void) {
} }
} }
// PECI information can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/design-guides/core-i7-lga-2011-guide.pdf // PECI information can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/design-guides/core-i7-lga-2011-guide.pdf
void peci_event(void) { void peci_event(void) {
// Wait for completion // Wait for completion
@ -73,7 +72,6 @@ void peci_event(void) {
// Clear status // Clear status
HOSTAR = HOSTAR; HOSTAR = HOSTAR;
// Enable PECI, clearing data fifo's // Enable PECI, clearing data fifo's
HOCTLR = (1 << 5) | (1 << 3); HOCTLR = (1 << 5) | (1 << 3);
// Set address to default // Set address to default

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@ -9,6 +9,7 @@ extern uint8_t peci_duty;
extern uint8_t peci_tcontrol; extern uint8_t peci_tcontrol;
extern uint8_t peci_tjmax; extern uint8_t peci_tjmax;
void peci_init(void);
void peci_event(void); void peci_event(void);
#endif // _BOARD_PECI_H #endif // _BOARD_PECI_H

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@ -76,7 +76,6 @@ static void peci_config(void) {
} }
} }
// PECI information can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/design-guides/core-i7-lga-2011-guide.pdf // PECI information can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/design-guides/core-i7-lga-2011-guide.pdf
void peci_event(void) { void peci_event(void) {
// Wait for completion // Wait for completion
@ -84,7 +83,6 @@ void peci_event(void) {
// Clear status // Clear status
HOSTAR = HOSTAR; HOSTAR = HOSTAR;
// Enable PECI, clearing data fifo's // Enable PECI, clearing data fifo's
HOCTLR = (1 << 5) | (1 << 3); HOCTLR = (1 << 5) | (1 << 3);
// Set address to default // Set address to default

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@ -9,25 +9,25 @@
extern uint8_t main_cycle; extern uint8_t main_cycle;
static struct Gpio __code PCH_DPWROK_EC = GPIO(A, 7); extern struct Gpio __code PCH_DPWROK_EC;
static struct Gpio __code PCH_PWROK_EC = GPIO(A, 6); extern struct Gpio __code PCH_PWROK_EC;
static struct Gpio __code LED_PWR = GPIO(D, 0); extern struct Gpio __code LED_PWR;
static struct Gpio __code ALL_SYS_PWRGD = GPIO(C, 0); extern struct Gpio __code ALL_SYS_PWRGD;
static struct Gpio __code PM_PWROK = GPIO(C, 6); extern struct Gpio __code PM_PWROK;
static struct Gpio __code PWR_SW_N = GPIO(B, 3); extern struct Gpio __code PWR_SW_N;
static struct Gpio __code BUF_PLT_RST_N = GPIO(D, 2); extern struct Gpio __code BUF_PLT_RST_N;
static struct Gpio __code PWR_BTN_N = GPIO(D, 5); extern struct Gpio __code PWR_BTN_N;
static struct Gpio __code SUSWARN_N = GPIO(D, 7); extern struct Gpio __code SUSWARN_N;
static struct Gpio __code EC_EN = GPIO(J, 6); extern struct Gpio __code EC_EN;
static struct Gpio __code VA_EC_EN = GPIO(J, 4); extern struct Gpio __code VA_EC_EN;
static struct Gpio __code DD_ON = GPIO(E, 4); extern struct Gpio __code DD_ON;
static struct Gpio __code EC_RSMRST_N = GPIO(E, 5); extern struct Gpio __code EC_RSMRST_N;
static struct Gpio __code AC_PRESENT = GPIO(E, 1); extern struct Gpio __code AC_PRESENT;
static struct Gpio __code SUSC_N_PCH = GPIO(H, 1); extern struct Gpio __code SUSC_N_PCH;
static struct Gpio __code VR_ON = GPIO(H, 4); extern struct Gpio __code VR_ON;
static struct Gpio __code SUSB_N_PCH = GPIO(H, 6); extern struct Gpio __code SUSB_N_PCH;
static struct Gpio __code SLP_SUS_N = GPIO(J, 3); extern struct Gpio __code SLP_SUS_N;
static struct Gpio __code SUS_PWR_ACK = GPIO(J, 7); extern struct Gpio __code SUS_PWR_ACK;
// VccRTC stable (55%) to RTCRST# high // VccRTC stable (55%) to RTCRST# high
#define tPCH01 delay_ms(9) #define tPCH01 delay_ms(9)

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@ -16,9 +16,6 @@ void smbus_init(void) {
SMB45P3USL = 0xA1; SMB45P3USL = 0xA1;
SMB45P3USH = 0x01; SMB45P3USH = 0x01;
// Clock set to 50 KHz
// SCLKTSA = 1;
// Set up for i2c usage // Set up for i2c usage
i2c_reset(true); i2c_reset(true);
} }