common: peci: WIP peci_get_temp over espi
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@ -69,7 +69,85 @@ static struct Fan __code FAN = {
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#if USE_PECI_OVER_ESPI
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#if USE_PECI_OVER_ESPI
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//TODO
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void peci_init(void) {}
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// Returns true on success, false on error
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bool peci_get_temp(int16_t * data) {
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// Wait for completion
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while (ESUCTRL0 & ESUCTRL0_BUSY) {}
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// Clear upstream status
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ESUCTRL0 = ESUCTRL0;
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// Clear OOB status
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ESOCTRL0 = ESOCTRL0;
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// Set upstream cycle type
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ESUCTRL1 = ESUCTRL1_OOB;
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// Set upstream tag / length[11:8]
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ESUCTRL2 = 0;
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// Set upstream length [7:0] (size of PECI data plus 3)
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ESUCTRL3 = 8;
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// Destination address (0x10 is PCH, left shifted by one)
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UDB[0] = 0x10 << 1;
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// Command code (0x01 is PECI)
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UDB[1] = 0x01;
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// Set byte count
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UDB[2] = 5;
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// Set source address (0x0F is EC, left shifted by one, or with 1)
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UDB[3] = (0x0F << 1) | 1;
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// PECI target address (0x30 is default)
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UDB[4] = 0x30;
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// PECI write length
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UDB[5] = 1;
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// PECI read length
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UDB[6] = 2;
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// PECI command (0x01 = GetTemp)
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UDB[7] = 0x01;
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// Set upstream enable
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ESUCTRL0 |= ESUCTRL0_ENABLE;
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// Set upstream go
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ESUCTRL0 |= ESUCTRL0_GO;
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// Wait while upstream busy
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while (ESUCTRL0 & ESUCTRL0_BUSY) {}
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uint8_t status = ESUCTRL0;
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if (status & ESUCTRL0_DONE) {
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// Upstream is done
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} else {
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//TODO: Upstream not done, how do we get error message?
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}
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// Wait for response
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//TODO: do this asynchronously to avoid delays
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while (!(ESOCTRL0 & ESOCTRL0_STATUS)) {}
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// Read response length
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uint8_t len = ESOCTRL4;
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if (len >= 7) {
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//TODO: verify packet type, handle PECI status
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// Received enough data for temperature
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uint8_t low = PUTOOBDB[5];
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uint8_t high = PUTOOBDB[6];
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*data = (((int16_t)high << 8) | (int16_t)low);
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return true;
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} else {
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// Did not receive enough data
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return false;
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}
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}
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// Returns positive completion code on success, negative completion code or
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// negative (0x1000 | status register) on PECI hardware error
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int16_t peci_wr_pkg_config(uint8_t index, uint16_t param, uint32_t data) {
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//TODO: IMPLEMENT THIS STUB
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index = index;
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param = param;
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data = data;
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return 0;
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}
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#else // USE_PECI_OVER_ESPI
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#else // USE_PECI_OVER_ESPI
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@ -83,8 +161,8 @@ void peci_init(void) {
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PADCTLR = 0x02;
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PADCTLR = 0x02;
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}
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}
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// Returns status register, caller must check for success
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// Returns true on success, false on error
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uint8_t peci_get_temp(int16_t * data) {
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bool peci_get_temp(int16_t * data) {
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// Wait for completion
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// Wait for completion
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while (HOSTAR & 1) {}
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while (HOSTAR & 1) {}
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// Clear status
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// Clear status
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@ -112,8 +190,10 @@ uint8_t peci_get_temp(int16_t * data) {
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uint8_t low = HORDDR;
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uint8_t low = HORDDR;
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uint8_t high = HORDDR;
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uint8_t high = HORDDR;
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*data = (((int16_t)high << 8) | (int16_t)low);
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*data = (((int16_t)high << 8) | (int16_t)low);
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return true;
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} else {
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return false;
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}
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}
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return status;
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}
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}
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// Returns positive completion code on success, negative completion code or
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// Returns positive completion code on success, negative completion code or
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@ -183,8 +263,7 @@ uint8_t peci_get_fan_duty(void) {
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if (peci_on) {
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if (peci_on) {
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int16_t peci_offset = 0;
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int16_t peci_offset = 0;
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uint8_t status = peci_get_temp(&peci_offset);
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if (peci_get_temp(&peci_offset)) {
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if (status & BIT(1)) {
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// Use result if finished successfully
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// Use result if finished successfully
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peci_temp = PECI_TEMP(T_JUNCTION) + (peci_offset >> 6);
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peci_temp = PECI_TEMP(T_JUNCTION) + (peci_offset >> 6);
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duty = fan_duty(&FAN, peci_temp);
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duty = fan_duty(&FAN, peci_temp);
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@ -34,6 +34,9 @@ CFLAGS+=\
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-DCHARGER_CHARGE_VOLTAGE=17600 \
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-DCHARGER_CHARGE_VOLTAGE=17600 \
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-DCHARGER_INPUT_CURRENT=11500
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-DCHARGER_INPUT_CURRENT=11500
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# Use PECI over ESPI
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CFLAGS+=-DUSE_PECI_OVER_ESPI=1
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# Set CPU power limits in watts
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# Set CPU power limits in watts
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CFLAGS+=\
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CFLAGS+=\
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-DPOWER_LIMIT_AC=230 \
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-DPOWER_LIMIT_AC=230 \
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@ -5,6 +5,8 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <common/macro.h>
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struct VirtualWire {
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struct VirtualWire {
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volatile uint8_t __xdata *index;
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volatile uint8_t __xdata *index;
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uint8_t shift;
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uint8_t shift;
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@ -105,17 +107,38 @@ volatile uint8_t __xdata __at(0x31A2) ESGCTRL2;
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volatile uint8_t __xdata __at(0x31A3) ESGCTRL3;
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volatile uint8_t __xdata __at(0x31A3) ESGCTRL3;
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// eSPI upstream control
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// eSPI upstream control
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// Upstream flags
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volatile uint8_t __xdata __at(0x31B0) ESUCTRL0;
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volatile uint8_t __xdata __at(0x31B0) ESUCTRL0;
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#define ESUCTRL0_ENABLE BIT(7)
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#define ESUCTRL0_GO BIT(6)
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#define ESUCTRL0_DONE BIT(1)
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#define ESUCTRL0_BUSY BIT(0)
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// Upstream cycle type
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volatile uint8_t __xdata __at(0x31B1) ESUCTRL1;
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volatile uint8_t __xdata __at(0x31B1) ESUCTRL1;
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// OOB message
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#define ESUCTRL1_OOB 0x07
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// Upstream tag @ [7:4], upstream length [11:8] @ [3:0]
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volatile uint8_t __xdata __at(0x31B2) ESUCTRL2;
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volatile uint8_t __xdata __at(0x31B2) ESUCTRL2;
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// Upstream length [7:0]
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volatile uint8_t __xdata __at(0x31B3) ESUCTRL3;
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volatile uint8_t __xdata __at(0x31B3) ESUCTRL3;
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volatile uint8_t __xdata __at(0x31B6) ESUCTRL6;
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volatile uint8_t __xdata __at(0x31B6) ESUCTRL6;
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volatile uint8_t __xdata __at(0x31B7) ESUCTRL7;
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volatile uint8_t __xdata __at(0x31B7) ESUCTRL7;
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volatile uint8_t __xdata __at(0x31B8) ESUCTRL8;
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volatile uint8_t __xdata __at(0x31B8) ESUCTRL8;
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// eSPI OOB control
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// eSPI OOB control
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// PUT_OOB status
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volatile uint8_t __xdata __at(0x31C0) ESOCTRL0;
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volatile uint8_t __xdata __at(0x31C0) ESOCTRL0;
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#define ESOCTRL0_STATUS BIT(7)
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volatile uint8_t __xdata __at(0x31C1) ESOCTRL1;
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volatile uint8_t __xdata __at(0x31C1) ESOCTRL1;
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// PUT_OOB length
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volatile uint8_t __xdata __at(0x31C4) ESOCTRL4;
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volatile uint8_t __xdata __at(0x31C4) ESOCTRL4;
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// Virtual wires
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// Virtual wires
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