From a4c4c34ff9a7f02c134ab1b74f0a41594f7f3b26 Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Tue, 1 Oct 2019 12:00:33 -0600 Subject: [PATCH] Use SMBus for console output --- src/board/system76/galp3-c/stdio.c | 60 +++++++++++++++++------------- src/ec/it8587e/include/ec/smbus.h | 46 +++++++++++++++++++++++ 2 files changed, 81 insertions(+), 25 deletions(-) create mode 100644 src/ec/it8587e/include/ec/smbus.h diff --git a/src/board/system76/galp3-c/stdio.c b/src/board/system76/galp3-c/stdio.c index 3dbdeef..2cd8153 100644 --- a/src/board/system76/galp3-c/stdio.c +++ b/src/board/system76/galp3-c/stdio.c @@ -1,38 +1,48 @@ #include -#include -#include +#include -// Wait 25 us -// 65536 - (25 / 1.304) = 65517 -void parallel_delay(void) { - timer_mode_1(65517); - timer_wait(); - timer_stop(); -} +void i2c_write(unsigned char value) { + for (;;) { + // Wait for last command + while (HOSTAA & 1) {} -// This takes a time of 25 us * 3 = 75 us -// That produces a frequency of 13.333 KHz -// Which produces a bitrate of 106.667 KHz -void parallel_write(unsigned char value) { - // Make sure clock is high - KSOH1 = 0xFF; - parallel_delay(); + // Clear result + HOSTAA = HOSTAA; - // Set value - KSOL = value; - parallel_delay(); + // Clock down to 50 KHz + SCLKTSA = 1; - // Set clock low - KSOH1 = 0; - parallel_delay(); + // Enable host interface with i2c compatibility + HOCTL2A = (1 << 1) | (1 << 0); - // Set clock high again - KSOH1 = 0xFF; + // Write value to 0x76 + TRASLAA = (0x76 << 1) | (0 << 1); + HOCMDA = value; + + // Start command + HOCTLA = (1 << 6) | (0b001 << 2); + + // Wait for command to start + while (!(HOSTAA & 1)) {} + + // Wait for command to finish + while (HOSTAA & 1) {} + + // Read and clear status + uint8_t status = HOSTAA; + HOSTAA = status; + + // If there were no errors, return + uint8_t error = (1 << 6) | (1 << 5) | (1 << 4) | (1 << 3) | (1 << 2); + if (!(status & error)) { + break; + } + } } int putchar(int c) { unsigned char byte = (unsigned char)c; - parallel_write(byte); + i2c_write(byte); return (int)byte; } diff --git a/src/ec/it8587e/include/ec/smbus.h b/src/ec/it8587e/include/ec/smbus.h new file mode 100644 index 0000000..2f864bb --- /dev/null +++ b/src/ec/it8587e/include/ec/smbus.h @@ -0,0 +1,46 @@ +#ifndef _EC_SMBUS_H +#define _EC_SMBUS_H + +#include + +// Host status for channel A +volatile uint8_t __xdata __at(0x1C00) HOSTAA; +// Host control for channel A +volatile uint8_t __xdata __at(0x1C01) HOCTLA; +// Host command for channel A +volatile uint8_t __xdata __at(0x1C02) HOCMDA; +// Transmit slave address for channel A +volatile uint8_t __xdata __at(0x1C03) TRASLAA; +// Host data 0 for channel A +volatile uint8_t __xdata __at(0x1C04) D0REGA; +// Host data 1 for channel A +volatile uint8_t __xdata __at(0x1C05) D1REGA; +// Host block data byte for channel A +volatile uint8_t __xdata __at(0x1C06) HOBDBA; +// Packet error check for channel A +volatile uint8_t __xdata __at(0x1C07) PECERCA; +// Receive slave address for channel A +volatile uint8_t __xdata __at(0x1C08) RESLADRA; +// Receive slave address 2 for channel A +volatile uint8_t __xdata __at(0x1C3F) RESLADR2A; +// Slave data for channel A +volatile uint8_t __xdata __at(0x1C09) SLDAA; +// SMBus pin control for channel A +volatile uint8_t __xdata __at(0x1C0A) SMBPCTLA; +// Slave status for channel A +volatile uint8_t __xdata __at(0x1C0B) SLSTAA; +// Slave interrupt control for channel A +volatile uint8_t __xdata __at(0x1C0C) SICRA; +// Notify device address for channel A +volatile uint8_t __xdata __at(0x1C0D) NDADRA; +// Notify data low byte for channel A +volatile uint8_t __xdata __at(0x1C0E) NDLBA; +// Notify data high byte for channel A +volatile uint8_t __xdata __at(0x1C0F) NDHBA; +// Host control 2 for channel A +volatile uint8_t __xdata __at(0x1C10) HOCTL2A; +// SMCLK timing setting for channel A +volatile uint8_t __xdata __at(0x1C10) SCLKTSA; + + +#endif // _EC_SMBUS_H