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WIP: kbled control for darp5

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This commit is contained in:
Jeremy Soller
2020-02-21 15:38:44 -07:00
parent 0d72e63b31
commit a90b2a8c67
9 changed files with 132 additions and 2 deletions
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8
src/ec/it5570e/i2c.c
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@ -14,6 +14,14 @@ struct I2C {
volatile uint8_t * trasla;
};
struct I2C __code I2C_0 = {
.hosta = HOSTAA,
.hoctl = HOCTLA,
.hoctl2 = HOCTL2A,
.hobdb = HOBDBA,
.trasla = TRASLAA,
};
struct I2C __code I2C_1 = {
.hosta = HOSTAB,
.hoctl = HOCTLB,

8
src/ec/it8587e/i2c.c
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@ -22,6 +22,14 @@ struct I2C __code I2C_0 = {
.trasla = TRASLAA,
};
struct I2C __code I2C_1 = {
.hosta = HOSTAB,
.hoctl = HOCTLB,
.hoctl2 = HOCTL2B,
.hobdb = HOBDBB,
.trasla = TRASLAB,
};
void i2c_reset(struct I2C * i2c, bool kill) {
if (*(i2c->hosta) & HOSTA_BUSY) {
// Set kill bit

1
src/ec/it8587e/include/ec/i2c.h
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@ -4,6 +4,7 @@
#include <common/i2c.h>
extern struct I2C __code I2C_0;
extern struct I2C __code I2C_1;
void i2c_reset(struct I2C * i2c, bool kill);

39
src/ec/it8587e/include/ec/smbus.h
View File

@ -52,6 +52,45 @@ volatile uint8_t __xdata __at(0x1C3F) RESLADR2A;
// SMCLK timing setting for channel A
volatile uint8_t __xdata __at(0x1C40) SCLKTSA;
// Host status for channel B
volatile uint8_t __xdata __at(0x1C11) HOSTAB;
// Host control for channel B
volatile uint8_t __xdata __at(0x1C12) HOCTLB;
// Host command for channel B
volatile uint8_t __xdata __at(0x1C13) HOCMDB;
// Transmit slave address for channel B
volatile uint8_t __xdata __at(0x1C14) TRASLAB;
// Host data 0 for channel B
volatile uint8_t __xdata __at(0x1C15) D0REGB;
// Host data 1 for channel B
volatile uint8_t __xdata __at(0x1C16) D1REGB;
// Host block data byte for channel B
volatile uint8_t __xdata __at(0x1C17) HOBDBB;
// Packet error check for channel B
volatile uint8_t __xdata __at(0x1C18) PECERCB;
// Receive slave address for channel B
volatile uint8_t __xdata __at(0x1C19) RESLADRB;
// Slave data for channel B
volatile uint8_t __xdata __at(0x1C1A) SLDAB;
// SMBus pin control for channel B
volatile uint8_t __xdata __at(0x1C1B) SMBPCTLB;
// Slave status for channel B
volatile uint8_t __xdata __at(0x1C1C) SLSTAB;
// Slave interrupt control for channel B
volatile uint8_t __xdata __at(0x1C1D) SICRB;
// Notify device address for channel B
volatile uint8_t __xdata __at(0x1C1E) NDADRB;
// Notify data low byte for channel A
volatile uint8_t __xdata __at(0x1C1F) NDLBB;
// Notify data high byte for channel B
volatile uint8_t __xdata __at(0x1C20) NDHBB;
// Host control 2 for channel B
volatile uint8_t __xdata __at(0x1C21) HOCTL2B;
// Receive slave address 2 for channel B
volatile uint8_t __xdata __at(0x1C44) RESLADR2B;
// SMCLK timing setting for channel B
volatile uint8_t __xdata __at(0x1C41) SCLKTSB;
// Timing registers
volatile uint8_t __xdata __at(0x1C22) SMB4P7USL;
volatile uint8_t __xdata __at(0x1C23) SMB4P0USL;