WIP: kbled control for darp5

This commit is contained in:
Jeremy Soller
2020-02-21 15:38:44 -07:00
parent 0d72e63b31
commit a90b2a8c67
9 changed files with 132 additions and 2 deletions

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@ -19,6 +19,9 @@ CFLAGS+=-DLEVEL=4
# Set battery I2C bus
CFLAGS+=-DI2C_SMBUS=I2C_0
# Set keyboard LED I2C bus
CFLAGS+=-DI2C_KBLED=I2C_1
# Set scratch ROM parameters
SCRATCH_OFFSET=1024
SCRATCH_SIZE=1024

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@ -94,9 +94,9 @@ void gpio_init() {
// ALL_SYS_PWRGD
GPCRC0 = GPIO_IN;
// SMC_VGA_THERM
GPCRC1 = GPIO_IN | GPIO_UP;
GPCRC1 = GPIO_ALT;
// SMD_VGA_THERM
GPCRC2 = GPIO_IN | GPIO_UP;
GPCRC2 = GPIO_ALT;
// KSO16 (Darter)
GPCRC3 = GPIO_IN;
// CNVI_DET#

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@ -0,0 +1,11 @@
#ifndef _BOARD_KBLED_H
#define _BOARD_KBLED_H
#include <stdint.h>
void kbled_init(void);
uint8_t kbled_get(void);
void kbled_set(uint8_t level);
void kbled_set_color(uint32_t color);
#endif // _BOARD_KBLED_H

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@ -0,0 +1,58 @@
#include <board/kbled.h>
#include <common/macro.h>
#include <ec/i2c.h>
#define kbled_i2c_get(A, D, L) i2c_get(&I2C_KBLED, 0x68, A, D, L)
#define kbled_i2c_set(A, D, L) i2c_set(&I2C_KBLED, 0x68, A, D, L)
static uint8_t __code levels[] = {
0x00,
0x80,
0x90,
0xA8,
0xC0,
0xFF
};
void kbled_init(void) {
i2c_reset(&I2C_KBLED, true);
kbled_set(0xFF);
kbled_set_color(0xFFFFFF);
}
uint8_t kbled_get(void) {
uint8_t level;
uint8_t raw = 0;
kbled_i2c_get(0x12, &raw, 1);
for (level = 0; level < ARRAY_SIZE(levels); level++) {
if (raw <= levels[level]) {
return level;
}
}
return 0;
}
void kbled_set(uint8_t level) {
uint8_t raw = 0;
if (level < ARRAY_SIZE(levels)) {
raw = levels[level];
}
kbled_i2c_set(0x12, &raw, 1);
}
void kbled_set_color(uint32_t color) {
uint8_t b = (uint8_t)(color);
kbled_i2c_set(0x02, &b, 1);
kbled_i2c_set(0x03, &b, 1);
kbled_i2c_set(0x04, &b, 1);
uint8_t g = (uint8_t)(color >> 8);
kbled_i2c_set(0x05, &g, 1);
kbled_i2c_set(0x06, &g, 1);
kbled_i2c_set(0x07, &g, 1);
uint8_t r = (uint8_t)(color >> 16);
kbled_i2c_set(0x08, &r, 1);
kbled_i2c_set(0x09, &r, 1);
kbled_i2c_set(0x0A, &r, 1);
}

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@ -9,6 +9,7 @@
#include <board/gpio.h>
#include <board/gctrl.h>
#include <board/kbc.h>
#include <board/kbled.h>
#include <board/kbscan.h>
#include <board/lid.h>
#include <board/peci.h>
@ -41,6 +42,7 @@ void init(void) {
// Can happen in any order
ecpm_init();
kbc_init();
kbled_init();
kbscan_init();
peci_init();
pmc_init();

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@ -14,6 +14,14 @@ struct I2C {
volatile uint8_t * trasla;
};
struct I2C __code I2C_0 = {
.hosta = HOSTAA,
.hoctl = HOCTLA,
.hoctl2 = HOCTL2A,
.hobdb = HOBDBA,
.trasla = TRASLAA,
};
struct I2C __code I2C_1 = {
.hosta = HOSTAB,
.hoctl = HOCTLB,

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@ -22,6 +22,14 @@ struct I2C __code I2C_0 = {
.trasla = TRASLAA,
};
struct I2C __code I2C_1 = {
.hosta = HOSTAB,
.hoctl = HOCTLB,
.hoctl2 = HOCTL2B,
.hobdb = HOBDBB,
.trasla = TRASLAB,
};
void i2c_reset(struct I2C * i2c, bool kill) {
if (*(i2c->hosta) & HOSTA_BUSY) {
// Set kill bit

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@ -4,6 +4,7 @@
#include <common/i2c.h>
extern struct I2C __code I2C_0;
extern struct I2C __code I2C_1;
void i2c_reset(struct I2C * i2c, bool kill);

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@ -52,6 +52,45 @@ volatile uint8_t __xdata __at(0x1C3F) RESLADR2A;
// SMCLK timing setting for channel A
volatile uint8_t __xdata __at(0x1C40) SCLKTSA;
// Host status for channel B
volatile uint8_t __xdata __at(0x1C11) HOSTAB;
// Host control for channel B
volatile uint8_t __xdata __at(0x1C12) HOCTLB;
// Host command for channel B
volatile uint8_t __xdata __at(0x1C13) HOCMDB;
// Transmit slave address for channel B
volatile uint8_t __xdata __at(0x1C14) TRASLAB;
// Host data 0 for channel B
volatile uint8_t __xdata __at(0x1C15) D0REGB;
// Host data 1 for channel B
volatile uint8_t __xdata __at(0x1C16) D1REGB;
// Host block data byte for channel B
volatile uint8_t __xdata __at(0x1C17) HOBDBB;
// Packet error check for channel B
volatile uint8_t __xdata __at(0x1C18) PECERCB;
// Receive slave address for channel B
volatile uint8_t __xdata __at(0x1C19) RESLADRB;
// Slave data for channel B
volatile uint8_t __xdata __at(0x1C1A) SLDAB;
// SMBus pin control for channel B
volatile uint8_t __xdata __at(0x1C1B) SMBPCTLB;
// Slave status for channel B
volatile uint8_t __xdata __at(0x1C1C) SLSTAB;
// Slave interrupt control for channel B
volatile uint8_t __xdata __at(0x1C1D) SICRB;
// Notify device address for channel B
volatile uint8_t __xdata __at(0x1C1E) NDADRB;
// Notify data low byte for channel A
volatile uint8_t __xdata __at(0x1C1F) NDLBB;
// Notify data high byte for channel B
volatile uint8_t __xdata __at(0x1C20) NDHBB;
// Host control 2 for channel B
volatile uint8_t __xdata __at(0x1C21) HOCTL2B;
// Receive slave address 2 for channel B
volatile uint8_t __xdata __at(0x1C44) RESLADR2B;
// SMCLK timing setting for channel B
volatile uint8_t __xdata __at(0x1C41) SCLKTSB;
// Timing registers
volatile uint8_t __xdata __at(0x1C22) SMB4P7USL;
volatile uint8_t __xdata __at(0x1C23) SMB4P0USL;