WIP: kbled control for darp5
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@ -19,6 +19,9 @@ CFLAGS+=-DLEVEL=4
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# Set battery I2C bus
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CFLAGS+=-DI2C_SMBUS=I2C_0
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# Set keyboard LED I2C bus
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CFLAGS+=-DI2C_KBLED=I2C_1
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# Set scratch ROM parameters
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SCRATCH_OFFSET=1024
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SCRATCH_SIZE=1024
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@ -94,9 +94,9 @@ void gpio_init() {
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// ALL_SYS_PWRGD
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GPCRC0 = GPIO_IN;
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// SMC_VGA_THERM
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GPCRC1 = GPIO_IN | GPIO_UP;
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GPCRC1 = GPIO_ALT;
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// SMD_VGA_THERM
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GPCRC2 = GPIO_IN | GPIO_UP;
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GPCRC2 = GPIO_ALT;
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// KSO16 (Darter)
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GPCRC3 = GPIO_IN;
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// CNVI_DET#
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11
src/board/system76/darp5/include/board/kbled.h
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11
src/board/system76/darp5/include/board/kbled.h
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@ -0,0 +1,11 @@
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#ifndef _BOARD_KBLED_H
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#define _BOARD_KBLED_H
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#include <stdint.h>
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void kbled_init(void);
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uint8_t kbled_get(void);
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void kbled_set(uint8_t level);
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void kbled_set_color(uint32_t color);
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#endif // _BOARD_KBLED_H
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58
src/board/system76/darp5/kbled.c
Normal file
58
src/board/system76/darp5/kbled.c
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@ -0,0 +1,58 @@
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#include <board/kbled.h>
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#include <common/macro.h>
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#include <ec/i2c.h>
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#define kbled_i2c_get(A, D, L) i2c_get(&I2C_KBLED, 0x68, A, D, L)
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#define kbled_i2c_set(A, D, L) i2c_set(&I2C_KBLED, 0x68, A, D, L)
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static uint8_t __code levels[] = {
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0x00,
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0x80,
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0x90,
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0xA8,
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0xC0,
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0xFF
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};
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void kbled_init(void) {
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i2c_reset(&I2C_KBLED, true);
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kbled_set(0xFF);
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kbled_set_color(0xFFFFFF);
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}
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uint8_t kbled_get(void) {
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uint8_t level;
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uint8_t raw = 0;
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kbled_i2c_get(0x12, &raw, 1);
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for (level = 0; level < ARRAY_SIZE(levels); level++) {
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if (raw <= levels[level]) {
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return level;
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}
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}
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return 0;
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}
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void kbled_set(uint8_t level) {
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uint8_t raw = 0;
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if (level < ARRAY_SIZE(levels)) {
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raw = levels[level];
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}
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kbled_i2c_set(0x12, &raw, 1);
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}
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void kbled_set_color(uint32_t color) {
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uint8_t b = (uint8_t)(color);
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kbled_i2c_set(0x02, &b, 1);
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kbled_i2c_set(0x03, &b, 1);
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kbled_i2c_set(0x04, &b, 1);
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uint8_t g = (uint8_t)(color >> 8);
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kbled_i2c_set(0x05, &g, 1);
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kbled_i2c_set(0x06, &g, 1);
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kbled_i2c_set(0x07, &g, 1);
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uint8_t r = (uint8_t)(color >> 16);
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kbled_i2c_set(0x08, &r, 1);
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kbled_i2c_set(0x09, &r, 1);
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kbled_i2c_set(0x0A, &r, 1);
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}
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@ -9,6 +9,7 @@
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#include <board/gpio.h>
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#include <board/gctrl.h>
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#include <board/kbc.h>
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#include <board/kbled.h>
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#include <board/kbscan.h>
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#include <board/lid.h>
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#include <board/peci.h>
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@ -41,6 +42,7 @@ void init(void) {
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// Can happen in any order
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ecpm_init();
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kbc_init();
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kbled_init();
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kbscan_init();
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peci_init();
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pmc_init();
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@ -14,6 +14,14 @@ struct I2C {
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volatile uint8_t * trasla;
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};
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struct I2C __code I2C_0 = {
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.hosta = HOSTAA,
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.hoctl = HOCTLA,
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.hoctl2 = HOCTL2A,
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.hobdb = HOBDBA,
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.trasla = TRASLAA,
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};
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struct I2C __code I2C_1 = {
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.hosta = HOSTAB,
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.hoctl = HOCTLB,
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@ -22,6 +22,14 @@ struct I2C __code I2C_0 = {
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.trasla = TRASLAA,
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};
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struct I2C __code I2C_1 = {
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.hosta = HOSTAB,
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.hoctl = HOCTLB,
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.hoctl2 = HOCTL2B,
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.hobdb = HOBDBB,
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.trasla = TRASLAB,
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};
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void i2c_reset(struct I2C * i2c, bool kill) {
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if (*(i2c->hosta) & HOSTA_BUSY) {
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// Set kill bit
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@ -4,6 +4,7 @@
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#include <common/i2c.h>
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extern struct I2C __code I2C_0;
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extern struct I2C __code I2C_1;
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void i2c_reset(struct I2C * i2c, bool kill);
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@ -52,6 +52,45 @@ volatile uint8_t __xdata __at(0x1C3F) RESLADR2A;
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// SMCLK timing setting for channel A
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volatile uint8_t __xdata __at(0x1C40) SCLKTSA;
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// Host status for channel B
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volatile uint8_t __xdata __at(0x1C11) HOSTAB;
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// Host control for channel B
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volatile uint8_t __xdata __at(0x1C12) HOCTLB;
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// Host command for channel B
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volatile uint8_t __xdata __at(0x1C13) HOCMDB;
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// Transmit slave address for channel B
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volatile uint8_t __xdata __at(0x1C14) TRASLAB;
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// Host data 0 for channel B
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volatile uint8_t __xdata __at(0x1C15) D0REGB;
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// Host data 1 for channel B
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volatile uint8_t __xdata __at(0x1C16) D1REGB;
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// Host block data byte for channel B
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volatile uint8_t __xdata __at(0x1C17) HOBDBB;
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// Packet error check for channel B
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volatile uint8_t __xdata __at(0x1C18) PECERCB;
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// Receive slave address for channel B
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volatile uint8_t __xdata __at(0x1C19) RESLADRB;
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// Slave data for channel B
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volatile uint8_t __xdata __at(0x1C1A) SLDAB;
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// SMBus pin control for channel B
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volatile uint8_t __xdata __at(0x1C1B) SMBPCTLB;
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// Slave status for channel B
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volatile uint8_t __xdata __at(0x1C1C) SLSTAB;
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// Slave interrupt control for channel B
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volatile uint8_t __xdata __at(0x1C1D) SICRB;
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// Notify device address for channel B
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volatile uint8_t __xdata __at(0x1C1E) NDADRB;
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// Notify data low byte for channel A
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volatile uint8_t __xdata __at(0x1C1F) NDLBB;
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// Notify data high byte for channel B
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volatile uint8_t __xdata __at(0x1C20) NDHBB;
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// Host control 2 for channel B
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volatile uint8_t __xdata __at(0x1C21) HOCTL2B;
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// Receive slave address 2 for channel B
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volatile uint8_t __xdata __at(0x1C44) RESLADR2B;
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// SMCLK timing setting for channel B
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volatile uint8_t __xdata __at(0x1C41) SCLKTSB;
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// Timing registers
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volatile uint8_t __xdata __at(0x1C22) SMB4P7USL;
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volatile uint8_t __xdata __at(0x1C23) SMB4P0USL;
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