board/system76/common: use SLP_S0# pin for modern standby detection
Previously, CPU_C10_GATE# was used for detecting entry into s0ix / Modern Standby. Intel documentation says that SLP_S0# should be used for s0ix detection instead, and CPU_C10_GATE# is intended for VCCSTG power gating, so switch the pin to improve s0ix detection reliability. Fixes https://github.com/system76/firmware-open/issues/199 References: - Intel docs #575570 rev 0.5, #607872 rev 2.2 - Chromium EC: https://chromium.googlesource.com/chromiumos/platform/ec/+/master/power/intel_x86.c#41 Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
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Tim Crawford
parent
49abf83c08
commit
cc3effb6a4
@ -127,8 +127,8 @@ uint8_t peci_get_fan_duty(void) {
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uint8_t duty;
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uint8_t duty;
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#if USE_S0IX
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#if USE_S0IX
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// Use PECI if CPU is not in C10 state
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// Use PECI if platform is not in CS
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peci_on = gpio_get(&CPU_C10_GATE_N);
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peci_on = gpio_get(&SLP_S0_N);
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#else // USE_S0IX
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#else // USE_S0IX
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// Use PECI if in S0 state
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// Use PECI if in S0 state
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peci_on = power_state == POWER_STATE_S0;
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peci_on = power_state == POWER_STATE_S0;
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@ -318,7 +318,7 @@ void power_set_limit(void) {
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static bool last_power_limit_ac = true;
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static bool last_power_limit_ac = true;
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// We don't use power_state because the latency needs to be low
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// We don't use power_state because the latency needs to be low
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#if USE_S0IX
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#if USE_S0IX
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if (gpio_get(&CPU_C10_GATE_N)) {
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if (gpio_get(&SLP_S0_N)) {
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#else
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#else
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if (gpio_get(&BUF_PLT_RST_N)) {
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if (gpio_get(&BUF_PLT_RST_N)) {
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#endif
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#endif
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@ -552,7 +552,7 @@ void power_event(void) {
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uint32_t time = time_get();
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uint32_t time = time_get();
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if (power_state == POWER_STATE_S0) {
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if (power_state == POWER_STATE_S0) {
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#if USE_S0IX
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#if USE_S0IX
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if (!gpio_get(&CPU_C10_GATE_N)) {
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if (!gpio_get(&SLP_S0_N)) {
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// Modern suspend, flashing green light
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// Modern suspend, flashing green light
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if ((time - last_time) >= 1000) {
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if ((time - last_time) >= 1000) {
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gpio_set(&LED_PWR, !gpio_get(&LED_PWR));
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gpio_set(&LED_PWR, !gpio_get(&LED_PWR));
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