From ff53939a5667c9ba05e5f478653913f695530363 Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Wed, 9 Jun 2021 15:39:39 -0600 Subject: [PATCH] Add gaze16 --- src/board/system76/common/power.c | 12 +- src/board/system76/gaze15/gpio.c | 24 +- src/board/system76/gaze16-3050/board.c | 30 ++ src/board/system76/gaze16-3050/board.mk | 59 ++++ src/board/system76/gaze16-3050/gpio.c | 279 +++++++++++++++++ .../system76/gaze16-3050/include/board/gpio.h | 42 +++ src/board/system76/gaze16-3060/board.c | 30 ++ src/board/system76/gaze16-3060/board.mk | 59 ++++ src/board/system76/gaze16-3060/gpio.c | 280 ++++++++++++++++++ .../system76/gaze16-3060/include/board/gpio.h | 42 +++ 10 files changed, 846 insertions(+), 11 deletions(-) create mode 100644 src/board/system76/gaze16-3050/board.c create mode 100644 src/board/system76/gaze16-3050/board.mk create mode 100644 src/board/system76/gaze16-3050/gpio.c create mode 100644 src/board/system76/gaze16-3050/include/board/gpio.h create mode 100644 src/board/system76/gaze16-3060/board.c create mode 100644 src/board/system76/gaze16-3060/board.mk create mode 100644 src/board/system76/gaze16-3060/gpio.c create mode 100644 src/board/system76/gaze16-3060/include/board/gpio.h diff --git a/src/board/system76/common/power.c b/src/board/system76/common/power.c index cf9fdbd..73b969c 100644 --- a/src/board/system76/common/power.c +++ b/src/board/system76/common/power.c @@ -55,6 +55,10 @@ #define HAVE_PCH_PWROK_EC 1 #endif +#ifndef HAVE_PM_PWROK + #define HAVE_PM_PWROK 1 +#endif + #ifndef HAVE_SLP_SUS_N #define HAVE_SLP_SUS_N 1 #endif @@ -290,7 +294,7 @@ void power_on_s5(void) { // Wait for SUSPWRDNACK validity tPLT01; - for (int i = 0; i < 1000; i++) { + for (int i = 0; i < 5000; i++) { // If we reached S0, exit this loop update_power_state(); if (power_state == POWER_STATE_S0) { @@ -321,8 +325,10 @@ void power_off_s5(void) { GPIO_SET_DEBUG(PCH_PWROK_EC, false); #endif // HAVE_PCH_PWROK_EC +#if HAVE_PM_PWROK // De-assert PCH_PWROK GPIO_SET_DEBUG(PM_PWROK, false); +#endif // HAVE_PM_PWROK #if HAVE_EC_EN // Block processor from controlling SUSB# and SUSC# @@ -506,8 +512,10 @@ void power_event(void) { //TODO: tPLT04; +#if HAVE_PM_PWROK // Allow H_VR_READY to set PCH_PWROK GPIO_SET_DEBUG(PM_PWROK, true); +#endif // HAVE_PM_PWROK // OEM defined delay from ALL_SYS_PWRGD to SYS_PWROK - TODO delay_ms(10); @@ -524,8 +532,10 @@ void power_event(void) { GPIO_SET_DEBUG(PCH_PWROK_EC, false); #endif // HAVE_PCH_PWROK_EC +#if HAVE_PM_PWROK // De-assert PCH_PWROK GPIO_SET_DEBUG(PM_PWROK, false); +#endif // HAVE_PM_PWROK } pg_last = pg_new; diff --git a/src/board/system76/gaze15/gpio.c b/src/board/system76/gaze15/gpio.c index 1e98a6d..eb0b8ba 100644 --- a/src/board/system76/gaze15/gpio.c +++ b/src/board/system76/gaze15/gpio.c @@ -45,16 +45,20 @@ void gpio_init() { GCR20 = 0; // Set GPIO data - GPDRA = 0x00; - GPDRB = 0x58; - GPDRC = 0x00; - GPDRD = 0x38; - GPDRE = 0x00; - GPDRF = 0x40; - GPDRG = 0x00; - GPDRH = 0x80; - GPDRI = 0x00; - GPDRJ = 0x00; + GPDRA = 0; + // H_PROCHOT_EC, XLP_OUT, PWR_SW# + GPDRB = BIT(6) | BIT(4) | BIT(3); + GPDRC = 0; + // PWR_BTN#, SMI#, SCI# + GPDRD = BIT(5) | BIT(4) | BIT(3); + GPDRE = 0; + // EC_PECI + GPDRF = BIT(6); + GPDRG = 0; + // AIRPLAN_LED# + GPDRH = BIT(7); + GPDRI = 0; + GPDRJ = 0; // Set GPIO control // EC_PWM_PIN_24 diff --git a/src/board/system76/gaze16-3050/board.c b/src/board/system76/gaze16-3050/board.c new file mode 100644 index 0000000..e793470 --- /dev/null +++ b/src/board/system76/gaze16-3050/board.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#include +#include +#include +#include +#include +#include +#include +#include + +void board_init(void) { + espi_init(); + + // Make sure charger is in off state, also enables PSYS + battery_charger_disable(); + + // Allow backlight to be turned on + gpio_set(&BKL_EN, true); + // Enable camera + gpio_set(&CCD_EN, true); +} + +void board_event(void) { + power_set_limit(); + + espi_event(); + + ec_read_post_codes(); +} diff --git a/src/board/system76/gaze16-3050/board.mk b/src/board/system76/gaze16-3050/board.mk new file mode 100644 index 0000000..10480e1 --- /dev/null +++ b/src/board/system76/gaze16-3050/board.mk @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-3.0-only + +EC=it5570e + +# Enable eSPI +CFLAGS+=-DEC_ESPI=1 + +# Include keyboard +KEYBOARD=15in_102 + +# Set keyboard LED mechanism +KBLED=rgb_pwm + +# Set discrete GPU I2C bus +CFLAGS+=-DI2C_DGPU=I2C_1 + +# Set battery I2C bus +CFLAGS+=-DI2C_SMBUS=I2C_4 + +# Set touchpad PS2 bus +CFLAGS+=-DPS2_TOUCHPAD=PS2_3 + +# Set smart charger parameters +CHARGER=oz26786 +CFLAGS+=\ + -DCHARGER_CHARGE_CURRENT=1536 \ + -DCHARGER_CHARGE_VOLTAGE=16800 \ + -DCHARGER_INPUT_CURRENT=9230 + +# Set CPU power limits in watts +CFLAGS+=\ + -DPOWER_LIMIT_AC=180 \ + -DPOWER_LIMIT_DC=28 + +# Custom fan curve +CFLAGS+=-DBOARD_HEATUP=5 +CFLAGS+=-DBOARD_COOLDOWN=20 +CFLAGS+=-DBOARD_FAN_POINTS="\ + FAN_POINT(60, 40), \ + FAN_POINT(65, 60), \ + FAN_POINT(70, 75), \ + FAN_POINT(75, 90), \ + FAN_POINT(80, 100) \ +" + +# Enable DGPU support +CFLAGS+=-DHAVE_DGPU=1 +CFLAGS+=-DBOARD_DGPU_HEATUP=5 +CFLAGS+=-DBOARD_DGPU_COOLDOWN=20 +CFLAGS+=-DBOARD_DGPU_FAN_POINTS="\ + FAN_POINT(60, 40), \ + FAN_POINT(65, 60), \ + FAN_POINT(70, 75), \ + FAN_POINT(75, 90), \ + FAN_POINT(80, 100) \ +" + +# Add system76 common code +include src/board/system76/common/common.mk diff --git a/src/board/system76/gaze16-3050/gpio.c b/src/board/system76/gaze16-3050/gpio.c new file mode 100644 index 0000000..f5f2ac7 --- /dev/null +++ b/src/board/system76/gaze16-3050/gpio.c @@ -0,0 +1,279 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#include +#include + +struct Gpio __code ACIN_N = GPIO(B, 0); +struct Gpio __code AC_PRESENT = GPIO(E, 1); +struct Gpio __code ALL_SYS_PWRGD = GPIO(C, 0); +struct Gpio __code BKL_EN = GPIO(C, 7); +struct Gpio __code BUF_PLT_RST_N = GPIO(D, 2); +struct Gpio __code CCD_EN = GPIO(D, 1); +struct Gpio __code CPU_C10_GATE_N = GPIO(H, 0); +struct Gpio __code DD_ON = GPIO(E, 4); +struct Gpio __code DGPU_PWR_EN = GPIO(J, 2); +struct Gpio __code EC_EN = GPIO(B, 6); // renamed to SUSBC_EN# +struct Gpio __code EC_RSMRST_N = GPIO(E, 5); +struct Gpio __code GC6_FB_EN = GPIO(J, 3); +struct Gpio __code LAN_WAKEUP_N = GPIO(B, 2); +struct Gpio __code LED_ACIN = GPIO(H, 2); +struct Gpio __code LED_AIRPLANE_N = GPIO(H, 7); +struct Gpio __code LED_BAT_CHG = GPIO(H, 5); +struct Gpio __code LED_BAT_FULL = GPIO(J, 0); +struct Gpio __code LED_PWR = GPIO(D, 0); +struct Gpio __code LID_SW_N = GPIO(B, 1); +struct Gpio __code PCH_DPWROK_EC = GPIO(F, 3); +struct Gpio __code PCH_PWROK_EC = GPIO(C, 6); // renamed to EC_SYS_PWROK +struct Gpio __code PWR_BTN_N = GPIO(D, 5); +struct Gpio __code PWR_SW_N = GPIO(B, 3); +struct Gpio __code SLP_SUS_N = GPIO(H, 3); +struct Gpio __code SUSB_N_PCH = GPIO(H, 6); +struct Gpio __code SUSC_N_PCH = GPIO(H, 1); +struct Gpio __code VA_EC_EN = GPIO(J, 4); +struct Gpio __code XLP_OUT = GPIO(B, 4); + +void gpio_init() { + // Enable LPC reset on GPD2 + GCR = 0x04; + // Disable UARTs + GCR6 = 0; + // Enable SMBus channel 4 + GCR15 = BIT(4); + // Set GPD2 to 1.8V + GCR19 = BIT(0); + // Set GPF2 and GPF3 to 3.3V + GCR20 = 0; + // Set GPH0 to 1.8V + GCR21 = BIT(2); + + // Set GPIO data + // WLAN_PWR_EN + GPDRA = BIT(3); + // SWI#, XLP_OUT, PWR_SW# + GPDRB = BIT(5) | BIT(4) | BIT(3); + GPDRC = 0; + // PWR_BTN#, SMI#, SCI# + GPDRD = BIT(5) | BIT(4) | BIT(3); + GPDRE = 0; + // CC_EN, PCH_DPWROK_EC + GPDRF = BIT(7) | BIT(3); + // H_PROCHOT_EC, WLAN_EN + GPDRG = BIT(6) | BIT(1); + // AIRPLAN_LED# + GPDRH = BIT(7); + GPDRI = 0; + GPDRJ = 0; + + // Set GPIO control + // EC_PWM_LEDKB_P + GPCRA0 = GPIO_ALT; + // KBC_BEEP + GPCRA1 = GPIO_ALT; + // CPU_FANPWM + GPCRA2 = GPIO_ALT; + // WLAN_PWR_EN + GPCRA3 = GPIO_OUT | GPIO_UP; + // VGA_FAN_PWM + GPCRA4 = GPIO_ALT; + // EC_PWM_LEDKB_R + GPCRA5 = GPIO_ALT; + // EC_PWM_LEDKB_G + GPCRA6 = GPIO_ALT; + // EC_PWM_LEDKB_B + GPCRA7 = GPIO_ALT; + // AC_IN# + GPCRB0 = GPIO_IN | GPIO_UP; + // LID_SW# + GPCRB1 = GPIO_IN | GPIO_UP; + // LAN_WAKE# + GPCRB2 = GPIO_IN | GPIO_UP; + // PWR_SW# + GPCRB3 = GPIO_IN; + // XLP_OUT + GPCRB4 = GPIO_OUT; + // SWI# + GPCRB5 = GPIO_OUT | GPIO_UP; + // SUSBC_EC# + GPCRB6 = GPIO_OUT | GPIO_UP; + // + GPCRB7 = GPIO_IN; + // ALL_SYS_PWRGD + GPCRC0 = GPIO_IN; + // SMC_VGA_THERM + GPCRC1 = GPIO_ALT; + // SMD_VGA_THERM + GPCRC2 = GPIO_ALT; + // KB-SO16 + GPCRC3 = GPIO_IN; + // CNVI_DET# + GPCRC4 = GPIO_IN | GPIO_UP; + // KB-SO17 + GPCRC5 = GPIO_IN; + // EC_SYS_PWROK + GPCRC6 = GPIO_OUT; + // BKL_EN + GPCRC7 = GPIO_OUT | GPIO_UP; + // LED_PWR + GPCRD0 = GPIO_OUT | GPIO_UP; + // CCD_EN + GPCRD1 = GPIO_OUT | GPIO_UP; + // BUF_PLT_RST# + GPCRD2 = GPIO_ALT; + // SCI# + GPCRD3 = GPIO_IN; + // SMI# + GPCRD4 = GPIO_IN; + // PWR_BTN# + GPCRD5 = GPIO_OUT | GPIO_UP; + // CPU_FANSEN + GPCRD6 = GPIO_ALT; + // VGA_FANSEN + GPCRD7 = GPIO_ALT; + // SMC_BAT + GPCRE0 = GPIO_ALT; + // AC_PRESENT + GPCRE1 = GPIO_OUT | GPIO_UP; + // RGBKB-DET# + GPCRE2 = GPIO_IN | GPIO_UP; + // USB_PWR_EN# + GPCRE3 = GPIO_OUT; + // DD_ON + GPCRE4 = GPIO_OUT | GPIO_DOWN; + // EC_RSMRST# + GPCRE5 = GPIO_OUT; + // SB_KBCRST# + GPCRE6 = GPIO_IN; + // SMD_BAT + GPCRE7 = GPIO_ALT; + // 80CLK + GPCRF0 = GPIO_IN; + // USB_CHARGE_EN + GPCRF1 = GPIO_OUT | GPIO_UP; + // 3IN1 + GPCRF2 = GPIO_IN | GPIO_UP; + // PCH_DPWROK_EC + GPCRF3 = GPIO_OUT; + // TP_CLK + GPCRF4 = GPIO_ALT; + // TP_DATA + GPCRF5 = GPIO_ALT; + // H_PECI + GPCRF6 = GPIO_ALT; + // CC_EN + GPCRF7 = GPIO_OUT | GPIO_UP; + // dGPU_GPIO8_OVERT + GPCRG0 = GPIO_IN | GPIO_UP; + // EC_WLAN_EN + GPCRG1 = GPIO_OUT | GPIO_UP; + // AUTO_LOAD_PWR + GPCRG2 = GPIO_IN; + // ALSPI_CE#_L + GPCRG3 = GPIO_ALT; + // ALSPI_MSI_L + GPCRG4 = GPIO_ALT; + // ALSPI_MS0_L + GPCRG5 = GPIO_ALT; + // H_PROCHOT_EC + GPCRG6 = GPIO_OUT | GPIO_UP; + // ALSPI_SCLK_L + GPCRG7 = GPIO_ALT; + // CPU_C10_GATE#_R + GPCRH0 = GPIO_IN; + // SUSC#_PCH + GPCRH1 = GPIO_IN; + // LED_ACIN + GPCRH2 = GPIO_OUT | GPIO_UP; + // SLP_SUS# + GPCRH3 = GPIO_IN; + // d_GPIO9_ALERT_FAN + GPCRH4 = GPIO_IN; + // LED_BAT_CHG + GPCRH5 = GPIO_OUT | GPIO_UP; + // SUSB#_PCH + GPCRH6 = GPIO_IN; + // AIRPLAN_LED# + GPCRH7 = GPIO_OUT | GPIO_UP; + // BAT_DET + GPCRI0 = GPIO_ALT; + // BAT_VOLT + GPCRI1 = GPIO_ALT; + // ME_WE + GPCRI2 = GPIO_OUT; + // THERM_VOLT + GPCRI3 = GPIO_ALT; + // TOTAL_CUR + GPCRI4 = GPIO_ALT; + // CC1_DET + GPCRI5 = GPIO_ALT; + // CC2_DET + GPCRI6 = GPIO_ALT; + // MODEL_ID + GPCRI7 = GPIO_IN; + // LED_BAT_FULL + GPCRJ0 = GPIO_OUT | GPIO_UP; + // KBC_MUTE# + GPCRJ1 = GPIO_IN; + // DGPU_PWR_EN + GPCRJ2 = GPIO_IN; + // GC6_FB_EN_PCH + GPCRJ3 = GPIO_IN; + // EC_VA_EN + GPCRJ4 = GPIO_OUT; + // VBATT_BOOST# + GPCRJ5 = GPIO_OUT; + // EC_GPIO + GPCRJ6 = GPIO_OUT; + // VR_ON + GPCRJ7 = GPIO_IN; + // ESPI_AD0 + GPCRM0 = GPIO_ALT; + // ESPI_AD1 + GPCRM1 = GPIO_ALT; + // ESPI_AD2 + GPCRM2 = GPIO_ALT; + // ESPI_AD3 + GPCRM3 = GPIO_ALT; + // ESPI_KBC + GPCRM4 = GPIO_ALT; + // ESPI_FRAME# + GPCRM5 = GPIO_ALT; + // SERIRQ + GPCRM6 = GPIO_IN | GPIO_UP; +} + +#if GPIO_DEBUG +void gpio_debug_bank( + char * bank, + uint8_t data, + uint8_t mirror, + uint8_t pot, + volatile uint8_t * control +) { + for(char i = 0; i < 8; i++) { + DEBUG( + "%s%d:\n\tdata %d\n\tmirror %d\n\tpot %d\n\tcontrol %02X\n", + bank, + i, + (data >> i) & 1, + (mirror >> i) & 1, + (pot >> i) & 1, + *(control + i) + ); + } +} + +void gpio_debug(void) { + #define bank(BANK) gpio_debug_bank(#BANK, GPDR ## BANK, GPDMR ## BANK, GPOT ## BANK, &GPCR ## BANK ## 0) + bank(A); + bank(B); + bank(C); + bank(D); + bank(E); + bank(F); + bank(G); + bank(H); + bank(I); + bank(J); + #undef bank +} +#endif diff --git a/src/board/system76/gaze16-3050/include/board/gpio.h b/src/board/system76/gaze16-3050/include/board/gpio.h new file mode 100644 index 0000000..28ed278 --- /dev/null +++ b/src/board/system76/gaze16-3050/include/board/gpio.h @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#ifndef _BOARD_GPIO_H +#define _BOARD_GPIO_H + +#include + +void gpio_init(void); +void gpio_debug(void); + +extern struct Gpio __code ACIN_N; +extern struct Gpio __code AC_PRESENT; +extern struct Gpio __code ALL_SYS_PWRGD; +extern struct Gpio __code BKL_EN; +extern struct Gpio __code BUF_PLT_RST_N; +extern struct Gpio __code CCD_EN; +extern struct Gpio __code CPU_C10_GATE_N; +extern struct Gpio __code DD_ON; +extern struct Gpio __code DGPU_PWR_EN; +extern struct Gpio __code EC_EN; +extern struct Gpio __code EC_RSMRST_N; +extern struct Gpio __code GC6_FB_EN; +extern struct Gpio __code LAN_WAKEUP_N; +extern struct Gpio __code LED_ACIN; +extern struct Gpio __code LED_AIRPLANE_N; +extern struct Gpio __code LED_BAT_CHG; +extern struct Gpio __code LED_BAT_FULL; +extern struct Gpio __code LED_PWR; +extern struct Gpio __code LID_SW_N; +extern struct Gpio __code PCH_DPWROK_EC; +extern struct Gpio __code PCH_PWROK_EC; +#define HAVE_PM_PWROK 0 +extern struct Gpio __code PWR_BTN_N; +extern struct Gpio __code PWR_SW_N; +extern struct Gpio __code SLP_SUS_N; +#define HAVE_SUS_PWR_ACK 0 +extern struct Gpio __code SUSB_N_PCH; +extern struct Gpio __code SUSC_N_PCH; +extern struct Gpio __code VA_EC_EN; +extern struct Gpio __code XLP_OUT; + +#endif // _BOARD_GPIO_H diff --git a/src/board/system76/gaze16-3060/board.c b/src/board/system76/gaze16-3060/board.c new file mode 100644 index 0000000..e793470 --- /dev/null +++ b/src/board/system76/gaze16-3060/board.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#include +#include +#include +#include +#include +#include +#include +#include + +void board_init(void) { + espi_init(); + + // Make sure charger is in off state, also enables PSYS + battery_charger_disable(); + + // Allow backlight to be turned on + gpio_set(&BKL_EN, true); + // Enable camera + gpio_set(&CCD_EN, true); +} + +void board_event(void) { + power_set_limit(); + + espi_event(); + + ec_read_post_codes(); +} diff --git a/src/board/system76/gaze16-3060/board.mk b/src/board/system76/gaze16-3060/board.mk new file mode 100644 index 0000000..10480e1 --- /dev/null +++ b/src/board/system76/gaze16-3060/board.mk @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-3.0-only + +EC=it5570e + +# Enable eSPI +CFLAGS+=-DEC_ESPI=1 + +# Include keyboard +KEYBOARD=15in_102 + +# Set keyboard LED mechanism +KBLED=rgb_pwm + +# Set discrete GPU I2C bus +CFLAGS+=-DI2C_DGPU=I2C_1 + +# Set battery I2C bus +CFLAGS+=-DI2C_SMBUS=I2C_4 + +# Set touchpad PS2 bus +CFLAGS+=-DPS2_TOUCHPAD=PS2_3 + +# Set smart charger parameters +CHARGER=oz26786 +CFLAGS+=\ + -DCHARGER_CHARGE_CURRENT=1536 \ + -DCHARGER_CHARGE_VOLTAGE=16800 \ + -DCHARGER_INPUT_CURRENT=9230 + +# Set CPU power limits in watts +CFLAGS+=\ + -DPOWER_LIMIT_AC=180 \ + -DPOWER_LIMIT_DC=28 + +# Custom fan curve +CFLAGS+=-DBOARD_HEATUP=5 +CFLAGS+=-DBOARD_COOLDOWN=20 +CFLAGS+=-DBOARD_FAN_POINTS="\ + FAN_POINT(60, 40), \ + FAN_POINT(65, 60), \ + FAN_POINT(70, 75), \ + FAN_POINT(75, 90), \ + FAN_POINT(80, 100) \ +" + +# Enable DGPU support +CFLAGS+=-DHAVE_DGPU=1 +CFLAGS+=-DBOARD_DGPU_HEATUP=5 +CFLAGS+=-DBOARD_DGPU_COOLDOWN=20 +CFLAGS+=-DBOARD_DGPU_FAN_POINTS="\ + FAN_POINT(60, 40), \ + FAN_POINT(65, 60), \ + FAN_POINT(70, 75), \ + FAN_POINT(75, 90), \ + FAN_POINT(80, 100) \ +" + +# Add system76 common code +include src/board/system76/common/common.mk diff --git a/src/board/system76/gaze16-3060/gpio.c b/src/board/system76/gaze16-3060/gpio.c new file mode 100644 index 0000000..a557678 --- /dev/null +++ b/src/board/system76/gaze16-3060/gpio.c @@ -0,0 +1,280 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#include +#include + +struct Gpio __code ACIN_N = GPIO(B, 0); +struct Gpio __code AC_PRESENT = GPIO(E, 1); +struct Gpio __code ALL_SYS_PWRGD = GPIO(C, 0); +struct Gpio __code BKL_EN = GPIO(C, 7); +struct Gpio __code BUF_PLT_RST_N = GPIO(D, 2); +struct Gpio __code CCD_EN = GPIO(D, 1); +struct Gpio __code CPU_C10_GATE_N = GPIO(I, 5); +struct Gpio __code DD_ON = GPIO(E, 4); +struct Gpio __code DGPU_PWR_EN = GPIO(J, 2); +struct Gpio __code EC_EN = GPIO(B, 6); // renamed to SUSBC_EN# +struct Gpio __code EC_RSMRST_N = GPIO(E, 5); +struct Gpio __code GC6_FB_EN = GPIO(J, 3); +struct Gpio __code LAN_WAKEUP_N = GPIO(B, 2); +struct Gpio __code LED_ACIN = GPIO(H, 2); +struct Gpio __code LED_AIRPLANE_N = GPIO(H, 7); +struct Gpio __code LED_BAT_CHG = GPIO(H, 3); +struct Gpio __code LED_BAT_FULL = GPIO(J, 0); +struct Gpio __code LED_PWR = GPIO(D, 0); +struct Gpio __code LID_SW_N = GPIO(B, 1); +struct Gpio __code PCH_DPWROK_EC = GPIO(F, 7); +struct Gpio __code PCH_PWROK_EC = GPIO(C, 6); // renamed to EC_SYS_PWROK +struct Gpio __code PM_PWROK = GPIO(H, 5); // actually VR_ON +struct Gpio __code PWR_BTN_N = GPIO(D, 5); +struct Gpio __code PWR_SW_N = GPIO(B, 3); +struct Gpio __code SLP_SUS_N = GPIO(I, 6); +struct Gpio __code SUSB_N_PCH = GPIO(H, 6); +struct Gpio __code SUSC_N_PCH = GPIO(H, 1); +struct Gpio __code VA_EC_EN = GPIO(J, 4); +struct Gpio __code XLP_OUT = GPIO(B, 4); + +void gpio_init() { + // Enable LPC reset on GPD2 + GCR = 0x04; + // Disable UARTs + GCR6 = 0; + // Enable SMBus channel 4 + GCR15 = BIT(4); + // Set GPD2 to 1.8V + GCR19 = BIT(0); + // Set GPF2 and GPF3 to 3.3V + GCR20 = 0; + // Set GPH0 to 1.8V + GCR21 = BIT(2); + + // Set GPIO data + // WLAN_PWR_EN + GPDRA = BIT(3); + // SWI#, XLP_OUT, PWR_SW# + GPDRB = BIT(5) | BIT(4) | BIT(3); + GPDRC = 0; + // PWR_BTN#, SMI#, SCI# + GPDRD = BIT(5) | BIT(4) | BIT(3); + GPDRE = 0; + // PCH_DPWROK_EC + GPDRF = BIT(7); + // H_PROCHOT#_EC, WLAN_EN + GPDRG = BIT(6) | BIT(1); + // AIRPLAN_LED# + GPDRH = BIT(7); + GPDRI = 0; + GPDRJ = 0; + + // Set GPIO control + // EC_PWM_LEDKB_P + GPCRA0 = GPIO_ALT; + // KBC_BEEP + GPCRA1 = GPIO_ALT; + // CPU_FAN + GPCRA2 = GPIO_ALT; + // WLAN_PWR_EN + GPCRA3 = GPIO_OUT | GPIO_UP; + // VGA_FAN + GPCRA4 = GPIO_ALT; + // EC_PWM_LEDKB_R + GPCRA5 = GPIO_ALT; + // EC_PWM_LEDKB_G + GPCRA6 = GPIO_ALT; + // EC_PWM_LEDKB_B + GPCRA7 = GPIO_ALT; + // AC_IN# + GPCRB0 = GPIO_IN | GPIO_UP; + // LID_SW# + GPCRB1 = GPIO_IN | GPIO_UP; + // EC_LAN_WAKEUP# + GPCRB2 = GPIO_IN | GPIO_UP; + // PWR_SW# + GPCRB3 = GPIO_IN; + // XLP_OUT + GPCRB4 = GPIO_OUT; + // SWI# + GPCRB5 = GPIO_OUT | GPIO_UP; + // SUSBC_EC# + GPCRB6 = GPIO_OUT | GPIO_UP; + // Doesn't exist + GPCRB7 = GPIO_IN; + // ALL_SYS_PWRGD + GPCRC0 = GPIO_IN; + // SMC_VGA_THERM + GPCRC1 = GPIO_ALT; + // SMD_VGA_THERM + GPCRC2 = GPIO_ALT; + // KB-SO16 + GPCRC3 = GPIO_IN; + // CNVI_DET# + GPCRC4 = GPIO_IN | GPIO_UP; + // KB-SO17 + GPCRC5 = GPIO_IN; + // EC_SYS_PWROK + GPCRC6 = GPIO_OUT; + // BKL_EN + GPCRC7 = GPIO_OUT | GPIO_UP; + // LED_PWR + GPCRD0 = GPIO_OUT | GPIO_UP; + // CCD_EN + GPCRD1 = GPIO_OUT | GPIO_UP; + // BUF_PLT_RST# / ESPI_RESET_N + GPCRD2 = GPIO_ALT; + // SCI# + GPCRD3 = GPIO_IN; + // SMI# + GPCRD4 = GPIO_IN; + // PWR_BTN# + GPCRD5 = GPIO_OUT | GPIO_UP; + // CPU_FANSEN + GPCRD6 = GPIO_ALT; + // VGA_FANSEN + GPCRD7 = GPIO_ALT; + // SMC_BAT + GPCRE0 = GPIO_ALT; + // AC_PRESENT + GPCRE1 = GPIO_OUT | GPIO_UP; + // RGBKB-DET# + GPCRE2 = GPIO_IN | GPIO_UP; + // USB_PWR_EN# + GPCRE3 = GPIO_OUT; + // DD_ON + GPCRE4 = GPIO_OUT | GPIO_DOWN; + // EC_RSMRST# + GPCRE5 = GPIO_OUT; + // SB_KBCRST# + GPCRE6 = GPIO_IN; + // SMD_BAT + GPCRE7 = GPIO_ALT; + // 80CLK + GPCRF0 = GPIO_IN; + // USB_CHARGE_EN + GPCRF1 = GPIO_OUT | GPIO_UP; + // 3IN1 + GPCRF2 = GPIO_IN | GPIO_UP; + // XXX: M2M_SSD1_PLN# / M2M_SSD2_PLN# + GPCRF3 = GPIO_IN; + // TP_CLK + GPCRF4 = GPIO_ALT; + // TP_DATA + GPCRF5 = GPIO_ALT; + // H_PECI + GPCRF6 = GPIO_ALT; + // PCH_DPWROK_EC + GPCRF7 = GPIO_OUT; + // dGPU_OVERT_EC + GPCRG0 = GPIO_IN | GPIO_UP; + // WLAN_EN + GPCRG1 = GPIO_OUT | GPIO_UP; + // AUTO_LOAD_PWR + GPCRG2 = GPIO_IN; + // ALSPI_CE# + GPCRG3 = GPIO_ALT; + // ALSPI_MSI + GPCRG4 = GPIO_ALT; + // ALSPI_MSO + GPCRG5 = GPIO_ALT; + // H_PROCHOT#_EC + GPCRG6 = GPIO_OUT | GPIO_UP; + // ALSPI_SCLK + GPCRG7 = GPIO_ALT; + // SLP_S0# + GPCRH0 = GPIO_IN; + // SUSC#_PCH + GPCRH1 = GPIO_IN; + // LED_ACIN + GPCRH2 = GPIO_OUT | GPIO_UP; + // LED_BAT_CHG + GPCRH3 = GPIO_OUT | GPIO_UP; + // d_GPIO9_ALERT_FAN + GPCRH4 = GPIO_IN; + // VR_ON + GPCRH5 = GPIO_OUT; + // SUSB#_PCH + GPCRH6 = GPIO_IN; + // AIRPLAN_LED# + GPCRH7 = GPIO_OUT | GPIO_UP; + // BAT_DET + GPCRI0 = GPIO_ALT; + // BAT_VOLT + GPCRI1 = GPIO_ALT; + // ME_WE + GPCRI2 = GPIO_OUT; + // THERM_VOLT + GPCRI3 = GPIO_ALT; + // TOTAL_CUR + GPCRI4 = GPIO_ALT; + // SLP_A# / CPU_C10_GATE#_EC + GPCRI5 = GPIO_IN; + // SLP_SUS# + GPCRI6 = GPIO_IN; + // MODEL_ID + GPCRI7 = GPIO_IN; + // LED_BAT_FULL + GPCRJ0 = GPIO_OUT | GPIO_UP; + // KBC_MUTE# + GPCRJ1 = GPIO_IN; + // DGPU_PWR_EN + GPCRJ2 = GPIO_IN; + // GC6_FB_EN_PCH + GPCRJ3 = GPIO_IN; + // VA_EC_EN + GPCRJ4 = GPIO_OUT; + // VBATT_BOOST# + GPCRJ5 = GPIO_OUT; + // EC_GPIO + GPCRJ6 = GPIO_OUT; + // PERKB-DET#_R + GPCRJ7 = GPIO_IN | GPIO_UP; + // ESPI_IO0 + GPCRM0 = GPIO_ALT; + // ESPI_IO1 + GPCRM1 = GPIO_ALT; + // ESPI_IO2 + GPCRM2 = GPIO_ALT; + // ESPI_IO3 + GPCRM3 = GPIO_ALT; + // ESPI_CLK + GPCRM4 = GPIO_ALT; + // ESPI_CS# + GPCRM5 = GPIO_ALT; + // ESPI_ALRT0# + GPCRM6 = GPIO_IN | GPIO_UP; +} + +#if GPIO_DEBUG +void gpio_debug_bank( + char * bank, + uint8_t data, + uint8_t mirror, + uint8_t pot, + volatile uint8_t * control +) { + for(char i = 0; i < 8; i++) { + DEBUG( + "%s%d:\n\tdata %d\n\tmirror %d\n\tpot %d\n\tcontrol %02X\n", + bank, + i, + (data >> i) & 1, + (mirror >> i) & 1, + (pot >> i) & 1, + *(control + i) + ); + } +} + +void gpio_debug(void) { + #define bank(BANK) gpio_debug_bank(#BANK, GPDR ## BANK, GPDMR ## BANK, GPOT ## BANK, &GPCR ## BANK ## 0) + bank(A); + bank(B); + bank(C); + bank(D); + bank(E); + bank(F); + bank(G); + bank(H); + bank(I); + bank(J); + #undef bank +} +#endif diff --git a/src/board/system76/gaze16-3060/include/board/gpio.h b/src/board/system76/gaze16-3060/include/board/gpio.h new file mode 100644 index 0000000..8b769f5 --- /dev/null +++ b/src/board/system76/gaze16-3060/include/board/gpio.h @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#ifndef _BOARD_GPIO_H +#define _BOARD_GPIO_H + +#include + +void gpio_init(void); +void gpio_debug(void); + +extern struct Gpio __code ACIN_N; +extern struct Gpio __code AC_PRESENT; +extern struct Gpio __code ALL_SYS_PWRGD; +extern struct Gpio __code BKL_EN; +extern struct Gpio __code BUF_PLT_RST_N; +extern struct Gpio __code CCD_EN; +extern struct Gpio __code CPU_C10_GATE_N; +extern struct Gpio __code DD_ON; +extern struct Gpio __code DGPU_PWR_EN; +extern struct Gpio __code EC_EN; +extern struct Gpio __code EC_RSMRST_N; +extern struct Gpio __code GC6_FB_EN; +extern struct Gpio __code LAN_WAKEUP_N; +extern struct Gpio __code LED_ACIN; +extern struct Gpio __code LED_AIRPLANE_N; +extern struct Gpio __code LED_BAT_CHG; +extern struct Gpio __code LED_BAT_FULL; +extern struct Gpio __code LED_PWR; +extern struct Gpio __code LID_SW_N; +extern struct Gpio __code PCH_DPWROK_EC; +extern struct Gpio __code PCH_PWROK_EC; +extern struct Gpio __code PM_PWROK; +extern struct Gpio __code PWR_BTN_N; +extern struct Gpio __code PWR_SW_N; +extern struct Gpio __code SLP_SUS_N; +#define HAVE_SUS_PWR_ACK 0 +extern struct Gpio __code SUSB_N_PCH; +extern struct Gpio __code SUSC_N_PCH; +extern struct Gpio __code VA_EC_EN; +extern struct Gpio __code XLP_OUT; + +#endif // _BOARD_GPIO_H