Update coreboot and configs for galp3-c, darp5, galp4, and darp6
This commit is contained in:
@@ -112,7 +112,7 @@ CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
@@ -129,8 +129,8 @@ CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_ADD_FSP_BINARIES=y
|
||||
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
|
||||
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||
CONFIG_FSP_M_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp_M.fd"
|
||||
CONFIG_FSP_S_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp_S.fd"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
@@ -214,8 +214,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/Include/"
|
||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/FSP.fd"
|
||||
CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Include/"
|
||||
# CONFIG_NHLT_DMIC_1CH_16B is not set
|
||||
# CONFIG_NHLT_DMIC_2CH_16B is not set
|
||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
||||
@@ -235,7 +234,6 @@ CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_BASE=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS=y
|
||||
CONFIG_SOC_INTEL_WHISKEYLAKE=y
|
||||
CONFIG_FSP_TEMP_RAM_SIZE=0x10000
|
||||
# CONFIG_NHLT_MAX98373 is not set
|
||||
CONFIG_MAX_ROOT_PORTS=16
|
||||
CONFIG_MAX_PCIE_CLOCKS=6
|
||||
@@ -421,6 +419,7 @@ CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
@@ -596,7 +595,7 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_FSP_USE_REPO is not set
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
@@ -604,10 +603,10 @@ CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
CONFIG_FSP_T_CBFS="fspt.bin"
|
||||
CONFIG_FSP_T_FILE="$(obj)/Fsp_T.fd"
|
||||
CONFIG_FSP_T_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp_T.fd"
|
||||
CONFIG_FSP_CAR=y
|
||||
CONFIG_FSP_T_XIP=y
|
||||
CONFIG_FSP_USES_CB_STACK=y
|
||||
# CONFIG_FSP_USES_CB_STACK is not set
|
||||
# CONFIG_VERIFY_HOBS is not set
|
||||
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
|
Reference in New Issue
Block a user