diff --git a/apps/firmware-update b/apps/firmware-update
index 6b52aee..3502d47 160000
--- a/apps/firmware-update
+++ b/apps/firmware-update
@@ -1 +1 @@
-Subproject commit 6b52aeef42f7d03052fd646d448936e9cbdc9272
+Subproject commit 3502d47620af7d62a76a347fcc8223ca26e28e43
diff --git a/coreboot b/coreboot
index 89d2235..8d72084 160000
--- a/coreboot
+++ b/coreboot
@@ -1 +1 @@
-Subproject commit 89d2235e0fe85d4377b777e4ebfd020a18da0ad9
+Subproject commit 8d7208434929c9d2c26cd11d4064e43ba4477256
diff --git a/ec b/ec
index 158ec12..7b9b911 160000
--- a/ec
+++ b/ec
@@ -1 +1 @@
-Subproject commit 158ec124fe600fab0e80d41fc5cab1048a4ececa
+Subproject commit 7b9b91187ae09e81cd2b6d1c3ba1e496eacd8a88
diff --git a/models/README.md b/models/README.md
index 7b98537..614f7b8 100644
--- a/models/README.md
+++ b/models/README.md
@@ -8,6 +8,7 @@
 - [darp5](./darp5) - System76 Darter Pro (darp5)
 - [darp6](./darp6) - System76 Darter Pro (darp6)
 - [darp7](./darp7) - System76 Darter Pro (darp7)
+- [darp8](./darp8) - System76 Darter Pro (darp8)
 - [galp2](./galp2) - System76 Galago Pro (galp2)
 - [galp3](./galp3) - System76 Galago Pro (galp3)
 - [galp3-b](./galp3-b) - System76 Galago Pro (galp3-b)
diff --git a/models/darp8/FSP b/models/darp8/FSP
new file mode 120000
index 0000000..2dbf28e
--- /dev/null
+++ b/models/darp8/FSP
@@ -0,0 +1 @@
+../gaze17-3050/FSP
\ No newline at end of file
diff --git a/models/darp8/IntelGopDriver.efi b/models/darp8/IntelGopDriver.efi
new file mode 100644
index 0000000..6355a87
--- /dev/null
+++ b/models/darp8/IntelGopDriver.efi
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:185d56c3577d0ee07a824af4bd6a883f6469c1a4872f1e98cace5221f2c806b6
+size 151008
diff --git a/models/darp8/IntelGopDriver.inf b/models/darp8/IntelGopDriver.inf
new file mode 100644
index 0000000..39b2eb9
--- /dev/null
+++ b/models/darp8/IntelGopDriver.inf
@@ -0,0 +1,9 @@
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = IntelGopDriver
+  FILE_GUID                      = 767222f4-a9f4-41ba-9faa-edaa1405a486
+  MODULE_TYPE                    = UEFI_DRIVER
+  VERSION_STRING                 = 1.0
+
+[Binaries.X64]
+  PE32|IntelGopDriver.efi|*
diff --git a/models/darp8/README.md b/models/darp8/README.md
new file mode 100644
index 0000000..c95be79
--- /dev/null
+++ b/models/darp8/README.md
@@ -0,0 +1,12 @@
+# System76 Darter Pro (darp8)
+
+## Contents
+
+- [EC](./ec.rom)
+  - *Read Error: No such file or directory (os error 2)*
+- [FD](./fd.rom)
+  - Size: 4 KB
+  - HAP: false
+- [ME](./me.rom)
+  - Size: 4824 KB
+  - Version: 16.0.15.1662
diff --git a/models/darp8/README.md.in b/models/darp8/README.md.in
new file mode 100644
index 0000000..e07e166
--- /dev/null
+++ b/models/darp8/README.md.in
@@ -0,0 +1 @@
+# System76 Darter Pro (darp8)
diff --git a/models/darp8/chip.txt b/models/darp8/chip.txt
new file mode 100644
index 0000000..ef16711
--- /dev/null
+++ b/models/darp8/chip.txt
@@ -0,0 +1 @@
+GD25Q256D
diff --git a/models/darp8/coreboot-collector.txt b/models/darp8/coreboot-collector.txt
new file mode 100644
index 0000000..745637c
--- /dev/null
+++ b/models/darp8/coreboot-collector.txt
@@ -0,0 +1,258 @@
+## PCI ##
+PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x4621, Revision 0x02
+PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x46A6, Revision 0x0C
+PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0x461D, Revision 0x02
+PCI Device: 0000:00:06.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
+PCI Device: 0000:00:07.0: Class 0x00060400, Vendor 0x8086, Device 0x466E, Revision 0x02
+PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0x464F, Revision 0x02
+PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0x467D, Revision 0x01
+PCI Device: 0000:00:0d.0: Class 0x000C0330, Vendor 0x8086, Device 0x461E, Revision 0x02
+PCI Device: 0000:00:0d.2: Class 0x000C0340, Vendor 0x8086, Device 0x463E, Revision 0x02
+PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0x467F, Revision 0x00
+PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x51ED, Revision 0x01
+PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x51EF, Revision 0x01
+PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x51F0, Revision 0x01
+PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x51E8, Revision 0x01
+PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x51E9, Revision 0x01
+PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x51E0, Revision 0x01
+PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x51BD, Revision 0x01
+PCI Device: 0000:00:1c.7: Class 0x00060400, Vendor 0x8086, Device 0x51BF, Revision 0x01
+PCI Device: 0000:00:1d.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
+PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x5182, Revision 0x01
+PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x51C8, Revision 0x01
+PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x51A3, Revision 0x01
+PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x51A4, Revision 0x01
+PCI Device: 0000:2a:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
+PCI Device: 0000:2b:00.0: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x15
+PCI Device: 10000:e0:06.0: Class 0x00060400, Vendor 0x8086, Device 0x464D, Revision 0x02
+PCI Device: 10000:e0:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x51B0, Revision 0x01
+PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
+PCI Device: 10000:e2:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA808, Revision 0x00
+## GPIO ##
+600 Series PCH-LP
+GPP_B0 (0x6E,0x00) 0x44000700 0x0003c018 0x00000100 0x00000000
+GPP_B1 (0x6E,0x02) 0x44000700 0x0003c019 0x00000100 0x00000000
+GPP_B2 (0x6E,0x04) 0x44000102 0x0000001a 0x00000000 0x00000000
+GPP_B3 (0x6E,0x06) 0x44000102 0x0000001b 0x00000000 0x00000000
+GPP_B4 (0x6E,0x08) 0x44000100 0x0000001c 0x00000000 0x00000000
+GPP_B5 (0x6E,0x0A) 0x44000102 0x0000001d 0x00000000 0x00000000
+GPP_B6 (0x6E,0x0C) 0x44000102 0x0000001e 0x00000000 0x00000000
+GPP_B7 (0x6E,0x0E) 0x44000102 0x0000001f 0x00000000 0x00000000
+GPP_B8 (0x6E,0x10) 0x44000102 0x00000020 0x00000000 0x00000000
+GPP_B9 (0x6E,0x12) 0x44000102 0x00000021 0x00000000 0x00000000
+GPP_B10 (0x6E,0x14) 0x44000102 0x00000022 0x00000000 0x00000000
+GPP_B11 (0x6E,0x16) 0x04000702 0x00000023 0x00000000 0x00000000
+GPP_B12 (0x6E,0x18) 0x44000700 0x0003c024 0x00000000 0x00000000
+GPP_B13 (0x6E,0x1A) 0x44000700 0x0003c025 0x00000000 0x00000000
+GPP_B14 (0x6E,0x1C) 0x44000500 0x00000026 0x00000000 0x00000000
+GPP_B15 (0x6E,0x1E) 0x44000102 0x00000027 0x00000000 0x00000000
+GPP_B16 (0x6E,0x20) 0x84000201 0x00000028 0x00000000 0x00000000
+GPP_B17 (0x6E,0x22) 0x84000201 0x00000029 0x00000000 0x00000000
+GPP_B18 (0x6E,0x24) 0x44000102 0x0000002a 0x00000100 0x00000000
+GPP_B19 (0x6E,0x26) 0x44000102 0x0000002b 0x00000000 0x00000000
+GPP_B20 (0x6E,0x28) 0x44000102 0x0000002c 0x00000000 0x00000000
+GPP_B21 (0x6E,0x2A) 0x44000102 0x0000002d 0x00000000 0x00000000
+GPP_B22 (0x6E,0x2C) 0x44000102 0x0000002e 0x00000000 0x00000000
+GPP_B23 (0x6E,0x2E) 0x44000102 0x0000002f 0x00000000 0x00000000
+GPP_T2 (0x6E,0x38) 0x44000b00 0x00001032 0x00000000 0x00000000
+GPP_T3 (0x6E,0x3A) 0x44000b00 0x00001033 0x00000000 0x00000000
+GPP_A0 (0x6E,0x54) 0x44000700 0x0003f040 0x00000100 0x00000000
+GPP_A1 (0x6E,0x56) 0x44000702 0x0003f041 0x00000100 0x00000000
+GPP_A2 (0x6E,0x58) 0x44000700 0x0003f042 0x00000100 0x00000000
+GPP_A3 (0x6E,0x5A) 0x44000700 0x0003f043 0x00000100 0x00000000
+GPP_A4 (0x6E,0x5C) 0x44000700 0x0003f044 0x00000100 0x00000000
+GPP_A5 (0x6E,0x5E) 0x44000702 0x00003045 0x00000100 0x00000000
+GPP_A6 (0x6E,0x60) 0x44000102 0x00003046 0x00000100 0x00000000
+GPP_A7 (0x6E,0x62) 0x44000102 0x00000047 0x00000000 0x00000000
+GPP_A8 (0x6E,0x64) 0x84000201 0x00000048 0x00000000 0x00000000
+GPP_A9 (0x6E,0x66) 0x44000700 0x0003d049 0x00000100 0x00000000
+GPP_A10 (0x6E,0x68) 0x44000700 0x0003c04a 0x00000100 0x00000000
+GPP_A11 (0x6E,0x6A) 0x44000102 0x0000004b 0x00000000 0x00000000
+GPP_A12 (0x6E,0x6C) 0x44000702 0x0000304c 0x00000000 0x00000000
+GPP_A13 (0x6E,0x6E) 0x84000201 0x0000004d 0x00000000 0x00000000
+GPP_A14 (0x6E,0x70) 0x44000102 0x0000004e 0x00000000 0x00000000
+GPP_A15 (0x6E,0x72) 0x44000102 0x0000004f 0x00000000 0x00000000
+GPP_A16 (0x6E,0x74) 0x44000702 0x00000050 0x00000000 0x00000000
+GPP_A17 (0x6E,0x76) 0x44000102 0x00000051 0x00000000 0x00000000
+GPP_A18 (0x6E,0x78) 0x44000500 0x00024052 0x00000000 0x00000000
+GPP_A19 (0x6E,0x7A) 0x44000102 0x00000053 0x00000000 0x00000000
+GPP_A20 (0x6E,0x7C) 0x44000102 0x00000054 0x00000000 0x00000000
+GPP_A21 (0x6E,0x7E) 0x44000102 0x00000055 0x00000000 0x00000000
+GPP_A22 (0x6E,0x80) 0x44000102 0x00000056 0x00000000 0x00000000
+GPP_A23 (0x6E,0x82) 0x44000700 0x00003057 0x00000100 0x00000000
+GPP_S0 (0x6D,0x00) 0x44000100 0x0180006c 0x00000000 0x00000000
+GPP_S1 (0x6D,0x02) 0x44000100 0x0180006d 0x00000000 0x00000000
+GPP_S2 (0x6D,0x04) 0x44000100 0x0180006e 0x00000000 0x00000000
+GPP_S3 (0x6D,0x06) 0x44000100 0x0180006f 0x00000000 0x00000000
+GPP_S4 (0x6D,0x08) 0x44000100 0x01800070 0x00000000 0x00000000
+GPP_S5 (0x6D,0x0A) 0x44000100 0x01800071 0x00000000 0x00000000
+GPP_S6 (0x6D,0x0C) 0x44000100 0x01800072 0x00000000 0x00000000
+GPP_S7 (0x6D,0x0E) 0x44000100 0x01800073 0x00000000 0x00000000
+GPP_H0 (0x6D,0x10) 0x84000201 0x00000074 0x00000000 0x00000000
+GPP_H1 (0x6D,0x12) 0x84000201 0x00000075 0x00000000 0x00000000
+GPP_H2 (0x6D,0x14) 0x84000201 0x00000076 0x00000000 0x00000000
+GPP_H3 (0x6D,0x16) 0x44000102 0x00000077 0x00000000 0x00000000
+GPP_H4 (0x6D,0x18) 0x44000502 0x00000018 0x00000000 0x00000000
+GPP_H5 (0x6D,0x1A) 0x44000502 0x00000019 0x00000000 0x00000000
+GPP_H6 (0x6D,0x1C) 0x44000502 0x0000001a 0x00000000 0x00000000
+GPP_H7 (0x6D,0x1E) 0x44000502 0x0000001b 0x00000000 0x00000000
+GPP_H8 (0x6D,0x20) 0x44000902 0x0000001c 0x00000100 0x00000000
+GPP_H9 (0x6D,0x22) 0x44000900 0x0000001d 0x00000100 0x00000000
+GPP_H10 (0x6D,0x24) 0x44000102 0x0000001e 0x00000000 0x00000000
+GPP_H11 (0x6D,0x26) 0x44000102 0x0000001f 0x00000000 0x00000000
+GPP_H12 (0x6D,0x28) 0x44001500 0x00000020 0x00000000 0x00000000
+GPP_H13 (0x6D,0x2A) 0x44000102 0x00000021 0x00000000 0x00000000
+GPP_H14 (0x6D,0x2C) 0x44000102 0x00000022 0x00000000 0x00000000
+GPP_H15 (0x6D,0x2E) 0x44000500 0x0003c023 0x00000000 0x00000000
+GPP_H16 (0x6D,0x30) 0x44000102 0x00000024 0x00000000 0x00000000
+GPP_H17 (0x6D,0x32) 0x44000502 0x0003c025 0x00000000 0x00000000
+GPP_H18 (0x6D,0x34) 0x44000700 0x0003c026 0x00000000 0x00000000
+GPP_H19 (0x6D,0x36) 0x44000700 0x00000027 0x00000000 0x00000000
+GPP_H20 (0x6D,0x38) 0x44000102 0x00000028 0x00000000 0x00000000
+GPP_H21 (0x6D,0x3A) 0x44000102 0x00000029 0x00000000 0x00000000
+GPP_H22 (0x6D,0x3C) 0x44000102 0x0000002a 0x00000000 0x00000000
+GPP_H23 (0x6D,0x3E) 0x44000b02 0x0000002b 0x00000000 0x00000000
+GPP_D0 (0x6D,0x40) 0x44000201 0x0000002c 0x00000000 0x00000000
+GPP_D1 (0x6D,0x42) 0x44000102 0x0000002d 0x00000000 0x00000000
+GPP_D2 (0x6D,0x44) 0x44000200 0x0000002e 0x00000000 0x00000000
+GPP_D3 (0x6D,0x46) 0x44000102 0x0000002f 0x00000000 0x00000000
+GPP_D4 (0x6D,0x48) 0x44000201 0x00000030 0x00000000 0x00000000
+GPP_D5 (0x6D,0x4A) 0x44000700 0x00000031 0x00000000 0x00000000
+GPP_D6 (0x6D,0x4C) 0x44000201 0x00000032 0x00000000 0x00000000
+GPP_D7 (0x6D,0x4E) 0x44000702 0x00000033 0x00000000 0x00000000
+GPP_D8 (0x6D,0x50) 0x44000102 0x00000034 0x00000000 0x00000000
+GPP_D9 (0x6D,0x52) 0x44000102 0x00003c35 0x00000100 0x00000000
+GPP_D10 (0x6D,0x54) 0x44000102 0x00003c36 0x00000100 0x00000000
+GPP_D11 (0x6D,0x56) 0x44000102 0x00003c37 0x00000100 0x00000000
+GPP_D12 (0x6D,0x58) 0x44000102 0x00003c38 0x00000100 0x00000000
+GPP_D13 (0x6D,0x5A) 0x44000102 0x00000039 0x00000000 0x00000000
+GPP_D14 (0x6D,0x5C) 0x84000201 0x0000003a 0x00000000 0x00000000
+GPP_D15 (0x6D,0x5E) 0x44000201 0x0000003b 0x00000000 0x00000000
+GPP_D16 (0x6D,0x60) 0x44000201 0x0000003c 0x00000000 0x00000000
+GPP_D17 (0x6D,0x62) 0x44000102 0x0000003d 0x00000000 0x00000000
+GPP_D18 (0x6D,0x64) 0x44000102 0x0000003e 0x00000000 0x00000000
+GPP_D19 (0x6D,0x66) 0x44000102 0x0000003f 0x00000000 0x00000000
+GPD0 (0x6C,0x00) 0x04000702 0x00003060 0x00000000 0x00000000
+GPD1 (0x6C,0x02) 0x04000702 0x00003c61 0x00000000 0x00000000
+GPD2 (0x6C,0x04) 0x04000702 0x00003c62 0x00000000 0x00000000
+GPD3 (0x6C,0x06) 0x04000702 0x00003063 0x00000010 0x00000000
+GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
+GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
+GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
+GPD7 (0x6C,0x0E) 0x04000102 0x00000067 0x00000000 0x00000000
+GPD8 (0x6C,0x10) 0x04000700 0x00000068 0x00000000 0x00000000
+GPD9 (0x6C,0x12) 0x04000200 0x00000069 0x00000000 0x00000000
+GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
+GPD11 (0x6C,0x16) 0x04000600 0x0000006b 0x00000000 0x00000000
+GPP_C0 (0x6A,0x00) 0x44000502 0x0003c06e 0x00000000 0x00000000
+GPP_C1 (0x6A,0x02) 0x44000502 0x0003c06f 0x00000000 0x00000000
+GPP_C2 (0x6A,0x04) 0x84000201 0x00000070 0x00000800 0x00000000
+GPP_C3 (0x6A,0x06) 0x44000502 0x00000071 0x00000000 0x00000000
+GPP_C4 (0x6A,0x08) 0x44000502 0x00000072 0x00000000 0x00000000
+GPP_C5 (0x6A,0x0A) 0x44000102 0x00000073 0x00000000 0x00000000
+GPP_C6 (0x6A,0x0C) 0x44000502 0x00000074 0x00000000 0x00000000
+GPP_C7 (0x6A,0x0E) 0x44000502 0x00000075 0x00000000 0x00000000
+GPP_C8 (0x6A,0x10) 0x44000300 0x00000076 0x00000000 0x00000000
+GPP_C9 (0x6A,0x12) 0x44000300 0x00000077 0x00000000 0x00000000
+GPP_C10 (0x6A,0x14) 0x44000300 0x00000018 0x00000000 0x00000000
+GPP_C11 (0x6A,0x16) 0x44000300 0x00000019 0x00000000 0x00000000
+GPP_C12 (0x6A,0x18) 0x44000300 0x0000001a 0x00000000 0x00000000
+GPP_C13 (0x6A,0x1A) 0x44000300 0x0000001b 0x00000000 0x00000000
+GPP_C14 (0x6A,0x1C) 0x44000300 0x0000001c 0x00000000 0x00000000
+GPP_C15 (0x6A,0x1E) 0x44000300 0x0000001d 0x00000000 0x00000000
+GPP_C16 (0x6A,0x20) 0x44000300 0x0000001e 0x00000000 0x00000000
+GPP_C17 (0x6A,0x22) 0x44000300 0x0000001f 0x00000000 0x00000000
+GPP_C18 (0x6A,0x24) 0x44000300 0x00000020 0x00000000 0x00000000
+GPP_C19 (0x6A,0x26) 0x44000300 0x00000021 0x00000000 0x00000000
+GPP_C20 (0x6A,0x28) 0x44000300 0x00000022 0x00000000 0x00000000
+GPP_C21 (0x6A,0x2A) 0x44000300 0x00000023 0x00000000 0x00000000
+GPP_C22 (0x6A,0x2C) 0x44000300 0x00000024 0x00000000 0x00000000
+GPP_C23 (0x6A,0x2E) 0x44000300 0x00000025 0x00000000 0x00000000
+GPP_F0 (0x6A,0x30) 0x44000500 0x0003c056 0x00000100 0x00000000
+GPP_F1 (0x6A,0x32) 0x44000502 0x0003f057 0x00000100 0x00000000
+GPP_F2 (0x6A,0x34) 0x44000500 0x0003c058 0x00000100 0x00000000
+GPP_F3 (0x6A,0x36) 0x44000500 0x0003f059 0x00000100 0x00000000
+GPP_F4 (0x6A,0x38) 0x44000500 0x0003c05a 0x00000100 0x00000000
+GPP_F5 (0x6A,0x3A) 0x44000900 0x0003c05b 0x00000100 0x00000000
+GPP_F6 (0x6A,0x3C) 0x44000502 0x0000005c 0x00000100 0x00000000
+GPP_F7 (0x6A,0x3E) 0x44000102 0x0000005d 0x00000000 0x00000000
+GPP_F8 (0x6A,0x40) 0x44000102 0x0000005e 0x00000000 0x00000000
+GPP_F9 (0x6A,0x42) 0x44000102 0x0000005f 0x00000000 0x00000000
+GPP_F10 (0x6A,0x44) 0x44000102 0x00000060 0x00000000 0x00000000
+GPP_F11 (0x6A,0x46) 0x44000102 0x00000061 0x00000000 0x00000000
+GPP_F12 (0x6A,0x48) 0x44000102 0x00000062 0x00000100 0x00000000
+GPP_F13 (0x6A,0x4A) 0x44000102 0x00000063 0x00000000 0x00000000
+GPP_F14 (0x6A,0x4C) 0x44000100 0x00000064 0x00000000 0x00000000
+GPP_F15 (0x6A,0x4E) 0x44000102 0x00000065 0x00000000 0x00000000
+GPP_F16 (0x6A,0x50) 0x44000102 0x00000066 0x00000000 0x00000000
+GPP_F17 (0x6A,0x52) 0x84000201 0x00000067 0x00000000 0x00000000
+GPP_F18 (0x6A,0x54) 0x44000200 0x00000068 0x00000000 0x00000000
+GPP_F19 (0x6A,0x56) 0x44000702 0x00000069 0x00000000 0x00000000
+GPP_F20 (0x6A,0x58) 0x84000201 0x0003c06a 0x00000000 0x00000000
+GPP_F21 (0x6A,0x5A) 0x44000102 0x0003c06b 0x00000000 0x00000000
+GPP_F22 (0x6A,0x5C) 0x44000500 0x0003c06c 0x00000000 0x00000000
+GPP_F23 (0x6A,0x5E) 0x44000500 0x0003c06d 0x00000000 0x00000000
+GPP_E0 (0x6A,0x6E) 0x44000102 0x00000026 0x00000000 0x00000000
+GPP_E1 (0x6A,0x70) 0x40100102 0x00003027 0x00000000 0x00000000
+GPP_E2 (0x6A,0x72) 0x44000102 0x00000028 0x00000000 0x00000000
+GPP_E3 (0x6A,0x74) 0x84000201 0x00000029 0x00000000 0x00000000
+GPP_E4 (0x6A,0x76) 0x84000200 0x00000030 0x00000000 0x00000000
+GPP_E5 (0x6A,0x78) 0x44000102 0x00000031 0x00000000 0x00000000
+GPP_E6 (0x6A,0x7A) 0x44000102 0x00000032 0x00000900 0x00000000
+GPP_E7 (0x6A,0x7C) 0x44000102 0x00000033 0x00000000 0x00000000
+GPP_E8 (0x6A,0x7E) 0x44000100 0x00000034 0x00000000 0x00000000
+GPP_E9 (0x6A,0x80) 0x44000502 0x00000035 0x00000800 0x00000000
+GPP_E10 (0x6A,0x82) 0x44000102 0x00000036 0x00000800 0x00000000
+GPP_E11 (0x6A,0x84) 0x44000102 0x00000037 0x00000800 0x00000000
+GPP_E12 (0x6A,0x86) 0x40100102 0x00000038 0x00000000 0x00000000
+GPP_E13 (0x6A,0x88) 0x44000102 0x00000039 0x00000000 0x00000000
+GPP_E14 (0x6A,0x8A) 0x44000702 0x0002403a 0x00000000 0x00000000
+GPP_E15 (0x6A,0x8C) 0x44000102 0x0000003b 0x00000000 0x00000000
+GPP_E16 (0x6A,0x8E) 0x44000102 0x0000003c 0x00000000 0x00000000
+GPP_E17 (0x6A,0x90) 0x44000102 0x0000003d 0x00000000 0x00000000
+GPP_E18 (0x6A,0x92) 0x44000300 0x00003c3e 0x00000000 0x00000000
+GPP_E19 (0x6A,0x94) 0x44000300 0x00003c3f 0x00000000 0x00000000
+GPP_E20 (0x6A,0x96) 0x44000102 0x00003c40 0x00000100 0x00000000
+GPP_E21 (0x6A,0x98) 0x44000102 0x00003c41 0x00000100 0x00000000
+GPP_E22 (0x6A,0x9A) 0x44000100 0x00001042 0x00000000 0x00000000
+GPP_E23 (0x6A,0x9C) 0x44000102 0x00000043 0x00000000 0x00000000
+GPP_R0 (0x69,0x00) 0x44000500 0x0003c058 0x00000000 0x00000000
+GPP_R1 (0x69,0x02) 0x44000500 0x0003fc59 0x00000000 0x00000000
+GPP_R2 (0x69,0x04) 0x44000500 0x0003fc5a 0x00000000 0x00000000
+GPP_R3 (0x69,0x06) 0x44000500 0x0003fc5b 0x00000000 0x00000000
+GPP_R4 (0x69,0x08) 0x44000500 0x0003c05c 0x00000000 0x00000000
+GPP_R5 (0x69,0x0A) 0x44000102 0x0000005d 0x00000000 0x00000000
+GPP_R6 (0x69,0x0C) 0x44000102 0x0000005e 0x00000000 0x00000000
+GPP_R7 (0x69,0x0E) 0x44000102 0x0000005f 0x00000000 0x00000000
+## HDAUDIO ##
+hdaudioC0D0
+  vendor_name: Realtek
+  chip_name: ALC256
+  vendor_id: 0x10ec0256
+  subsystem_id: 0x15587716
+  revision_id: 0x100002
+  0x12: 0x90a60130
+  0x13: 0x40000000
+  0x14: 0x90170110
+  0x18: 0x411111f0
+  0x19: 0x411111f0
+  0x1a: 0x411111f0
+  0x1b: 0x411111f0
+  0x1d: 0x41700001
+  0x1e: 0x411111f0
+  0x21: 0x02211020
+hdaudioC0D2
+  vendor_name: Intel
+  chip_name: Alderlake-P HDMI
+  vendor_id: 0x8086281c
+  subsystem_id: 0x80860101
+  revision_id: 0x100000
+  0x04: 0x18560010
+  0x06: 0x18560010
+  0x08: 0x18560010
+  0x0a: 0x18560010
+  0x0b: 0x18560010
+  0x0c: 0x18560010
+  0x0d: 0x18560010
+  0x0e: 0x18560010
+  0x0f: 0x18560010
diff --git a/models/darp8/coreboot.config b/models/darp8/coreboot.config
new file mode 100644
index 0000000..48ed4ed
--- /dev/null
+++ b/models/darp8/coreboot.config
@@ -0,0 +1,23 @@
+CONFIG_VENDOR_SYSTEM76=y
+CONFIG_BOARD_SYSTEM76_DARP8=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_CCACHE=y
+CONFIG_CONSOLE_SERIAL=n
+CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
+CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
+CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Include"
+CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp.fd"
+CONFIG_FSP_FULL_FD=y
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_HAVE_ME_BIN=y
+CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
+CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
+CONFIG_PAYLOAD_ELF=y
+CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
+CONFIG_POST_IO=n
+CONFIG_RUN_FSP_GOP=y
+CONFIG_SMMSTORE=y
+CONFIG_SMMSTORE_V2=y
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
+#CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/darp8/ec.config b/models/darp8/ec.config
new file mode 100644
index 0000000..3d8b256
--- /dev/null
+++ b/models/darp8/ec.config
@@ -0,0 +1 @@
+BOARD=system76/darp8
diff --git a/models/darp8/ecspy.txt b/models/darp8/ecspy.txt
new file mode 100644
index 0000000..a19dbd7
--- /dev/null
+++ b/models/darp8/ecspy.txt
@@ -0,0 +1,89 @@
+id 5570 rev 6
+A0: data 1 mirror 1 pot 0 control 00
+A1: data 0 mirror 0 pot 0 control 00
+A2: data 1 mirror 1 pot 0 control 00
+A3: data 0 mirror 0 pot 0 control 80
+A4: data 1 mirror 1 pot 0 control 44
+A5: data 0 mirror 0 pot 0 control 00
+A6: data 0 mirror 0 pot 0 control 00
+A7: data 0 mirror 1 pot 0 control 00
+B0: data 0 mirror 0 pot 0 control 84
+B1: data 1 mirror 1 pot 0 control 84
+B2: data 1 mirror 1 pot 0 control 44
+B3: data 1 mirror 1 pot 0 control 80
+B4: data 1 mirror 1 pot 0 control 40
+B5: data 0 mirror 0 pot 0 control 44
+B6: data 1 mirror 1 pot 0 control 44
+B7: data 1 mirror 1 pot 0 control 82
+C0: data 1 mirror 1 pot 0 control 80
+C1: data 1 mirror 1 pot 0 control 04
+C2: data 1 mirror 1 pot 0 control 04
+C3: data 0 mirror 0 pot 0 control 04
+C4: data 0 mirror 0 pot 0 control 84
+C5: data 0 mirror 0 pot 0 control 04
+C6: data 0 mirror 0 pot 0 control 82
+C7: data 0 mirror 0 pot 0 control 44
+D0: data 1 mirror 1 pot 0 control 44
+D1: data 1 mirror 1 pot 0 control 44
+D2: data 1 mirror 1 pot 0 control 00
+D3: data 1 mirror 1 pot 0 control 82
+D4: data 1 mirror 1 pot 0 control 80
+D5: data 1 mirror 1 pot 0 control 44
+D6: data 1 mirror 1 pot 0 control 02
+D7: data 0 mirror 0 pot 0 control 80
+E0: data 1 mirror 1 pot 0 control 04
+E1: data 1 mirror 1 pot 0 control 44
+E2: data 0 mirror 0 pot 0 control 84
+E3: data 1 mirror 1 pot 0 control 40
+E4: data 1 mirror 1 pot 0 control 42
+E5: data 1 mirror 1 pot 0 control 40
+E6: data 1 mirror 1 pot 0 control 80
+E7: data 1 mirror 1 pot 0 control 04
+F0: data 0 mirror 0 pot 0 control 44
+F1: data 1 mirror 1 pot 0 control 44
+F2: data 1 mirror 1 pot 0 control 44
+F3: data 0 mirror 0 pot 0 control 82
+F4: data 1 mirror 1 pot 0 control 04
+F5: data 1 mirror 1 pot 0 control 04
+F6: data 0 mirror 0 pot 0 control 00
+F7: data 1 mirror 1 pot 0 control 44
+G0: data 1 mirror 1 pot 0 control 80
+G1: data 1 mirror 1 pot 0 control 44
+G2: data 1 mirror 1 pot 0 control 80
+G3: data 0 mirror 0 pot 0 control 00
+G4: data 0 mirror 0 pot 0 control 00
+G5: data 0 mirror 0 pot 0 control 00
+G6: data 0 mirror 0 pot 0 control 44
+G7: data 0 mirror 0 pot 0 control 00
+H0: data 0 mirror 0 pot 0 control 44
+H1: data 1 mirror 1 pot 0 control 80
+H2: data 1 mirror 1 pot 0 control 44
+H3: data 1 mirror 1 pot 0 control 80
+H4: data 1 mirror 1 pot 0 control 84
+H5: data 0 mirror 0 pot 0 control 40
+H6: data 1 mirror 1 pot 0 control 80
+H7: data 0 mirror 0 pot 0 control 82
+I0: data 0 mirror 0 pot 0 control 00
+I1: data 0 mirror 0 pot 0 control 00
+I2: data 0 mirror 0 pot 0 control 80
+I3: data 0 mirror 0 pot 0 control 80
+I4: data 0 mirror 0 pot 0 control 00
+I5: data 1 mirror 1 pot 0 control 80
+I6: data 1 mirror 1 pot 0 control 80
+I7: data 0 mirror 0 pot 0 control 00
+J0: data 1 mirror 1 pot 0 control 44
+J1: data 1 mirror 1 pot 0 control 40
+J2: data 0 mirror 0 pot 0 control 82
+J3: data 1 mirror 1 pot 0 control 80
+J4: data 1 mirror 1 pot 0 control 40
+J5: data 1 mirror 1 pot 0 control 80
+J6: data 0 mirror 0 pot 0 control 80
+J7: data 1 mirror 1 pot 0 control 80
+M0: data 0 mirror 0 control 06
+M1: data 1 mirror 1 control 06
+M2: data 1 mirror 1 control 06
+M3: data 1 mirror 1 control 06
+M4: data 1 mirror 1 control 06
+M5: data 0 mirror 0 control 00
+M6: data 1 mirror 1 control 86
+M7: data 0 mirror 0 control 00
diff --git a/models/darp8/edk2.config b/models/darp8/edk2.config
new file mode 100644
index 0000000..28b2a3c
--- /dev/null
+++ b/models/darp8/edk2.config
@@ -0,0 +1,9 @@
+BOOTLOADER=COREBOOT
+DISABLE_SERIAL_TERMINAL=TRUE
+PLATFORM_BOOT_TIMEOUT=2
+PS2_KEYBOARD_ENABLE=TRUE
+#SECURE_BOOT_ENABLE=TRUE
+SERIAL_DRIVER_ENABLE=FALSE
+SHELL_TYPE=NONE
+TPM_ENABLE=TRUE
+#SYSTEM76_EC_LOGGING=TRUE
diff --git a/models/darp8/fd.rom b/models/darp8/fd.rom
new file mode 100644
index 0000000..b2d7a4b
--- /dev/null
+++ b/models/darp8/fd.rom
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:d033d7bda0dc25f0dfc31d8dd7641fb3b994a2b5c1c3e8b3e4c83f26be88f2f9
+size 4096
diff --git a/models/darp8/gpio.h b/models/darp8/gpio.h
new file mode 100644
index 0000000..50d8281
--- /dev/null
+++ b/models/darp8/gpio.h
@@ -0,0 +1,211 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef MAINBOARD_GPIO_H
+#define MAINBOARD_GPIO_H
+
+#include <soc/gpe.h>
+#include <soc/gpio.h>
+
+#ifndef __ACPI__
+
+/* Pad configuration in ramstage. */
+static const struct pad_config gpio_table[] = {
+	PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
+	PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
+	PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),
+	PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
+	PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
+	PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
+	PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
+	PAD_CFG_GPI(GPD7, NONE, PWROK),
+	PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
+	PAD_CFG_GPO(GPD9, 0, PWROK),
+	PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
+	PAD_CFG_NF(GPD11, NONE, PWROK, NF1),
+	PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_A5, UP_20K, DEEP, NF1),
+	PAD_CFG_GPI(GPP_A6, UP_20K, DEEP),
+	PAD_CFG_GPI(GPP_A7, NONE, DEEP),
+	PAD_CFG_GPO(GPP_A8, 1, PLTRST),
+	PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_A11, NONE, DEEP),
+	PAD_CFG_NF(GPP_A12, UP_20K, DEEP, NF1),
+	PAD_CFG_GPO(GPP_A13, 1, PLTRST),
+	PAD_CFG_GPI(GPP_A14, NONE, DEEP),
+	PAD_CFG_GPI(GPP_A15, NONE, DEEP),
+	PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_A17, NONE, DEEP),
+	PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_A19, NONE, DEEP),
+	PAD_CFG_GPI(GPP_A20, NONE, DEEP),
+	PAD_CFG_GPI(GPP_A21, NONE, DEEP),
+	PAD_CFG_GPI(GPP_A22, NONE, DEEP),
+	PAD_CFG_NF(GPP_A23, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_B2, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B3, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B4, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B5, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B6, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B7, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B8, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B9, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B10, NONE, DEEP),
+	PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1),
+	PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_B15, NONE, DEEP),
+	PAD_CFG_GPO(GPP_B16, 1, PLTRST),
+	PAD_CFG_GPO(GPP_B17, 1, PLTRST),
+	PAD_CFG_GPI(GPP_B18, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B19, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B20, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B21, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B22, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B23, NONE, DEEP),
+	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
+	PAD_CFG_GPO(GPP_C2, 1, PLTRST),
+	PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_C5, NONE, DEEP),
+	PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
+	PAD_NC(GPP_C8, NONE),
+	PAD_NC(GPP_C9, NONE),
+	PAD_NC(GPP_C10, NONE),
+	PAD_NC(GPP_C11, NONE),
+	PAD_NC(GPP_C12, NONE),
+	PAD_NC(GPP_C13, NONE),
+	PAD_NC(GPP_C14, NONE),
+	PAD_NC(GPP_C15, NONE),
+	PAD_NC(GPP_C16, NONE),
+	PAD_NC(GPP_C17, NONE),
+	PAD_NC(GPP_C18, NONE),
+	PAD_NC(GPP_C19, NONE),
+	PAD_NC(GPP_C20, NONE),
+	PAD_NC(GPP_C21, NONE),
+	PAD_NC(GPP_C22, NONE),
+	PAD_NC(GPP_C23, NONE),
+	PAD_CFG_GPO(GPP_D0, 1, DEEP),
+	PAD_CFG_GPI(GPP_D1, NONE, DEEP),
+	PAD_CFG_GPO(GPP_D2, 0, DEEP),
+	PAD_CFG_GPI(GPP_D3, NONE, DEEP),
+	PAD_CFG_GPO(GPP_D4, 1, DEEP),
+	PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
+	PAD_CFG_GPO(GPP_D6, 1, DEEP),
+	PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_D8, NONE, DEEP),
+	PAD_CFG_GPI(GPP_D9, NATIVE, DEEP),
+	PAD_CFG_GPI(GPP_D10, NATIVE, DEEP),
+	PAD_CFG_GPI(GPP_D11, NATIVE, DEEP),
+	PAD_CFG_GPI(GPP_D12, NATIVE, DEEP),
+	PAD_CFG_GPI(GPP_D13, NONE, DEEP),
+	PAD_CFG_GPO(GPP_D14, 1, PLTRST),
+	PAD_CFG_GPO(GPP_D15, 1, DEEP),
+	PAD_CFG_GPO(GPP_D16, 1, DEEP),
+	PAD_CFG_GPI(GPP_D17, NONE, DEEP),
+	PAD_CFG_GPI(GPP_D18, NONE, DEEP),
+	PAD_CFG_GPI(GPP_D19, NONE, DEEP),
+	PAD_CFG_GPI(GPP_E0, NONE, DEEP),
+	_PAD_CFG_STRUCT(GPP_E1, 0x40100100, 0x3000),
+	PAD_CFG_GPI(GPP_E2, NONE, DEEP),
+	PAD_CFG_GPO(GPP_E3, 1, PLTRST),
+	PAD_CFG_GPO(GPP_E4, 0, PLTRST),
+	PAD_CFG_GPI(GPP_E5, NONE, DEEP),
+	PAD_CFG_GPI(GPP_E6, NONE, DEEP),
+	PAD_CFG_GPI(GPP_E7, NONE, DEEP),
+	PAD_CFG_GPI(GPP_E8, NONE, DEEP),
+	PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_E10, NONE, DEEP),
+	PAD_CFG_GPI(GPP_E11, NONE, DEEP),
+	_PAD_CFG_STRUCT(GPP_E12, 0x40100100, 0x0000),
+	PAD_CFG_GPI(GPP_E13, NONE, DEEP),
+	PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_E15, NONE, DEEP),
+	PAD_CFG_GPI(GPP_E16, NONE, DEEP),
+	PAD_CFG_GPI(GPP_E17, NONE, DEEP),
+	PAD_NC(GPP_E18, NATIVE),
+	PAD_NC(GPP_E19, NATIVE),
+	PAD_CFG_GPI(GPP_E20, NATIVE, DEEP),
+	PAD_CFG_GPI(GPP_E21, NATIVE, DEEP),
+	PAD_CFG_GPI(GPP_E22, DN_20K, DEEP),
+	PAD_CFG_GPI(GPP_E23, NONE, DEEP),
+	PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_F7, NONE, DEEP),
+	PAD_CFG_GPI(GPP_F8, NONE, DEEP),
+	PAD_CFG_GPI(GPP_F9, NONE, DEEP),
+	PAD_CFG_GPI(GPP_F10, NONE, DEEP),
+	PAD_CFG_GPI(GPP_F11, NONE, DEEP),
+	PAD_CFG_GPI(GPP_F12, NONE, DEEP),
+	PAD_CFG_GPI(GPP_F13, NONE, DEEP),
+	PAD_CFG_GPI(GPP_F14, NONE, DEEP),
+	PAD_CFG_GPI(GPP_F15, NONE, DEEP),
+	PAD_CFG_GPI(GPP_F16, NONE, DEEP),
+	PAD_CFG_GPO(GPP_F17, 1, PLTRST),
+	PAD_CFG_GPO(GPP_F18, 0, DEEP),
+	PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
+	PAD_CFG_GPO(GPP_F20, 1, PLTRST),
+	PAD_CFG_GPI(GPP_F21, NONE, DEEP),
+	PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_F23, NONE, DEEP, NF1),
+	PAD_CFG_GPO(GPP_H0, 1, PLTRST),
+	PAD_CFG_GPO(GPP_H1, 1, PLTRST),
+	PAD_CFG_GPO(GPP_H2, 1, PLTRST),
+	PAD_CFG_GPI(GPP_H3, NONE, DEEP),
+	PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_H8, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_H9, NONE, DEEP, NF2),
+	PAD_CFG_GPI(GPP_H10, NONE, DEEP),
+	PAD_CFG_GPI(GPP_H11, NONE, DEEP),
+	_PAD_CFG_STRUCT(GPP_H12, 0x44001500, 0x0000),
+	PAD_CFG_GPI(GPP_H13, NONE, DEEP),
+	PAD_CFG_GPI(GPP_H14, NONE, DEEP),
+	PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_H16, NONE, DEEP),
+	PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_H20, NONE, DEEP),
+	PAD_CFG_GPI(GPP_H21, NONE, DEEP),
+	PAD_CFG_GPI(GPP_H22, NONE, DEEP),
+	PAD_CFG_NF(GPP_H23, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_R5, NONE, DEEP),
+	PAD_CFG_GPI(GPP_R6, NONE, DEEP),
+	PAD_CFG_GPI(GPP_R7, NONE, DEEP),
+	PAD_CFG_GPI(GPP_S0, NONE, DEEP),
+	PAD_CFG_GPI(GPP_S1, NONE, DEEP),
+	PAD_CFG_GPI(GPP_S2, NONE, DEEP),
+	PAD_CFG_GPI(GPP_S3, NONE, DEEP),
+	PAD_CFG_GPI(GPP_S4, NONE, DEEP),
+	PAD_CFG_GPI(GPP_S5, NONE, DEEP),
+	PAD_CFG_GPI(GPP_S6, NONE, DEEP),
+	PAD_CFG_GPI(GPP_S7, NONE, DEEP),
+	PAD_CFG_NF(GPP_T2, DN_20K, DEEP, NF2),
+	PAD_CFG_NF(GPP_T3, DN_20K, DEEP, NF2),
+};
+
+#endif
+
+#endif
diff --git a/models/darp8/hda_verb.c b/models/darp8/hda_verb.c
new file mode 100644
index 0000000..ca725f7
--- /dev/null
+++ b/models/darp8/hda_verb.c
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+	/* Realtek, ALC256 */
+	0x10ec0256, /* Vendor ID */
+	0x15587716, /* Subsystem ID */
+	11, /* Number of entries */
+	AZALIA_SUBVENDOR(0, 0x15587716),
+	AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
+	AZALIA_PIN_CFG(0, 0x13, 0x40000000),
+	AZALIA_PIN_CFG(0, 0x14, 0x90170110),
+	AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1d, 0x41700001),
+	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x21, 0x02211020),
+	/* Intel, Alderlake-PHDMI */
+	0x8086281c, /* Vendor ID */
+	0x80860101, /* Subsystem ID */
+	10, /* Number of entries */
+	AZALIA_SUBVENDOR(2, 0x80860101),
+	AZALIA_PIN_CFG(2, 0x04, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x06, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x08, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
+};
+
+const u32 pc_beep_verbs[] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/models/darp8/me.rom b/models/darp8/me.rom
new file mode 100644
index 0000000..e4d1e92
--- /dev/null
+++ b/models/darp8/me.rom
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:f25f6b002ce676b46cfa50d9f995344541baa284a18d0258e69938da79b695d0
+size 4939776
diff --git a/models/darp8/microcode.rom b/models/darp8/microcode.rom
new file mode 100644
index 0000000..5c9b5e4
--- /dev/null
+++ b/models/darp8/microcode.rom
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:ecd74d39839cc0643b58dcd19489a88c4e68bb8683ac2a8593915371e0d66f13
+size 212992
diff --git a/models/darp8/vbt.rom b/models/darp8/vbt.rom
new file mode 100644
index 0000000..445a1e2
--- /dev/null
+++ b/models/darp8/vbt.rom
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:39eb600e61391472d45da2cca545848ebcc99a426b40b05f7b779c6070f1d228
+size 8704