models: Remove generated C files
These files are generated while running proprietary firmware, but once
they are added to coreboot they are no longer needed. They also quickly
become stale as the files are always changed in coreboot.
find models/ -name gpio.h -exec rm {} \;
find models/ -name hda_verb.c -exec rm {} \;
Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Tim Crawford
committed by
Jeremy Soller
Jeremy Soller
parent
e4960f163e
commit
77581d11fc
@@ -1,258 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2019 System76
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
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* GNU General Public License for more details.
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*/
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#ifndef MAINBOARD_GPIO_H
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#define MAINBOARD_GPIO_H
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#include <soc/gpe.h>
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#include <soc/gpio.h>
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#ifndef __ACPI__
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/* Pad configuration in ramstage. */
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static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
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PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
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PAD_CFG_GPI(GPD2, NATIVE, PWROK),
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PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
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PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
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PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPD7, NONE, PWROK),
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PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
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_PAD_CFG_STRUCT(GPD10, 0x04000601, 0x0000),
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PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPP_A0, NONE, DEEP),
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PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
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PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
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PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
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PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
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PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPP_A7, NONE, DEEP),
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PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
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PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
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PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
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PAD_CFG_GPI(GPP_A12, NONE, DEEP),
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PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
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_PAD_CFG_STRUCT(GPP_A14, 0x80800100, 0x0000),
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PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
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PAD_CFG_GPI(GPP_A16, DN_20K, DEEP),
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PAD_CFG_GPI(GPP_A17, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
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PAD_CFG_GPI(GPP_A19, NONE, DEEP),
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PAD_CFG_GPI(GPP_A20, NONE, DEEP),
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_PAD_CFG_STRUCT(GPP_A21, 0x46080100, 0x0000),
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PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
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PAD_CFG_GPI(GPP_A23, NONE, DEEP),
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_PAD_CFG_STRUCT(GPP_B0, 0x42080100, 0x3000),
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PAD_CFG_GPI(GPP_B1, NONE, DEEP),
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PAD_CFG_GPI(GPP_B2, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_B3, 1, NONE, DEEP),
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PAD_CFG_GPI(GPP_B4, NONE, DEEP),
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PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPP_B6, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_B7, 0, NONE, DEEP),
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PAD_CFG_GPI(GPP_B8, NONE, DEEP),
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PAD_CFG_GPI(GPP_B9, NONE, DEEP),
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PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPP_B11, NONE, DEEP),
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PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
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_PAD_CFG_STRUCT(GPP_B13, 0x44000601, 0x0000),
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PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPP_B15, NONE, DEEP),
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PAD_CFG_GPI(GPP_B16, NONE, DEEP),
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PAD_CFG_GPI(GPP_B17, NONE, DEEP),
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PAD_CFG_GPI(GPP_B18, NONE, DEEP),
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PAD_CFG_GPI(GPP_B19, NONE, DEEP),
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_PAD_CFG_STRUCT(GPP_B20, 0x42840101, 0x0000),
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PAD_CFG_GPI(GPP_B21, NONE, DEEP),
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PAD_CFG_GPI(GPP_B22, NONE, DEEP),
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PAD_CFG_GPI(GPP_B23, NONE, DEEP),
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PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPP_C2, NONE, DEEP),
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PAD_CFG_GPI(GPP_C3, NONE, DEEP),
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PAD_CFG_GPI(GPP_C4, NONE, DEEP),
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PAD_CFG_GPI(GPP_C5, NONE, DEEP),
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PAD_CFG_GPI(GPP_C6, NONE, DEEP),
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PAD_CFG_GPI(GPP_C7, NONE, DEEP),
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PAD_CFG_GPI(GPP_C8, NONE, DEEP),
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PAD_CFG_GPI(GPP_C9, NONE, DEEP),
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PAD_CFG_GPI(GPP_C10, NONE, DEEP),
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PAD_CFG_GPI(GPP_C11, NONE, DEEP),
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PAD_CFG_GPI(GPP_C12, NONE, DEEP),
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PAD_CFG_GPI(GPP_C13, NONE, PLTRST),
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PAD_CFG_TERM_GPO(GPP_C14, 1, NONE, DEEP),
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PAD_CFG_GPI(GPP_C15, NONE, DEEP),
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PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
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PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
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PAD_CFG_NF(GPP_C18, NONE, PLTRST, NF1),
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PAD_CFG_NF(GPP_C19, NONE, PLTRST, NF1),
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PAD_CFG_GPI(GPP_C20, NONE, DEEP),
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PAD_CFG_GPI(GPP_C21, NONE, DEEP),
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PAD_CFG_GPI(GPP_C22, NONE, DEEP),
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PAD_CFG_GPI(GPP_C23, NONE, DEEP),
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PAD_CFG_GPI(GPP_D0, NONE, DEEP),
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PAD_CFG_GPI(GPP_D1, NONE, DEEP),
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PAD_CFG_GPI(GPP_D2, NONE, DEEP),
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PAD_CFG_GPI(GPP_D3, NONE, DEEP),
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PAD_CFG_GPI(GPP_D4, NONE, DEEP),
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PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
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PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
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PAD_CFG_GPI(GPP_D7, NONE, DEEP),
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PAD_CFG_GPI(GPP_D8, NONE, DEEP),
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PAD_CFG_GPI(GPP_D9, NONE, DEEP),
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PAD_CFG_GPI(GPP_D10, NONE, DEEP),
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PAD_CFG_GPI(GPP_D11, NONE, DEEP),
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PAD_CFG_GPI(GPP_D12, NONE, DEEP),
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PAD_CFG_GPI(GPP_D13, NONE, DEEP),
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PAD_CFG_GPI(GPP_D14, NONE, DEEP),
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PAD_CFG_GPI(GPP_D15, NONE, DEEP),
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PAD_CFG_GPI(GPP_D16, NONE, DEEP),
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PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPP_D21, NONE, DEEP),
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PAD_CFG_GPI(GPP_D22, NONE, DEEP),
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PAD_CFG_GPI(GPP_D23, NONE, DEEP),
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PAD_CFG_GPI(GPP_E0, NONE, DEEP),
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PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1),
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PAD_CFG_GPI(GPP_E2, NONE, DEEP),
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PAD_CFG_GPI(GPP_E3, NONE, DEEP),
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PAD_CFG_GPI(GPP_E4, NONE, DEEP),
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PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
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PAD_CFG_TERM_GPO(GPP_E6, 1, NONE, DEEP),
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PAD_CFG_GPI(GPP_E7, NONE, DEEP),
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PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPP_E9, NONE, DEEP),
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PAD_CFG_GPI(GPP_E10, NONE, DEEP),
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PAD_CFG_GPI(GPP_E11, NONE, DEEP),
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PAD_CFG_GPI(GPP_E12, NONE, DEEP),
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PAD_CFG_GPI(GPP_F0, NONE, DEEP),
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PAD_CFG_GPI(GPP_F1, NONE, DEEP),
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PAD_CFG_GPI(GPP_F2, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_F3, 0, NONE, DEEP),
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PAD_CFG_GPI(GPP_F4, NONE, DEEP),
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PAD_CFG_GPI(GPP_F5, NONE, DEEP),
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PAD_CFG_GPI(GPP_F6, NONE, DEEP),
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PAD_CFG_GPI(GPP_F7, NONE, DEEP),
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PAD_CFG_GPI(GPP_F8, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_F9, 0, NONE, DEEP),
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PAD_CFG_GPI(GPP_F10, NONE, DEEP),
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PAD_CFG_GPI(GPP_F11, NONE, DEEP),
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PAD_CFG_GPI(GPP_F12, NONE, DEEP),
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PAD_CFG_GPI(GPP_F13, NONE, DEEP),
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PAD_CFG_GPI(GPP_F14, NONE, DEEP),
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PAD_CFG_GPI(GPP_F15, NONE, DEEP),
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PAD_CFG_GPI(GPP_F16, NONE, DEEP),
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PAD_CFG_GPI(GPP_F17, NONE, DEEP),
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PAD_CFG_GPI(GPP_F18, NONE, DEEP),
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PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
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PAD_CFG_TERM_GPO(GPP_F22, 1, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_F23, 1, NONE, DEEP),
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PAD_CFG_GPI(GPP_G0, NONE, DEEP),
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PAD_CFG_GPI(GPP_G1, NONE, DEEP),
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PAD_CFG_GPI(GPP_G2, NONE, DEEP),
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PAD_CFG_GPI(GPP_G3, NONE, DEEP),
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PAD_CFG_GPI(GPP_G4, NONE, DEEP),
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PAD_CFG_GPI(GPP_G5, NONE, DEEP),
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PAD_CFG_GPI(GPP_G6, NONE, DEEP),
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PAD_CFG_GPI(GPP_G7, NONE, DEEP),
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PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_H1, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_H3, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPP_H4, NONE, DEEP),
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PAD_CFG_GPI(GPP_H5, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_H6, 1, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_H7, 1, NONE, DEEP),
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PAD_CFG_GPI(GPP_H8, NONE, DEEP),
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_PAD_CFG_STRUCT(GPP_H9, 0x40880100, 0x0000),
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PAD_CFG_GPI(GPP_H10, NONE, DEEP),
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PAD_CFG_GPI(GPP_H11, NONE, DEEP),
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PAD_CFG_GPI(GPP_H12, NONE, DEEP),
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PAD_CFG_GPI(GPP_H13, NONE, DEEP),
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PAD_CFG_GPI(GPP_H14, NONE, DEEP),
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PAD_CFG_GPI(GPP_H15, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_H16, 0, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_H17, 0, NONE, PLTRST),
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PAD_CFG_GPI(GPP_H18, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_H19, 0, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_H20, 0, NONE, DEEP),
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PAD_CFG_GPI(GPP_H21, NONE, DEEP),
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PAD_CFG_GPI(GPP_H22, NONE, DEEP),
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_PAD_CFG_STRUCT(GPP_H23, 0x82880100, 0x0000),
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_PAD_CFG_STRUCT(GPP_I0, 0x46080100, 0x0000),
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_PAD_CFG_STRUCT(GPP_I1, 0x46080100, 0x0000),
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_PAD_CFG_STRUCT(GPP_I2, 0x46080100, 0x0000),
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_PAD_CFG_STRUCT(GPP_I3, 0x46080100, 0x0000),
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PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
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PAD_CFG_TERM_GPO(GPP_I5, 0, UP_20K, PLTRST),
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PAD_CFG_GPI(GPP_I6, NONE, DEEP),
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PAD_CFG_GPI(GPP_I7, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_I8, 1, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_I9, 1, NONE, DEEP),
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PAD_CFG_GPI(GPP_I10, NONE, DEEP),
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PAD_CFG_GPI(GPP_I11, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_I12, 1, NONE, DEEP),
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PAD_CFG_GPI(GPP_I13, NONE, DEEP),
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PAD_CFG_GPI(GPP_I14, NONE, DEEP),
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PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
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PAD_CFG_TERM_GPO(GPP_J1, 1, NONE, DEEP),
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PAD_CFG_GPI(GPP_J2, NONE, DEEP),
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PAD_CFG_GPI(GPP_J3, NONE, DEEP),
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PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
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PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
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PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_J9, NONE, DEEP, NF1),
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PAD_CFG_GPI(GPP_J10, NONE, DEEP),
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PAD_CFG_GPI(GPP_J11, DN_20K, DEEP),
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PAD_CFG_TERM_GPO(GPP_K0, 0, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_K1, 0, NONE, DEEP),
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PAD_CFG_GPI(GPP_K2, NONE, DEEP),
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_PAD_CFG_STRUCT(GPP_K3, 0x40880100, 0x0000),
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_PAD_CFG_STRUCT(GPP_K4, 0x44000101, 0x0000),
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PAD_CFG_GPI(GPP_K5, NONE, DEEP),
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_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x0000),
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PAD_CFG_GPI(GPP_K7, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_K8, 0, NONE, DEEP),
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PAD_CFG_GPI(GPP_K9, NONE, DEEP),
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PAD_CFG_GPI(GPP_K10, NONE, DEEP),
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PAD_CFG_GPI(GPP_K11, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_K12, 0, NONE, DEEP),
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PAD_CFG_GPI(GPP_K13, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_K14, 0, NONE, DEEP),
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_PAD_CFG_STRUCT(GPP_K15, 0x80100100, 0x0000),
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PAD_CFG_GPI(GPP_K16, NONE, DEEP),
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PAD_CFG_GPI(GPP_K17, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_K18, 1, NONE, DEEP),
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PAD_CFG_GPI(GPP_K19, NONE, DEEP),
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PAD_CFG_GPI(GPP_K20, NONE, DEEP),
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PAD_CFG_GPI(GPP_K21, NONE, DEEP),
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PAD_CFG_TERM_GPO(GPP_K22, 0, NONE, DEEP),
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PAD_CFG_GPI(GPP_K23, NONE, DEEP),
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};
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#endif
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#endif
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@@ -1,43 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/azalia_device.h>
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const u32 cim_verb_data[] = {
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/* Realtek, ALC1220 */
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||||
0x10ec1220, /* Vendor ID */
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0x155865e1, /* Subsystem ID */
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12, /* Number of entries */
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AZALIA_SUBVENDOR(0, 0x155865e1),
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AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
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AZALIA_PIN_CFG(0, 0x14, 0x0421101f),
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AZALIA_PIN_CFG(0, 0x15, 0x40000000),
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AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
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AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
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AZALIA_PIN_CFG(0, 0x1d, 0x40b7952d),
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AZALIA_PIN_CFG(0, 0x1e, 0x04451150),
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||||
/* Intel, KabylakeHDMI */
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||||
0x8086280b, /* Vendor ID */
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0x80860101, /* Subsystem ID */
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||||
4, /* Number of entries */
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AZALIA_SUBVENDOR(2, 0x80860101),
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AZALIA_PIN_CFG(2, 0x05, 0x18560010),
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AZALIA_PIN_CFG(2, 0x06, 0x18560010),
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AZALIA_PIN_CFG(2, 0x07, 0x18560010),
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||||
/* Nvidia, GPU92HDMI/DP */
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||||
0x10de0092, /* Vendor ID */
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||||
0x155865e1, /* Subsystem ID */
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||||
5, /* Number of entries */
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AZALIA_SUBVENDOR(0, 0x155865e1),
|
||||
AZALIA_PIN_CFG(0, 0x04, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x05, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x06, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x07, 0x185600f0),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {};
|
||||
|
||||
AZALIA_ARRAY_SIZES;
|
||||
Reference in New Issue
Block a user