Rename coreboot.rom to firmware.rom
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parent
3eefdb9619
commit
7e066e6be8
@ -30,7 +30,7 @@ then
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fi
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fi
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cargo build --release --manifest-path libs/intel-spi/Cargo.toml
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cargo build --release --manifest-path libs/intel-spi/Cargo.toml
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sudo libs/intel-spi/target/release/intel-spi "build/${MODEL}/coreboot.rom"
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sudo libs/intel-spi/target/release/intel-spi "build/${MODEL}/firmware.rom"
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if [ "$WITH_EC" = true ]
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if [ "$WITH_EC" = true ]
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then
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then
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@ -18,7 +18,7 @@ fi
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MODEL_DIR="$(realpath "models/${MODEL}")"
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MODEL_DIR="$(realpath "models/${MODEL}")"
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kvm -M q35 -m 4096 -vga std \
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kvm -M q35 -m 4096 -vga std \
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-bios "build/${MODEL}/coreboot.rom" \
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-bios "build/${MODEL}/firmware.rom" \
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-chardev stdio,mux=on,id=debug \
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-chardev stdio,mux=on,id=debug \
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-device isa-serial,index=2,chardev=debug \
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-device isa-serial,index=2,chardev=debug \
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-device isa-debugcon,iobase=0x402,chardev=debug \
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-device isa-debugcon,iobase=0x402,chardev=debug \
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@ -35,4 +35,3 @@ kvm -M q35 -m 4096 -vga std \
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# PCIe hotplugging (https://github.com/qemu/qemu/blob/master/docs/pcie_pci_bridge.txt):
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# PCIe hotplugging (https://github.com/qemu/qemu/blob/master/docs/pcie_pci_bridge.txt):
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# Root port: -device pcie-root-port,bus=pcie.0,id=rp1
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# Root port: -device pcie-root-port,bus=pcie.0,id=rp1
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# PCIe bridge: -device pcie-pci-bridge,id=br1,bus=rp1
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# PCIe bridge: -device pcie-pci-bridge,id=br1,bus=rp1
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@ -13,7 +13,7 @@ source scripts/_spipi.sh
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sftp "${SPIPI}" <<EOF
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sftp "${SPIPI}" <<EOF
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cd firmware
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cd firmware
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put "build/${MODEL}/coreboot.rom" "${MODEL}.rom"
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put "build/${MODEL}/firmware.rom" "${MODEL}.rom"
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EOF
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EOF
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ssh -T "${SPIPI}" <<EOF
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ssh -T "${SPIPI}" <<EOF
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