Merge branch 'master' of https://github.com/system76/firmware-open
This commit is contained in:
commit
aca7e5381d
2
FSP
2
FSP
@ -1 +1 @@
|
||||
Subproject commit 1d2b7e1a94c6a7c25a6fed1ac37caebf500f5f1a
|
||||
Subproject commit 59964173e18950debcc6b8856c5c928935ce0b4f
|
21
README.md
21
README.md
@ -2,13 +2,32 @@
|
||||
|
||||
System76 Open Source Firmware
|
||||
|
||||
## Dependencies
|
||||
|
||||
### Install toolchain
|
||||
```
|
||||
./scripts/deps.sh
|
||||
```
|
||||
|
||||
### Load Rust environment (or optionally reboot)
|
||||
```
|
||||
source ~/.cargo/env
|
||||
```
|
||||
|
||||
### Build firmware, replace darp5 with your model (look in the models directory for examples)
|
||||
```
|
||||
./scripts/build.sh darp5
|
||||
```
|
||||
|
||||
### Flashing firmware manually is not recommended for the normal user. For the advanced user, there is a script flash.sh which takes the same arguments as build.sh
|
||||
|
||||
## Contents
|
||||
|
||||
- [apps](./apps) - Applications
|
||||
- [coreboot](https://github.com/system76/coreboot.git) - coreboot README
|
||||
- [edk2](https://github.com/system76/edk2.git) - EDK II Project
|
||||
- [edk2-non-osi](https://github.com/tianocore/edk2-non-osi.git)
|
||||
- [edk2-platforms](https://github.com/system76/edk2-platforms.git) - **EDK II Minimum Platform Firmware for Intel(R) Platforms**
|
||||
- [edk2-platforms](https://github.com/system76/edk2-platforms.git) - This branch holds all platforms actively maintained against the
|
||||
- [FSP](https://github.com/IntelFsp/FSP.git) - Intel® Firmware Support Package (Intel® FSP) Binaries
|
||||
- [libs](./libs) - Libraries
|
||||
- [models](./models) - Models
|
||||
|
51
README.md.in
51
README.md.in
@ -1,3 +1,54 @@
|
||||
# firmware-open
|
||||
|
||||
System76 Open Source Firmware
|
||||
|
||||
## Dependencies
|
||||
|
||||
### Install toolchain
|
||||
```
|
||||
sudo apt-get install \
|
||||
build-essential \
|
||||
bison \
|
||||
ccache \
|
||||
flex \
|
||||
git-lfs \
|
||||
gnat \
|
||||
mtools \
|
||||
nasm \
|
||||
uuid-dev \
|
||||
zlib1g-dev
|
||||
```
|
||||
|
||||
### Make sure git lfs is set up
|
||||
```
|
||||
git lfs install
|
||||
git lfs pull
|
||||
```
|
||||
|
||||
### Install rust
|
||||
```
|
||||
curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs \
|
||||
| sh -s -- -y --default-toolchain nightly
|
||||
```
|
||||
|
||||
### Load cargo environment (or optionally reboot)
|
||||
```
|
||||
source ~/.cargo/env
|
||||
```
|
||||
|
||||
### Ensure rust source is installed for current toolchain
|
||||
```
|
||||
rustup component add --toolchain "$(cat rust-toolchain)" rust-src
|
||||
```
|
||||
|
||||
### Install cargo-xbuild
|
||||
```
|
||||
cargo install cargo-xbuild
|
||||
```
|
||||
|
||||
### Build firmware, replace darp5 with your model (look in the models directory for examples)
|
||||
```
|
||||
./scripts/build.sh darp5
|
||||
```
|
||||
|
||||
### Flashing firmware manually is not recommended for the normal user. For the advanced user, there is a script flash.sh which takes the same arguments as build.sh
|
||||
|
@ -1 +1 @@
|
||||
Subproject commit 2a747f948c93b977287a40bc14cfc55f2df9ce5d
|
||||
Subproject commit 828e2d7cb8e08b4af88df901f9d0717be908ecdc
|
@ -1 +1 @@
|
||||
Subproject commit 16f6e4963fa8ce72162655ab266a92b7deeb8294
|
||||
Subproject commit 2d24201accd43865eaed4af05dc0ce9f41c9a192
|
2
coreboot
2
coreboot
@ -1 +1 @@
|
||||
Subproject commit 12bb32890fe07a5dabf555a3d2f181a9844400bf
|
||||
Subproject commit b09afbb9fa843e38615500a0c247bd23a58d0d6a
|
2
edk2
2
edk2
@ -1 +1 @@
|
||||
Subproject commit dd91bf252d45e64c5cf96674c01fcc01b463d4ce
|
||||
Subproject commit 7113862a14ecbc679d806ead04ce717f2bc73fcb
|
@ -1 +1 @@
|
||||
Subproject commit 9fb8d229b9324a20a4f3343c6c29e140c8b6a276
|
||||
Subproject commit cf5d0a48c1d931faba506b2c22f8853f8f9f2749
|
@ -1 +1 @@
|
||||
Subproject commit 1eacc453fd18e86f735f7e7b520d03bc2d98da50
|
||||
Subproject commit 0078a481b812e5d9ea4a40cb21678c1f957c1514
|
@ -1 +1 @@
|
||||
Subproject commit 888f5b22b4dc990fc632ff5976c8076b4668c0c3
|
||||
Subproject commit 5b73f9cf6550fd73a88a39a690124ad1560feb51
|
@ -2,10 +2,14 @@
|
||||
|
||||
## Contents
|
||||
|
||||
- [addp1](./addp1) - System76 Adder Pro (addp1)
|
||||
- [darp5](./darp5) - System76 Darter Pro (darp5)
|
||||
- [galp2](./galp2) - System76 Galago Pro (galp2)
|
||||
- [galp3](./galp3) - System76 Galago Pro (galp3)
|
||||
- [galp3-b](./galp3-b) - System76 Galago Pro (galp3-b)
|
||||
- [galp3-c](./galp3-c) - System76 Galago Pro (galp3-c)
|
||||
- [gaze14_1650_15](./gaze14_1650_15) - System76 Gazelle (gaze14)
|
||||
- [gaze14_1650_17](./gaze14_1650_17) - System76 Gazelle (gaze14)
|
||||
- [gaze14_1660ti_15](./gaze14_1660ti_15) - System76 Gazelle (gaze14)
|
||||
- [gaze14_1660ti_17](./gaze14_1660ti_17) - System76 Gazelle (gaze14)
|
||||
- [thelio-b1](./thelio-b1) - System76 Thelio (thelio-b1)
|
||||
|
12
models/addp1/README.md
Normal file
12
models/addp1/README.md
Normal file
@ -0,0 +1,12 @@
|
||||
# System76 Adder Pro (addp1)
|
||||
|
||||
https://system76.com/guides/addp1
|
||||
|
||||
## Contents
|
||||
|
||||
- [EC](./ec.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [FD](./fd.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [ME](./me.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
3
models/addp1/README.md.in
Normal file
3
models/addp1/README.md.in
Normal file
@ -0,0 +1,3 @@
|
||||
# System76 Adder Pro (addp1)
|
||||
|
||||
https://system76.com/guides/addp1
|
287
models/addp1/coreboot-collector.txt
Normal file
287
models/addp1/coreboot-collector.txt
Normal file
@ -0,0 +1,287 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x3EC4, Revision 0x07
|
||||
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1901, Revision 0x07
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x3E9B, Revision 0x00
|
||||
PCI Device: 0000:00:12.0: Class 0x00118000, Vendor 0x8086, Device 0xA379, Revision 0x10
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0xA36D, Revision 0x10
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0xA36F, Revision 0x10
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0xA370, Revision 0x10
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0xA368, Revision 0x10
|
||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0xA369, Revision 0x10
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0xA360, Revision 0x10
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0xA353, Revision 0x10
|
||||
PCI Device: 0000:00:1b.0: Class 0x00060400, Vendor 0x8086, Device 0xA340, Revision 0xF0
|
||||
PCI Device: 0000:00:1b.4: Class 0x00060400, Vendor 0x8086, Device 0xA32C, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0xA330, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.5: Class 0x00060400, Vendor 0x8086, Device 0xA335, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.6: Class 0x00060400, Vendor 0x8086, Device 0xA336, Revision 0xF0
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0xA30D, Revision 0x10
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0xA348, Revision 0x10
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0xA323, Revision 0x10
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0xA324, Revision 0x10
|
||||
PCI Device: 0000:06:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:07:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:07:01.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:07:02.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:08:00.0: Class 0x00088000, Vendor 0x8086, Device 0x15E8, Revision 0x06
|
||||
PCI Device: 0000:6f:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x15E9, Revision 0x06
|
||||
PCI Device: 0000:71:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA808, Revision 0x00
|
||||
PCI Device: 0000:72:00.0: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x15
|
||||
PCI Device: 0000:73:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x525A, Revision 0x01
|
||||
## GPIO ##
|
||||
300 Series PCH
|
||||
GPP_A0 (0x6E,0x00) 0x44000201 0x00000018 0x00000000 0x00000000
|
||||
GPP_A1 (0x6E,0x02) 0x44000402 0x00003c19 0x00000000 0x00000000
|
||||
GPP_A2 (0x6E,0x04) 0x44000402 0x00003c1a 0x00000000 0x00000000
|
||||
GPP_A3 (0x6E,0x06) 0x44000402 0x00003c1b 0x00000000 0x00000000
|
||||
GPP_A4 (0x6E,0x08) 0x44000402 0x00003c1c 0x00000000 0x00000000
|
||||
GPP_A5 (0x6E,0x0A) 0x44000600 0x0000001d 0x00000000 0x00000000
|
||||
GPP_A6 (0x6E,0x0C) 0x44000402 0x0000001e 0x00000000 0x00000000
|
||||
GPP_A7 (0x6E,0x0E) 0x44000102 0x0000001f 0x00000000 0x00000000
|
||||
GPP_A8 (0x6E,0x10) 0x44000700 0x00000020 0x00000000 0x00000000
|
||||
GPP_A9 (0x6E,0x12) 0x44000600 0x00001021 0x00000000 0x00000000
|
||||
GPP_A10 (0x6E,0x14) 0x44000600 0x00001022 0x00000000 0x00000000
|
||||
GPP_A11 (0x6E,0x16) 0x44000102 0x00003023 0x00000000 0x00000000
|
||||
GPP_A12 (0x6E,0x18) 0x44000102 0x00000024 0x00000000 0x00000000
|
||||
GPP_A13 (0x6E,0x1A) 0x44000600 0x00000025 0x00000000 0x00000000
|
||||
GPP_A14 (0x6E,0x1C) 0x44000600 0x00000026 0x00000000 0x00000000
|
||||
GPP_A15 (0x6E,0x1E) 0x44000500 0x00003027 0x00000000 0x00000000
|
||||
GPP_A16 (0x6E,0x20) 0x44000100 0x00001028 0x00000000 0x00000000
|
||||
GPP_A17 (0x6E,0x22) 0x44000100 0x00000029 0x00000000 0x00000000
|
||||
GPP_A18 (0x6E,0x24) 0x44000201 0x0000002a 0x00000000 0x00000000
|
||||
GPP_A19 (0x6E,0x26) 0x44000102 0x0000002b 0x00000000 0x00000000
|
||||
GPP_A20 (0x6E,0x28) 0x44000201 0x0000002c 0x00000000 0x00000000
|
||||
GPP_A21 (0x6E,0x2A) 0x44000102 0x0000002d 0x00000000 0x00000000
|
||||
GPP_A22 (0x6E,0x2C) 0x44000200 0x0000002e 0x00000000 0x00000000
|
||||
GPP_A23 (0x6E,0x2E) 0x44000100 0x0000002f 0x00000000 0x00000000
|
||||
GPP_B0 (0x6E,0x32) 0x44000102 0x00000030 0x00000000 0x00000000
|
||||
GPP_B1 (0x6E,0x34) 0x44000102 0x00000031 0x00000000 0x00000000
|
||||
GPP_B2 (0x6E,0x36) 0x44000102 0x00000032 0x00000000 0x00000000
|
||||
GPP_B3 (0x6E,0x38) 0x80100102 0x00000033 0x00000000 0x00000000
|
||||
GPP_B4 (0x6E,0x3A) 0x44000102 0x00000034 0x00000000 0x00000000
|
||||
GPP_B5 (0x6E,0x3C) 0x44000702 0x00000035 0x00000000 0x00000000
|
||||
GPP_B6 (0x6E,0x3E) 0x44000102 0x00000036 0x00000000 0x00000000
|
||||
GPP_B7 (0x6E,0x40) 0x44000102 0x00000037 0x00000000 0x00000000
|
||||
GPP_B8 (0x6E,0x42) 0x44000102 0x00000038 0x00000000 0x00000000
|
||||
GPP_B9 (0x6E,0x44) 0x44000102 0x00000039 0x00000000 0x00000000
|
||||
GPP_B10 (0x6E,0x46) 0x44000702 0x0000003a 0x00000000 0x00000000
|
||||
GPP_B11 (0x6E,0x48) 0x44000102 0x0000003b 0x00000000 0x00000000
|
||||
GPP_B12 (0x6E,0x4A) 0x44000700 0x0000003c 0x00000000 0x00000000
|
||||
GPP_B13 (0x6E,0x4C) 0x44000601 0x0000003d 0x00000000 0x00000000
|
||||
GPP_B14 (0x6E,0x4E) 0x44000600 0x0000003e 0x00000000 0x00000000
|
||||
GPP_B15 (0x6E,0x50) 0x44000102 0x0000003f 0x00000000 0x00000000
|
||||
GPP_B16 (0x6E,0x52) 0x44000102 0x00000040 0x00000000 0x00000000
|
||||
GPP_B17 (0x6E,0x54) 0x44000102 0x00000041 0x00000000 0x00000000
|
||||
GPP_B18 (0x6E,0x56) 0x44000102 0x00000042 0x00000000 0x00000000
|
||||
GPP_B19 (0x6E,0x58) 0x44000102 0x00000043 0x00000000 0x00000000
|
||||
GPP_B20 (0x6E,0x5A) 0x44000102 0x00000044 0x00000000 0x00000000
|
||||
GPP_B21 (0x6E,0x5C) 0x44000102 0x00000045 0x00000000 0x00000000
|
||||
GPP_B22 (0x6E,0x5E) 0x44000102 0x00000046 0x00000000 0x00000000
|
||||
GPP_B23 (0x6E,0x60) 0x44000102 0x00000047 0x00000000 0x00000000
|
||||
GPP_C0 (0x6D,0x00) 0x44000602 0x00000048 0x00000000 0x00000000
|
||||
GPP_C1 (0x6D,0x02) 0x44000402 0x00000049 0x00000000 0x00000000
|
||||
GPP_C2 (0x6D,0x04) 0x40880102 0x0000004a 0x00000800 0x00000000
|
||||
GPP_C3 (0x6D,0x06) 0x44000102 0x0000004b 0x00000000 0x00000000
|
||||
GPP_C4 (0x6D,0x08) 0x44000102 0x0000004c 0x00000000 0x00000000
|
||||
GPP_C5 (0x6D,0x0A) 0x44000102 0x0000004d 0x00000000 0x00000000
|
||||
GPP_C6 (0x6D,0x0C) 0x44000102 0x0000004e 0x00000000 0x00000000
|
||||
GPP_C7 (0x6D,0x0E) 0x44000102 0x0000004f 0x00000000 0x00000000
|
||||
GPP_C8 (0x6D,0x10) 0x44000102 0x00000050 0x00000000 0x00000000
|
||||
GPP_C9 (0x6D,0x12) 0x44000100 0x00000051 0x00000000 0x00000000
|
||||
GPP_C10 (0x6D,0x14) 0x44000100 0x00000052 0x00000000 0x00000000
|
||||
GPP_C11 (0x6D,0x16) 0x44000100 0x00000053 0x00000000 0x00000000
|
||||
GPP_C12 (0x6D,0x18) 0x44000100 0x00000054 0x00000000 0x00000000
|
||||
GPP_C13 (0x6D,0x1A) 0x44000102 0x00000055 0x00000000 0x00000000
|
||||
GPP_C14 (0x6D,0x1C) 0x44000201 0x00000056 0x00000000 0x00000000
|
||||
GPP_C15 (0x6D,0x1E) 0x44000100 0x00000057 0x00000000 0x00000000
|
||||
GPP_C16 (0x6D,0x20) 0x84000402 0x00000058 0x00000000 0x00000000
|
||||
GPP_C17 (0x6D,0x22) 0x84000402 0x00000059 0x00000000 0x00000000
|
||||
GPP_C18 (0x6D,0x24) 0x84000402 0x0000005a 0x00000000 0x00000000
|
||||
GPP_C19 (0x6D,0x26) 0x84000402 0x0000005b 0x00000000 0x00000000
|
||||
GPP_C20 (0x6D,0x28) 0x44000502 0x0000005c 0x00000000 0x00000000
|
||||
GPP_C21 (0x6D,0x2A) 0x44000500 0x0000005d 0x00000000 0x00000000
|
||||
GPP_C22 (0x6D,0x2C) 0x44000500 0x0000005e 0x00000000 0x00000000
|
||||
GPP_C23 (0x6D,0x2E) 0x44000502 0x0000005f 0x00000000 0x00000000
|
||||
GPP_D0 (0x6D,0x30) 0x44000102 0x00000060 0x00000000 0x00000000
|
||||
GPP_D1 (0x6D,0x32) 0x44000102 0x00000061 0x00000000 0x00000000
|
||||
GPP_D2 (0x6D,0x34) 0x44000102 0x00000062 0x00000000 0x00000000
|
||||
GPP_D3 (0x6D,0x36) 0x44000102 0x00000063 0x00000000 0x00000000
|
||||
GPP_D4 (0x6D,0x38) 0x44000102 0x00000064 0x00000000 0x00000000
|
||||
GPP_D5 (0x6D,0x3A) 0x44000d00 0x00000065 0x00000000 0x00000000
|
||||
GPP_D6 (0x6D,0x3C) 0x44000d00 0x00000066 0x00000000 0x00000000
|
||||
GPP_D7 (0x6D,0x3E) 0x44000102 0x00000067 0x00000000 0x00000000
|
||||
GPP_D8 (0x6D,0x40) 0x44000100 0x00000068 0x00000000 0x00000000
|
||||
GPP_D9 (0x6D,0x42) 0x44000102 0x00000069 0x00000000 0x00000000
|
||||
GPP_D10 (0x6D,0x44) 0x44000102 0x0000006a 0x00000000 0x00000000
|
||||
GPP_D11 (0x6D,0x46) 0x44000102 0x0000006b 0x00000000 0x00000000
|
||||
GPP_D12 (0x6D,0x48) 0x44000102 0x0000006c 0x00000000 0x00000000
|
||||
GPP_D13 (0x6D,0x4A) 0x44000102 0x0000006d 0x00000000 0x00000000
|
||||
GPP_D14 (0x6D,0x4C) 0x44000102 0x0000006e 0x00000000 0x00000000
|
||||
GPP_D15 (0x6D,0x4E) 0x44000102 0x0000006f 0x00000000 0x00000000
|
||||
GPP_D16 (0x6D,0x50) 0x44000102 0x00000070 0x00000000 0x00000000
|
||||
GPP_D17 (0x6D,0x52) 0x44000500 0x00000071 0x00000000 0x00000000
|
||||
GPP_D18 (0x6D,0x54) 0x44000500 0x00000072 0x00000000 0x00000000
|
||||
GPP_D19 (0x6D,0x56) 0x44000500 0x00000073 0x00000000 0x00000000
|
||||
GPP_D20 (0x6D,0x58) 0x44000500 0x00000074 0x00000000 0x00000000
|
||||
GPP_D21 (0x6D,0x5A) 0x44000102 0x00000075 0x00000000 0x00000000
|
||||
GPP_D22 (0x6D,0x5C) 0x44000102 0x00000076 0x00000000 0x00000000
|
||||
GPP_D23 (0x6D,0x5E) 0x44000100 0x00000077 0x00000000 0x00000000
|
||||
GPP_G0 (0x6D,0x60) 0x44000100 0x0000006c 0x00000000 0x00000000
|
||||
GPP_G1 (0x6D,0x62) 0x44000102 0x0000006d 0x00000000 0x00000000
|
||||
GPP_G2 (0x6D,0x64) 0x44000102 0x0000006e 0x00000000 0x00000000
|
||||
GPP_G3 (0x6D,0x66) 0x44000102 0x0000006f 0x00000000 0x00000000
|
||||
GPP_G4 (0x6D,0x68) 0x44000102 0x00000070 0x00000000 0x00000000
|
||||
GPP_G5 (0x6D,0x6A) 0x44000102 0x00000071 0x00000000 0x00000000
|
||||
GPP_G6 (0x6D,0x6C) 0x44000102 0x00000072 0x00000000 0x00000000
|
||||
GPP_G7 (0x6D,0x6E) 0x44000102 0x00000073 0x00000000 0x00000000
|
||||
GPD0 (0x6C,0x00) 0x44000502 0x00000060 0x00000000 0x00000000
|
||||
GPD1 (0x6C,0x02) 0x44000502 0x00003c61 0x00000000 0x00000000
|
||||
GPD2 (0x6C,0x04) 0x04000102 0x00003c62 0x00000000 0x00000000
|
||||
GPD3 (0x6C,0x06) 0x44000502 0x00003063 0x00000010 0x00000000
|
||||
GPD4 (0x6C,0x08) 0x44000600 0x00000064 0x00000000 0x00000000
|
||||
GPD5 (0x6C,0x0A) 0x44000600 0x00000065 0x00000000 0x00000000
|
||||
GPD6 (0x6C,0x0C) 0x44000600 0x00000066 0x00000000 0x00000000
|
||||
GPD7 (0x6C,0x0E) 0x04000102 0x00000067 0x00000800 0x00000000
|
||||
GPD8 (0x6C,0x10) 0x44000600 0x00000068 0x00000000 0x00000000
|
||||
GPD9 (0x6C,0x12) 0x04000500 0x00000069 0x00000000 0x00000000
|
||||
GPD10 (0x6C,0x14) 0x04000601 0x0000006a 0x00000000 0x00000000
|
||||
GPD11 (0x6C,0x16) 0x44000600 0x0000006b 0x00000000 0x00000000
|
||||
GPP_K0 (0x6B,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_K1 (0x6B,0x02) 0x44000200 0x00000019 0x00000000 0x00000000
|
||||
GPP_K2 (0x6B,0x04) 0x44000102 0x0000001a 0x00000000 0x00000000
|
||||
GPP_K3 (0x6B,0x06) 0x40880102 0x0000001b 0x00000000 0x00000000
|
||||
GPP_K4 (0x6B,0x08) 0x44000102 0x0000001c 0x00000000 0x00000000
|
||||
GPP_K5 (0x6B,0x0A) 0x44000102 0x0000001d 0x00000000 0x00000000
|
||||
GPP_K6 (0x6B,0x0C) 0x40880102 0x0000001e 0x00000000 0x00000000
|
||||
GPP_K7 (0x6B,0x0E) 0x44000102 0x0000001f 0x00000000 0x00000000
|
||||
GPP_K8 (0x6B,0x10) 0x44000201 0x00000020 0x00000000 0x00000000
|
||||
GPP_K9 (0x6B,0x12) 0x44000102 0x00000021 0x00000000 0x00000000
|
||||
GPP_K10 (0x6B,0x14) 0x44000102 0x00000022 0x00000000 0x00000000
|
||||
GPP_K11 (0x6B,0x16) 0x44000102 0x00000023 0x00000000 0x00000000
|
||||
GPP_K12 (0x6B,0x18) 0x44000201 0x00000024 0x00000000 0x00000000
|
||||
GPP_K13 (0x6B,0x1A) 0x44000102 0x00000025 0x00000000 0x00000000
|
||||
GPP_K14 (0x6B,0x1C) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_K15 (0x6B,0x1E) 0x80100100 0x00000027 0x00000000 0x00000000
|
||||
GPP_K16 (0x6B,0x20) 0x44000102 0x00000028 0x00000000 0x00000000
|
||||
GPP_K17 (0x6B,0x22) 0x44000102 0x00000029 0x00000000 0x00000000
|
||||
GPP_K18 (0x6B,0x24) 0x44000201 0x0000002a 0x00000000 0x00000000
|
||||
GPP_K19 (0x6B,0x26) 0x42800103 0x0000002b 0x00000000 0x00000000
|
||||
GPP_K20 (0x6B,0x28) 0x44000102 0x0000002c 0x00000000 0x00000000
|
||||
GPP_K21 (0x6B,0x2A) 0x44000102 0x0000002d 0x00000000 0x00000000
|
||||
GPP_K22 (0x6B,0x2C) 0x44000103 0x0000002e 0x00000000 0x00000000
|
||||
GPP_K23 (0x6B,0x2E) 0x44000102 0x0000002f 0x00000000 0x00000000
|
||||
GPP_H0 (0x6B,0x30) 0x44000702 0x00000048 0x00000000 0x00000000
|
||||
GPP_H1 (0x6B,0x32) 0x44000700 0x00000049 0x00000000 0x00000000
|
||||
GPP_H2 (0x6B,0x34) 0x44000702 0x0000004a 0x00000000 0x00000000
|
||||
GPP_H3 (0x6B,0x36) 0x44000702 0x0000004b 0x00000000 0x00000000
|
||||
GPP_H4 (0x6B,0x38) 0x44000102 0x0000004c 0x00000000 0x00000000
|
||||
GPP_H5 (0x6B,0x3A) 0x44000102 0x0000004d 0x00000000 0x00000000
|
||||
GPP_H6 (0x6B,0x3C) 0x44000201 0x0000004e 0x00000000 0x00000000
|
||||
GPP_H7 (0x6B,0x3E) 0x44000201 0x0000004f 0x00000000 0x00000000
|
||||
GPP_H8 (0x6B,0x40) 0x44000102 0x00000050 0x00000000 0x00000000
|
||||
GPP_H9 (0x6B,0x42) 0x44000102 0x00000051 0x00000000 0x00000000
|
||||
GPP_H10 (0x6B,0x44) 0x44000102 0x00000052 0x00000000 0x00000000
|
||||
GPP_H11 (0x6B,0x46) 0x44000102 0x00000053 0x00000000 0x00000000
|
||||
GPP_H12 (0x6B,0x48) 0x44000102 0x00000054 0x00000000 0x00000000
|
||||
GPP_H13 (0x6B,0x4A) 0x44000102 0x00000055 0x00000000 0x00000000
|
||||
GPP_H14 (0x6B,0x4C) 0x44000102 0x00000056 0x00000000 0x00000000
|
||||
GPP_H15 (0x6B,0x4E) 0x44000100 0x00000057 0x00000000 0x00000000
|
||||
GPP_H16 (0x6B,0x50) 0x44000103 0x00000058 0x00000000 0x00000000
|
||||
GPP_H17 (0x6B,0x52) 0x84000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_H18 (0x6B,0x54) 0x44000201 0x0000005a 0x00000000 0x00000000
|
||||
GPP_H19 (0x6B,0x56) 0x44000201 0x0000005b 0x00000000 0x00000000
|
||||
GPP_H20 (0x6B,0x58) 0x44000102 0x0000005c 0x00000000 0x00000000
|
||||
GPP_H21 (0x6B,0x5A) 0x44000102 0x0000005d 0x00000000 0x00000000
|
||||
GPP_H22 (0x6B,0x5C) 0x44000102 0x0000005e 0x00000000 0x00000000
|
||||
GPP_H23 (0x6B,0x5E) 0x82880102 0x0000005f 0x00000000 0x00000000
|
||||
GPP_E0 (0x6B,0x60) 0x44000102 0x00000018 0x00000000 0x00000000
|
||||
GPP_E1 (0x6B,0x62) 0x44000502 0x00003019 0x00000000 0x00000000
|
||||
GPP_E2 (0x6B,0x64) 0x44000102 0x0000001a 0x00000000 0x00000000
|
||||
GPP_E3 (0x6B,0x66) 0x44000102 0x0000001b 0x00000000 0x00000000
|
||||
GPP_E4 (0x6B,0x68) 0x44000102 0x0000001c 0x00000000 0x00000000
|
||||
GPP_E5 (0x6B,0x6A) 0x44000600 0x0000001d 0x00000000 0x00000000
|
||||
GPP_E6 (0x6B,0x6C) 0x44000201 0x0000001e 0x00000000 0x00000000
|
||||
GPP_E7 (0x6B,0x6E) 0x44000102 0x0000001f 0x00000000 0x00000000
|
||||
GPP_E8 (0x6B,0x70) 0x44000600 0x00000020 0x00000000 0x00000000
|
||||
GPP_E9 (0x6B,0x72) 0x44000102 0x00000021 0x00000800 0x00000000
|
||||
GPP_E10 (0x6B,0x74) 0x44000102 0x00000022 0x00000800 0x00000000
|
||||
GPP_E11 (0x6B,0x76) 0x44000102 0x00000023 0x00000800 0x00000000
|
||||
GPP_E12 (0x6B,0x78) 0x44000102 0x00000024 0x00000000 0x00000000
|
||||
GPP_F0 (0x6B,0x7A) 0x44000102 0x00000030 0x00000000 0x00000000
|
||||
GPP_F1 (0x6B,0x7C) 0x44000102 0x00000031 0x00000000 0x00000000
|
||||
GPP_F2 (0x6B,0x7E) 0x44000102 0x00000032 0x00000000 0x00000000
|
||||
GPP_F3 (0x6B,0x80) 0x44000201 0x00000033 0x00000000 0x00000000
|
||||
GPP_F4 (0x6B,0x82) 0x44000201 0x00000034 0x00000000 0x00000000
|
||||
GPP_F5 (0x6B,0x84) 0x44000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_F6 (0x6B,0x86) 0x44000102 0x00000036 0x00000000 0x00000000
|
||||
GPP_F7 (0x6B,0x88) 0x44000102 0x00000037 0x00000000 0x00000000
|
||||
GPP_F8 (0x6B,0x8A) 0x44000102 0x00000038 0x00000000 0x00000000
|
||||
GPP_F9 (0x6B,0x8C) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_F10 (0x6B,0x8E) 0x44000102 0x0000003a 0x00000000 0x00000000
|
||||
GPP_F11 (0x6B,0x90) 0x44000102 0x0000003b 0x00000000 0x00000000
|
||||
GPP_F12 (0x6B,0x92) 0x44000102 0x0000003c 0x00000000 0x00000000
|
||||
GPP_F13 (0x6B,0x94) 0x44000102 0x0000003d 0x00000000 0x00000000
|
||||
GPP_F14 (0x6B,0x96) 0x44000100 0x0000003e 0x00000000 0x00000000
|
||||
GPP_F15 (0x6B,0x98) 0x44000102 0x0000003f 0x00000000 0x00000000
|
||||
GPP_F16 (0x6B,0x9A) 0x44000102 0x00000040 0x00000000 0x00000000
|
||||
GPP_F17 (0x6B,0x9C) 0x44000102 0x00000041 0x00000000 0x00000000
|
||||
GPP_F18 (0x6B,0x9E) 0x44000102 0x00000042 0x00000000 0x00000000
|
||||
GPP_F19 (0x6B,0xA0) 0x44000500 0x00000043 0x00000000 0x00000000
|
||||
GPP_F20 (0x6B,0xA2) 0x44000500 0x00000044 0x00000000 0x00000000
|
||||
GPP_F21 (0x6B,0xA4) 0x44000500 0x00000045 0x00000000 0x00000000
|
||||
GPP_F22 (0x6B,0xA6) 0x44000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_F23 (0x6B,0xA8) 0x44000200 0x00000047 0x00000000 0x00000000
|
||||
GPP_I0 (0x6A,0x28) 0x46080100 0x00000030 0x00000000 0x00000000
|
||||
GPP_I1 (0x6A,0x2A) 0x46080100 0x00000031 0x00000000 0x00000000
|
||||
GPP_I2 (0x6A,0x2C) 0x46080100 0x00000032 0x00000000 0x00000000
|
||||
GPP_I3 (0x6A,0x2E) 0x46080100 0x00000033 0x00000000 0x00000000
|
||||
GPP_I4 (0x6A,0x30) 0x44000502 0x00000034 0x00000000 0x00000000
|
||||
GPP_I5 (0x6A,0x32) 0x44000201 0x00000035 0x00000000 0x00000000
|
||||
GPP_I6 (0x6A,0x34) 0x44000102 0x00000036 0x00000000 0x00000000
|
||||
GPP_I7 (0x6A,0x36) 0x44000102 0x00000037 0x00000000 0x00000000
|
||||
GPP_I8 (0x6A,0x38) 0x44000201 0x00000038 0x00000000 0x00000000
|
||||
GPP_I9 (0x6A,0x3A) 0x44000201 0x00000039 0x00000000 0x00000000
|
||||
GPP_I10 (0x6A,0x3C) 0x44000102 0x0000003a 0x00000000 0x00000000
|
||||
GPP_I11 (0x6A,0x3E) 0x44000102 0x0000003b 0x00000000 0x00000000
|
||||
GPP_I12 (0x6A,0x40) 0x44000201 0x0000003c 0x00000000 0x00000000
|
||||
GPP_I13 (0x6A,0x42) 0x44000102 0x0000003d 0x00000000 0x00000000
|
||||
GPP_I14 (0x6A,0x44) 0x44000102 0x0000003e 0x00000000 0x00000000
|
||||
GPP_J0 (0x6A,0x4C) 0x44000500 0x00000025 0x00000000 0x00000000
|
||||
GPP_J1 (0x6A,0x4E) 0x44000201 0x00000026 0x00000000 0x00000000
|
||||
GPP_J2 (0x6A,0x50) 0x44000100 0x00000027 0x00000000 0x00000000
|
||||
GPP_J3 (0x6A,0x52) 0x44000100 0x00000028 0x00000000 0x00000000
|
||||
GPP_J4 (0x6A,0x54) 0x44000500 0x00000029 0x00000800 0x00000000
|
||||
GPP_J5 (0x6A,0x56) 0x44000500 0x0000302a 0x00000000 0x00000000
|
||||
GPP_J6 (0x6A,0x58) 0x44000500 0x0000002b 0x00000000 0x00000000
|
||||
GPP_J7 (0x6A,0x5A) 0x44000502 0x0000302c 0x00000000 0x00000000
|
||||
GPP_J8 (0x6A,0x5C) 0x44000500 0x0000002d 0x00000000 0x00000000
|
||||
GPP_J9 (0x6A,0x5E) 0x44000500 0x0000002e 0x00000000 0x00000000
|
||||
GPP_J10 (0x6A,0x60) 0x44000100 0x0000002f 0x00000000 0x00000000
|
||||
GPP_J11 (0x6A,0x62) 0x44000100 0x00001030 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC1220
|
||||
vendor_id: 0x10ec1220
|
||||
subsystem_id: 0x155865d1
|
||||
revision_id: 0x100003
|
||||
0x12: 0x90a60130
|
||||
0x14: 0x0421101f
|
||||
0x15: 0x40000000
|
||||
0x16: 0x411111f0
|
||||
0x17: 0x411111f0
|
||||
0x18: 0x04a11040
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x90170110
|
||||
0x1d: 0x40b7952d
|
||||
0x1e: 0x04451150
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Kabylake HDMI
|
||||
vendor_id: 0x8086280b
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x05: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x07: 0x18560010
|
258
models/addp1/gpio.h
Normal file
258
models/addp1/gpio.h
Normal file
@ -0,0 +1,258 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2019 System76
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef MAINBOARD_GPIO_H
|
||||
#define MAINBOARD_GPIO_H
|
||||
|
||||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
#ifndef __ACPI__
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
static const struct pad_config gpio_table[] = {
|
||||
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD7, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
|
||||
_PAD_CFG_STRUCT(GPD10, 0x04000601, 0x0000),
|
||||
PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_A0, 1, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A16, DN_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A20, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A21, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_B3, 0x80100100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B9, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B11, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_B13, 0x44000601, 0x0000),
|
||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_C2, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C13, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C14, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C15, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C18, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C19, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D4, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
|
||||
PAD_CFG_GPI(GPP_D7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D16, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_D21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_E6, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F2, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F3, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F4, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F8, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F9, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_F22, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F23, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H3, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H5, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H6, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H7, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_H16, 0x44000101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_H17, 0, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_H18, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H19, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H22, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_H23, 0x82880100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I0, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I1, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I2, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I3, 0x46080100, 0x0000),
|
||||
PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_I5, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I7, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I8, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I9, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I12, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I14, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_J1, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J3, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J9, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_J10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J11, DN_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K0, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K1, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K2, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K3, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K5, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K7, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K8, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K12, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K13, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K14, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K15, 0x80100100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K17, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K18, 1, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K19, 0x42800101, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K21, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K22, 0x44000101, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K23, NONE, DEEP),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
@ -9,202 +9,218 @@ PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x9DE8, Revisi
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0x9DD3, Revision 0x30
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x9DBC, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x9DB0, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.4: Class 0x00060400, Vendor 0x8086, Device 0x9DB4, Revision 0xF0
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x9D84, Revision 0x30
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x9DC8, Revision 0x30
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x9DA3, Revision 0x30
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x9DA4, Revision 0x30
|
||||
PCI Device: 0000:01:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:02:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:02:01.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:02:02.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:03:00.0: Class 0x00088000, Vendor 0x8086, Device 0x15E8, Revision 0x06
|
||||
PCI Device: 0000:04:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15D3, Revision 0x02
|
||||
PCI Device: 0000:05:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15D3, Revision 0x02
|
||||
PCI Device: 0000:05:01.0: Class 0x00060400, Vendor 0x8086, Device 0x15D3, Revision 0x02
|
||||
PCI Device: 0000:05:02.0: Class 0x00060400, Vendor 0x8086, Device 0x15D3, Revision 0x02
|
||||
PCI Device: 0000:05:04.0: Class 0x00060400, Vendor 0x8086, Device 0x15D3, Revision 0x02
|
||||
PCI Device: 0000:06:00.0: Class 0x000C0330, Vendor 0x1B73, Device 0x1100, Revision 0x10
|
||||
PCI Device: 0000:07:00.0: Class 0x000C0330, Vendor 0x1B21, Device 0x1142, Revision 0x00
|
||||
PCI Device: 0000:08:00.0: Class 0x00020000, Vendor 0x8086, Device 0x1533, Revision 0x03
|
||||
PCI Device: 0000:38:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x15E9, Revision 0x06
|
||||
PCI Device: 0000:39:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x5287, Revision 0x01
|
||||
PCI Device: 0000:39:00.1: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x12
|
||||
PCI Device: 0000:3a:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA804, Revision 0x00
|
||||
## GPIO ##
|
||||
300 Series PCH
|
||||
GPP_A0 = 0x44000702 0x00000018 0x00000010 0x00000000
|
||||
GPP_A1 = 0x44000702 0x00003c19 0x00000010 0x00000000
|
||||
GPP_A2 = 0x44000702 0x00003c1a 0x00000010 0x00000000
|
||||
GPP_A3 = 0x44000702 0x00003c1b 0x00000010 0x00000000
|
||||
GPP_A4 = 0x44000702 0x00003c1c 0x00000010 0x00000000
|
||||
GPP_A5 = 0x44000700 0x0000001d 0x00000010 0x00000000
|
||||
GPP_A6 = 0x44000702 0x0000001e 0x00000010 0x00000000
|
||||
GPP_A7 = 0x44000102 0x0000001f 0x00000010 0x00000000
|
||||
GPP_A8 = 0x44000700 0x00000020 0x00000010 0x00000000
|
||||
GPP_A9 = 0x44000700 0x00001021 0x00000010 0x00000000
|
||||
GPP_A10 = 0x44000500 0x00001022 0x00000010 0x00000000
|
||||
GPP_A11 = 0x44000102 0x00003023 0x00000010 0x00000000
|
||||
GPP_A12 = 0x44000102 0x00000024 0x00000010 0x00000000
|
||||
GPP_A13 = 0x44000700 0x00000025 0x00000010 0x00000000
|
||||
GPP_A14 = 0x44000700 0x00000026 0x00000010 0x00000000
|
||||
GPP_A15 = 0x44000702 0x00003027 0x00000010 0x00000000
|
||||
GPP_A16 = 0x44000102 0x00000028 0x00000010 0x00000000
|
||||
GPP_A17 = 0x44000102 0x00000029 0x00000010 0x00000000
|
||||
GPP_A18 = 0x44000102 0x0000002a 0x00000010 0x00000000
|
||||
GPP_A19 = 0x44000102 0x0000002b 0x00000010 0x00000000
|
||||
GPP_A20 = 0x44000102 0x0000002c 0x00000010 0x00000000
|
||||
GPP_A21 = 0x44000102 0x0000002d 0x00000010 0x00000000
|
||||
GPP_A22 = 0x44000200 0x0000002e 0x00000010 0x00000000
|
||||
GPP_A23 = 0x44000102 0x0000002f 0x00000010 0x00000000
|
||||
GPP_B0 = 0x44000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_B1 = 0x44000102 0x00000030 0x00000010 0x00000000
|
||||
GPP_B2 = 0x44000102 0x00000031 0x00000010 0x00000000
|
||||
GPP_B3 = 0x44000102 0x00000032 0x00000010 0x00000000
|
||||
GPP_B4 = 0x44000102 0x00000033 0x00000010 0x00000000
|
||||
GPP_B5 = 0x44000102 0x00000034 0x00000010 0x00000000
|
||||
GPP_B6 = 0x44000102 0x00000035 0x00000010 0x00000000
|
||||
GPP_B7 = 0x44000102 0x00000036 0x00000010 0x00000000
|
||||
GPP_B8 = 0x44000702 0x00000037 0x00000010 0x00000000
|
||||
GPP_B9 = 0x44000700 0x00000038 0x00000010 0x00000000
|
||||
GPP_B10 = 0x44000702 0x00000039 0x00000010 0x00000000
|
||||
GPP_B11 = 0x44000702 0x0000003a 0x00000010 0x00000000
|
||||
GPP_B12 = 0x44000102 0x0000003b 0x00000010 0x00000000
|
||||
GPP_B13 = 0x44000700 0x0000003c 0x00000010 0x00000000
|
||||
GPP_B14 = 0x44000700 0x0000003d 0x00000010 0x00000000
|
||||
GPP_B15 = 0x44000600 0x0000003e 0x00000010 0x00000000
|
||||
GPP_B16 = 0x44000102 0x0000003f 0x00000010 0x00000000
|
||||
GPP_B17 = 0x44000102 0x00000040 0x00000010 0x00000000
|
||||
GPP_B18 = 0x44000102 0x00000041 0x00000010 0x00000000
|
||||
GPP_B19 = 0x44000102 0x00000042 0x00000010 0x00000000
|
||||
GPP_B20 = 0x44000102 0x00000043 0x00000010 0x00000000
|
||||
GPP_B21 = 0x44000102 0x00000044 0x00000010 0x00000000
|
||||
GPP_B22 = 0x44000102 0x00000045 0x00000010 0x00000000
|
||||
GPP_B23 = 0x44000102 0x00000046 0x00000010 0x00000000
|
||||
GPP_G0 = 0x44000102 0x00000047 0x00000010 0x00000000
|
||||
GPP_G1 = 0x44000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_G2 = 0x44000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_G3 = 0x44000102 0x0000006c 0x00000010 0x00000000
|
||||
GPP_G4 = 0x44000102 0x0000006d 0x00000010 0x00000000
|
||||
GPP_G5 = 0x44000102 0x0000006e 0x00000010 0x00000000
|
||||
GPP_G6 = 0x44000102 0x0000006f 0x00000010 0x00000000
|
||||
GPP_G7 = 0x44000102 0x00000070 0x00000010 0x00000000
|
||||
GPP_D0 = 0x44000102 0x00000060 0x00000010 0x00000000
|
||||
GPP_D1 = 0x44000102 0x00000061 0x00000010 0x00000000
|
||||
GPP_D2 = 0x44000102 0x00000062 0x00000010 0x00000000
|
||||
GPP_D3 = 0x44000102 0x00000063 0x00000010 0x00000000
|
||||
GPP_D4 = 0x44000102 0x00000064 0x00000010 0x00000000
|
||||
GPP_D5 = 0x44000102 0x00000065 0x00000010 0x00000000
|
||||
GPP_D6 = 0x44000102 0x00000066 0x00000010 0x00000000
|
||||
GPP_D7 = 0x44000102 0x00000067 0x00000010 0x00000000
|
||||
GPP_D8 = 0x44000201 0x00000068 0x00000010 0x00000000
|
||||
GPP_D9 = 0x40880102 0x00000069 0x00000010 0x00000000
|
||||
GPP_D10 = 0x44000102 0x0000006a 0x00000010 0x00000000
|
||||
GPP_D11 = 0x40880102 0x0000306b 0x00000010 0x00000000
|
||||
GPP_D12 = 0x44000102 0x0000006c 0x00000810 0x00000000
|
||||
GPP_D13 = 0x44000102 0x0000006d 0x00000010 0x00000000
|
||||
GPP_D14 = 0x44000102 0x0000006e 0x00000010 0x00000000
|
||||
GPP_D15 = 0x44000102 0x0000006f 0x00000010 0x00000000
|
||||
GPP_D16 = 0x04000201 0x00000070 0x00000010 0x00000000
|
||||
GPP_D17 = 0x44000102 0x00000071 0x00000010 0x00000000
|
||||
GPP_D18 = 0x44000102 0x00000072 0x00000010 0x00000000
|
||||
GPP_D19 = 0x44000500 0x00000073 0x00000010 0x00000000
|
||||
GPP_D20 = 0x44000500 0x00000074 0x00000010 0x00000000
|
||||
GPP_D21 = 0x44000102 0x00000075 0x00000010 0x00000000
|
||||
GPP_D22 = 0x44000100 0x00000076 0x00000010 0x00000000
|
||||
GPP_D23 = 0x44000102 0x00000077 0x00000010 0x00000000
|
||||
GPP_F0 = 0x44000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_F1 = 0x44000700 0x00000030 0x00000010 0x00000000
|
||||
GPP_F2 = 0x44000100 0x00000031 0x00000010 0x00000000
|
||||
GPP_F3 = 0x44000100 0x00000032 0x00000010 0x00000000
|
||||
GPP_F4 = 0x44000100 0x00000033 0x00000010 0x00000000
|
||||
GPP_F5 = 0x44000700 0x00000034 0x00000010 0x00000000
|
||||
GPP_F6 = 0x44000702 0x00003035 0x00000010 0x00000000
|
||||
GPP_F7 = 0x44000700 0x00000036 0x00000010 0x00000000
|
||||
GPP_F8 = 0x44000702 0x00003037 0x00000010 0x00000000
|
||||
GPP_F9 = 0x44000700 0x00000038 0x00000010 0x00000000
|
||||
GPP_F10 = 0x44000700 0x00000039 0x00000010 0x00000000
|
||||
GPP_F11 = 0x44000100 0x0000003a 0x00000010 0x00000000
|
||||
GPP_F12 = 0x44000100 0x0000003b 0x00000010 0x00000000
|
||||
GPP_F13 = 0x44000100 0x0000003c 0x00000010 0x00000000
|
||||
GPP_F14 = 0x44000100 0x0000003d 0x00000010 0x00000000
|
||||
GPP_F15 = 0x44000100 0x0000003e 0x00000010 0x00000000
|
||||
GPP_F16 = 0x44000100 0x0000003f 0x00000010 0x00000000
|
||||
GPP_F17 = 0x44000100 0x00000040 0x00000010 0x00000000
|
||||
GPP_F18 = 0x44000100 0x00000041 0x00000010 0x00000000
|
||||
GPP_F19 = 0x44000100 0x00000042 0x00000010 0x00000000
|
||||
GPP_F20 = 0x44000100 0x00000043 0x00000010 0x00000000
|
||||
GPP_F21 = 0x44000100 0x00000044 0x00000010 0x00000000
|
||||
GPP_F22 = 0x44000100 0x00000045 0x00000010 0x00000000
|
||||
GPP_F23 = 0x44000100 0x00000046 0x00000010 0x00000000
|
||||
GPP_H0 = 0x44000100 0x00001047 0x00000010 0x00000000
|
||||
GPP_H1 = 0x44000102 0x00000048 0x00000010 0x00000000
|
||||
GPP_H2 = 0x44000f00 0x00000049 0x00000010 0x00000000
|
||||
GPP_H3 = 0x44000f00 0x0000004a 0x00000010 0x00000000
|
||||
GPP_H4 = 0x44000102 0x0000004b 0x00000010 0x00000000
|
||||
GPP_H5 = 0x44000102 0x0000004c 0x00000010 0x00000000
|
||||
GPP_H6 = 0x44000102 0x0000004d 0x00000010 0x00000000
|
||||
GPP_H7 = 0x44000102 0x0000004e 0x00000010 0x00000000
|
||||
GPP_H8 = 0x44000102 0x0000004f 0x00000010 0x00000000
|
||||
GPP_H9 = 0x44000102 0x00000050 0x00000010 0x00000000
|
||||
GPP_H10 = 0x44000102 0x00000051 0x00000010 0x00000000
|
||||
GPP_H11 = 0x44000102 0x00000052 0x00000010 0x00000000
|
||||
GPP_H12 = 0x44000102 0x00000053 0x00000010 0x00000000
|
||||
GPP_H13 = 0x44000102 0x00000054 0x00000010 0x00000000
|
||||
GPP_H14 = 0x44000102 0x00000055 0x00000010 0x00000000
|
||||
GPP_H15 = 0x44000102 0x00000056 0x00000010 0x00000000
|
||||
GPP_H16 = 0x44000102 0x00000057 0x00000010 0x00000000
|
||||
GPP_H17 = 0x44000102 0x00000058 0x00000010 0x00000000
|
||||
GPP_H18 = 0x44000102 0x00000059 0x00000010 0x00000000
|
||||
GPP_H19 = 0x44000500 0x0000005a 0x00000010 0x00000000
|
||||
GPP_H20 = 0x44000102 0x0000005b 0x00000010 0x00000000
|
||||
GPP_H21 = 0x44000102 0x0000005c 0x00000010 0x00000000
|
||||
GPP_H22 = 0x44000102 0x0000005d 0x00000810 0x00000000
|
||||
GPP_H23 = 0x84000201 0x0000005e 0x00000010 0x00000000
|
||||
GPD0 = 0x04000102 0x00000060 0x00000010 0x00000000
|
||||
GPD1 = 0x44000700 0x00003c61 0x00000010 0x00000000
|
||||
GPD2 = 0x04000102 0x00003c62 0x00000010 0x00000000
|
||||
GPD3 = 0x44000702 0x00003063 0x00000010 0x00000000
|
||||
GPD4 = 0x44000600 0x00000064 0x00000010 0x00000000
|
||||
GPD5 = 0x44000600 0x00000065 0x00000010 0x00000000
|
||||
GPD6 = 0x44000600 0x00000066 0x00000010 0x00000000
|
||||
GPD7 = 0x04000102 0x00000067 0x00000810 0x00000000
|
||||
GPD8 = 0x44000700 0x00000068 0x00000010 0x00000000
|
||||
GPD9 = 0x04000102 0x00000069 0x00000010 0x00000000
|
||||
GPD10 = 0x44000600 0x0000006a 0x00000010 0x00000000
|
||||
GPD11 = 0x04000102 0x0000006b 0x00000010 0x00000000
|
||||
GPP_C0 = 0x44000702 0x00000048 0x00000010 0x00000000
|
||||
GPP_C1 = 0x44000702 0x00000049 0x00000010 0x00000000
|
||||
GPP_C2 = 0x44000102 0x0000004a 0x00000810 0x00000000
|
||||
GPP_C3 = 0x44000102 0x0000004b 0x00000010 0x00000000
|
||||
GPP_C4 = 0x44000102 0x0000004c 0x00000010 0x00000000
|
||||
GPP_C5 = 0x44000102 0x0000004d 0x00000010 0x00000000
|
||||
GPP_C6 = 0x44000102 0x0000004e 0x00000010 0x00000000
|
||||
GPP_C7 = 0x44000102 0x0000004f 0x00000010 0x00000000
|
||||
GPP_C8 = 0x44000102 0x00000050 0x00000010 0x00000000
|
||||
GPP_C9 = 0x84800102 0x00003051 0x00000010 0x00000000
|
||||
GPP_C10 = 0x84000200 0x00000052 0x00000010 0x00000000
|
||||
GPP_C11 = 0x44000102 0x00000053 0x00000010 0x00000000
|
||||
GPP_C12 = 0x84000201 0x00000054 0x00000010 0x00000000
|
||||
GPP_C13 = 0x84000201 0x00000055 0x00000010 0x00000000
|
||||
GPP_C14 = 0x84000200 0x00000056 0x00000010 0x00000000
|
||||
GPP_C15 = 0x84000201 0x00003057 0x00000010 0x00000000
|
||||
GPP_C16 = 0x44000702 0x00000058 0x00000010 0x00000000
|
||||
GPP_C17 = 0x44000702 0x00000059 0x00000010 0x00000000
|
||||
GPP_C18 = 0x44000102 0x0000005a 0x00000010 0x00000000
|
||||
GPP_C19 = 0x44000102 0x0000005b 0x00000010 0x00000000
|
||||
GPP_C20 = 0x44000102 0x0000005c 0x00000010 0x00000000
|
||||
GPP_C21 = 0x44000102 0x0000005d 0x00000010 0x00000000
|
||||
GPP_C22 = 0x44000102 0x0000005e 0x00000010 0x00000000
|
||||
GPP_C23 = 0x80100102 0x0000005f 0x00000010 0x00000000
|
||||
GPP_E0 = 0x44000102 0x00000018 0x00000010 0x00000000
|
||||
GPP_E1 = 0x44000102 0x00000019 0x00000010 0x00000000
|
||||
GPP_E2 = 0x44000700 0x0000301a 0x00000010 0x00000000
|
||||
GPP_E3 = 0x44000102 0x0000001b 0x00000010 0x00000000
|
||||
GPP_E4 = 0x44000102 0x0000001c 0x00000010 0x00000000
|
||||
GPP_E5 = 0x44000102 0x0000001d 0x00000010 0x00000000
|
||||
GPP_E6 = 0x44000700 0x0000001e 0x00000010 0x00000000
|
||||
GPP_E7 = 0x44000102 0x0000001f 0x00000010 0x00000000
|
||||
GPP_E8 = 0x44000700 0x00000020 0x00000010 0x00000000
|
||||
GPP_E9 = 0x44000102 0x00000021 0x00000810 0x00000000
|
||||
GPP_E10 = 0x44000102 0x00000022 0x00000810 0x00000000
|
||||
GPP_E11 = 0x44000102 0x00000023 0x00000810 0x00000000
|
||||
GPP_E12 = 0x44000102 0x00000024 0x00000010 0x00000000
|
||||
GPP_E13 = 0x44000700 0x00000025 0x00000010 0x00000000
|
||||
GPP_E14 = 0x44000700 0x00000026 0x00000010 0x00000000
|
||||
GPP_E15 = 0x44000102 0x00000027 0x00000010 0x00000000
|
||||
GPP_E16 = 0x80880102 0x00000028 0x00000010 0x00000000
|
||||
GPP_E17 = 0x44000702 0x00000029 0x00000010 0x00000000
|
||||
GPP_E18 = 0x44000702 0x0000002a 0x00000010 0x00000000
|
||||
GPP_E19 = 0x44000602 0x0000002b 0x00000810 0x00000000
|
||||
GPP_E20 = 0x44000702 0x0000002c 0x00000010 0x00000000
|
||||
GPP_E21 = 0x44000602 0x0000002d 0x00000810 0x00000000
|
||||
GPP_E22 = 0x44000102 0x0000002e 0x00000010 0x00000000
|
||||
GPP_E23 = 0x44000102 0x0000002f 0x00000010 0x00000000
|
||||
300 Series PCH-LP
|
||||
GPP_A0 (0x6E,0x00) 0x44000702 0x00000018 0x00000010 0x00000000
|
||||
GPP_A1 (0x6E,0x02) 0x44000702 0x00003c19 0x00000010 0x00000000
|
||||
GPP_A2 (0x6E,0x04) 0x44000702 0x00003c1a 0x00000010 0x00000000
|
||||
GPP_A3 (0x6E,0x06) 0x44000702 0x00003c1b 0x00000010 0x00000000
|
||||
GPP_A4 (0x6E,0x08) 0x44000702 0x00003c1c 0x00000010 0x00000000
|
||||
GPP_A5 (0x6E,0x0A) 0x44000700 0x0000001d 0x00000010 0x00000000
|
||||
GPP_A6 (0x6E,0x0C) 0x44000700 0x0000001e 0x00000010 0x00000000
|
||||
GPP_A7 (0x6E,0x0E) 0x44000102 0x0000001f 0x00000010 0x00000000
|
||||
GPP_A8 (0x6E,0x10) 0x44000700 0x00000020 0x00000010 0x00000000
|
||||
GPP_A9 (0x6E,0x12) 0x44000700 0x00001021 0x00000010 0x00000000
|
||||
GPP_A10 (0x6E,0x14) 0x44000500 0x00001022 0x00000010 0x00000000
|
||||
GPP_A11 (0x6E,0x16) 0x44000102 0x00003023 0x00000010 0x00000000
|
||||
GPP_A12 (0x6E,0x18) 0x44000102 0x00000024 0x00000010 0x00000000
|
||||
GPP_A13 (0x6E,0x1A) 0x44000700 0x00000025 0x00000010 0x00000000
|
||||
GPP_A14 (0x6E,0x1C) 0x44000700 0x00000026 0x00000010 0x00000000
|
||||
GPP_A15 (0x6E,0x1E) 0x44000702 0x00003027 0x00000010 0x00000000
|
||||
GPP_A16 (0x6E,0x20) 0x44000102 0x00000028 0x00000010 0x00000000
|
||||
GPP_A17 (0x6E,0x22) 0x44000102 0x00000029 0x00000010 0x00000000
|
||||
GPP_A18 (0x6E,0x24) 0x44000102 0x0000002a 0x00000010 0x00000000
|
||||
GPP_A19 (0x6E,0x26) 0x44000102 0x0000002b 0x00000010 0x00000000
|
||||
GPP_A20 (0x6E,0x28) 0x44000102 0x0000002c 0x00000010 0x00000000
|
||||
GPP_A21 (0x6E,0x2A) 0x44000102 0x0000002d 0x00000010 0x00000000
|
||||
GPP_A22 (0x6E,0x2C) 0x44000200 0x0000002e 0x00000010 0x00000000
|
||||
GPP_A23 (0x6E,0x2E) 0x44000102 0x0000002f 0x00000010 0x00000000
|
||||
GPP_B0 (0x6E,0x32) 0x44000102 0x00000030 0x00000010 0x00000000
|
||||
GPP_B1 (0x6E,0x34) 0x44000102 0x00000031 0x00000010 0x00000000
|
||||
GPP_B2 (0x6E,0x36) 0x44000102 0x00000032 0x00000010 0x00000000
|
||||
GPP_B3 (0x6E,0x38) 0x44000102 0x00000033 0x00000010 0x00000000
|
||||
GPP_B4 (0x6E,0x3A) 0x44000102 0x00000034 0x00000010 0x00000000
|
||||
GPP_B5 (0x6E,0x3C) 0x44000102 0x00000035 0x00000010 0x00000000
|
||||
GPP_B6 (0x6E,0x3E) 0x44000102 0x00000036 0x00000010 0x00000000
|
||||
GPP_B7 (0x6E,0x40) 0x44000702 0x00000037 0x00000010 0x00000000
|
||||
GPP_B8 (0x6E,0x42) 0x44000702 0x00000038 0x00000010 0x00000000
|
||||
GPP_B9 (0x6E,0x44) 0x44000700 0x00000039 0x00000010 0x00000000
|
||||
GPP_B10 (0x6E,0x46) 0x44000702 0x0000003a 0x00000010 0x00000000
|
||||
GPP_B11 (0x6E,0x48) 0x44000102 0x0000003b 0x00000010 0x00000000
|
||||
GPP_B12 (0x6E,0x4A) 0x44000700 0x0000003c 0x00000010 0x00000000
|
||||
GPP_B13 (0x6E,0x4C) 0x44000700 0x0000003d 0x00000010 0x00000000
|
||||
GPP_B14 (0x6E,0x4E) 0x44000600 0x0000003e 0x00000010 0x00000000
|
||||
GPP_B15 (0x6E,0x50) 0x44000102 0x0000003f 0x00000010 0x00000000
|
||||
GPP_B16 (0x6E,0x52) 0x44000102 0x00000040 0x00000010 0x00000000
|
||||
GPP_B17 (0x6E,0x54) 0x44000102 0x00000041 0x00000010 0x00000000
|
||||
GPP_B18 (0x6E,0x56) 0x44000102 0x00000042 0x00000010 0x00000000
|
||||
GPP_B19 (0x6E,0x58) 0x44000102 0x00000043 0x00000010 0x00000000
|
||||
GPP_B20 (0x6E,0x5A) 0x44000102 0x00000044 0x00000010 0x00000000
|
||||
GPP_B21 (0x6E,0x5C) 0x44000102 0x00000045 0x00000010 0x00000000
|
||||
GPP_B22 (0x6E,0x5E) 0x44000102 0x00000046 0x00000010 0x00000000
|
||||
GPP_B23 (0x6E,0x60) 0x44000102 0x00000047 0x00000010 0x00000000
|
||||
GPP_G0 (0x6E,0x66) 0x44000102 0x0000006c 0x00000010 0x00000000
|
||||
GPP_G1 (0x6E,0x68) 0x44000102 0x0000006d 0x00000010 0x00000000
|
||||
GPP_G2 (0x6E,0x6A) 0x44000102 0x0000006e 0x00000010 0x00000000
|
||||
GPP_G3 (0x6E,0x6C) 0x44000102 0x0000006f 0x00000010 0x00000000
|
||||
GPP_G4 (0x6E,0x6E) 0x44000102 0x00000070 0x00000010 0x00000000
|
||||
GPP_G5 (0x6E,0x70) 0x44000100 0x00000071 0x00000010 0x00000000
|
||||
GPP_G6 (0x6E,0x72) 0x44000102 0x00000072 0x00000010 0x00000000
|
||||
GPP_G7 (0x6E,0x74) 0x44000102 0x00000073 0x00000010 0x00000000
|
||||
GPP_D0 (0x6D,0x00) 0x44000102 0x00000060 0x00000010 0x00000000
|
||||
GPP_D1 (0x6D,0x02) 0x44000102 0x00000061 0x00000010 0x00000000
|
||||
GPP_D2 (0x6D,0x04) 0x44000102 0x00000062 0x00000010 0x00000000
|
||||
GPP_D3 (0x6D,0x06) 0x44000102 0x00000063 0x00000010 0x00000000
|
||||
GPP_D4 (0x6D,0x08) 0x44000102 0x00000064 0x00000010 0x00000000
|
||||
GPP_D5 (0x6D,0x0A) 0x44000102 0x00000065 0x00000010 0x00000000
|
||||
GPP_D6 (0x6D,0x0C) 0x44000102 0x00000066 0x00000010 0x00000000
|
||||
GPP_D7 (0x6D,0x0E) 0x44000102 0x00000067 0x00000010 0x00000000
|
||||
GPP_D8 (0x6D,0x10) 0x44000201 0x00000068 0x00000010 0x00000000
|
||||
GPP_D9 (0x6D,0x12) 0x40880102 0x00000069 0x00000010 0x00000000
|
||||
GPP_D10 (0x6D,0x14) 0x44000102 0x0000006a 0x00000010 0x00000000
|
||||
GPP_D11 (0x6D,0x16) 0x40880102 0x0000306b 0x00000010 0x00000000
|
||||
GPP_D12 (0x6D,0x18) 0x44000102 0x0000006c 0x00000810 0x00000000
|
||||
GPP_D13 (0x6D,0x1A) 0x44000102 0x0000006d 0x00000010 0x00000000
|
||||
GPP_D14 (0x6D,0x1C) 0x44000102 0x0000006e 0x00000010 0x00000000
|
||||
GPP_D15 (0x6D,0x1E) 0x44000102 0x0000006f 0x00000010 0x00000000
|
||||
GPP_D16 (0x6D,0x20) 0x04000201 0x00000070 0x00000010 0x00000000
|
||||
GPP_D17 (0x6D,0x22) 0x44000102 0x00000071 0x00000010 0x00000000
|
||||
GPP_D18 (0x6D,0x24) 0x44000102 0x00000072 0x00000010 0x00000000
|
||||
GPP_D19 (0x6D,0x26) 0x44000500 0x00000073 0x00000010 0x00000000
|
||||
GPP_D20 (0x6D,0x28) 0x44000500 0x00000074 0x00000010 0x00000000
|
||||
GPP_D21 (0x6D,0x2A) 0x44000102 0x00000075 0x00000010 0x00000000
|
||||
GPP_D22 (0x6D,0x2C) 0x44000100 0x00000076 0x00000010 0x00000000
|
||||
GPP_D23 (0x6D,0x2E) 0x44000102 0x00000077 0x00000010 0x00000000
|
||||
GPP_F0 (0x6D,0x32) 0x44000700 0x00000030 0x00000010 0x00000000
|
||||
GPP_F1 (0x6D,0x34) 0x44000100 0x00000031 0x00000010 0x00000000
|
||||
GPP_F2 (0x6D,0x36) 0x44000100 0x00000032 0x00000010 0x00000000
|
||||
GPP_F3 (0x6D,0x38) 0x44000100 0x00000033 0x00000010 0x00000000
|
||||
GPP_F4 (0x6D,0x3A) 0x44000700 0x00000034 0x00000010 0x00000000
|
||||
GPP_F5 (0x6D,0x3C) 0x44000702 0x00003035 0x00000010 0x00000000
|
||||
GPP_F6 (0x6D,0x3E) 0x44000700 0x00000036 0x00000010 0x00000000
|
||||
GPP_F7 (0x6D,0x40) 0x44000702 0x00003037 0x00000010 0x00000000
|
||||
GPP_F8 (0x6D,0x42) 0x44000700 0x00000038 0x00000010 0x00000000
|
||||
GPP_F9 (0x6D,0x44) 0x44000700 0x00000039 0x00000010 0x00000000
|
||||
GPP_F10 (0x6D,0x46) 0x44000100 0x0000003a 0x00000010 0x00000000
|
||||
GPP_F11 (0x6D,0x48) 0x44000100 0x0000003b 0x00000010 0x00000000
|
||||
GPP_F12 (0x6D,0x4A) 0x44000100 0x0000003c 0x00000010 0x00000000
|
||||
GPP_F13 (0x6D,0x4C) 0x44000100 0x0000003d 0x00000010 0x00000000
|
||||
GPP_F14 (0x6D,0x4E) 0x44000100 0x0000003e 0x00000010 0x00000000
|
||||
GPP_F15 (0x6D,0x50) 0x44000100 0x0000003f 0x00000010 0x00000000
|
||||
GPP_F16 (0x6D,0x52) 0x44000100 0x00000040 0x00000010 0x00000000
|
||||
GPP_F17 (0x6D,0x54) 0x44000100 0x00000041 0x00000010 0x00000000
|
||||
GPP_F18 (0x6D,0x56) 0x44000100 0x00000042 0x00000010 0x00000000
|
||||
GPP_F19 (0x6D,0x58) 0x44000100 0x00000043 0x00000010 0x00000000
|
||||
GPP_F20 (0x6D,0x5A) 0x44000100 0x00000044 0x00000010 0x00000000
|
||||
GPP_F21 (0x6D,0x5C) 0x44000100 0x00000045 0x00000010 0x00000000
|
||||
GPP_F22 (0x6D,0x5E) 0x44000100 0x00000046 0x00000010 0x00000000
|
||||
GPP_F23 (0x6D,0x60) 0x44000100 0x00001047 0x00000010 0x00000000
|
||||
GPP_H0 (0x6D,0x62) 0x44000102 0x00000048 0x00000010 0x00000000
|
||||
GPP_H1 (0x6D,0x64) 0x44000f00 0x00000049 0x00000010 0x00000000
|
||||
GPP_H2 (0x6D,0x66) 0x44000f00 0x0000004a 0x00000010 0x00000000
|
||||
GPP_H3 (0x6D,0x68) 0x44000102 0x0000004b 0x00000010 0x00000000
|
||||
GPP_H4 (0x6D,0x6A) 0x44000102 0x0000004c 0x00000010 0x00000000
|
||||
GPP_H5 (0x6D,0x6C) 0x44000102 0x0000004d 0x00000010 0x00000000
|
||||
GPP_H6 (0x6D,0x6E) 0x44000102 0x0000004e 0x00000010 0x00000000
|
||||
GPP_H7 (0x6D,0x70) 0x44000102 0x0000004f 0x00000010 0x00000000
|
||||
GPP_H8 (0x6D,0x72) 0x44000102 0x00000050 0x00000010 0x00000000
|
||||
GPP_H9 (0x6D,0x74) 0x44000102 0x00000051 0x00000010 0x00000000
|
||||
GPP_H10 (0x6D,0x76) 0x44000102 0x00000052 0x00000010 0x00000000
|
||||
GPP_H11 (0x6D,0x78) 0x44000102 0x00000053 0x00000010 0x00000000
|
||||
GPP_H12 (0x6D,0x7A) 0x44000102 0x00000054 0x00000010 0x00000000
|
||||
GPP_H13 (0x6D,0x7C) 0x44000102 0x00000055 0x00000010 0x00000000
|
||||
GPP_H14 (0x6D,0x7E) 0x44000102 0x00000056 0x00000010 0x00000000
|
||||
GPP_H15 (0x6D,0x80) 0x44000102 0x00000057 0x00000010 0x00000000
|
||||
GPP_H16 (0x6D,0x82) 0x44000102 0x00000058 0x00000010 0x00000000
|
||||
GPP_H17 (0x6D,0x84) 0x44000102 0x00000059 0x00000010 0x00000000
|
||||
GPP_H18 (0x6D,0x86) 0x44000500 0x0000005a 0x00000010 0x00000000
|
||||
GPP_H19 (0x6D,0x88) 0x44000102 0x0000005b 0x00000010 0x00000000
|
||||
GPP_H20 (0x6D,0x8A) 0x44000102 0x0000005c 0x00000010 0x00000000
|
||||
GPP_H21 (0x6D,0x8C) 0x44000102 0x0000005d 0x00000810 0x00000000
|
||||
GPP_H22 (0x6D,0x8E) 0x84000201 0x0000005e 0x00000010 0x00000000
|
||||
GPP_H23 (0x6D,0x90) 0x44000102 0x0000005f 0x00000010 0x00000000
|
||||
GPD0 (0x6C,0x00) 0x04000102 0x00000060 0x00000010 0x00000000
|
||||
GPD1 (0x6C,0x02) 0x44000702 0x00003c61 0x00000010 0x00000000
|
||||
GPD2 (0x6C,0x04) 0x04000102 0x00003c62 0x00000010 0x00000000
|
||||
GPD3 (0x6C,0x06) 0x44000702 0x00003063 0x00000010 0x00000000
|
||||
GPD4 (0x6C,0x08) 0x44000600 0x00000064 0x00000010 0x00000000
|
||||
GPD5 (0x6C,0x0A) 0x44000600 0x00000065 0x00000010 0x00000000
|
||||
GPD6 (0x6C,0x0C) 0x44000600 0x00000066 0x00000010 0x00000000
|
||||
GPD7 (0x6C,0x0E) 0x04000102 0x00000067 0x00000810 0x00000000
|
||||
GPD8 (0x6C,0x10) 0x44000700 0x00000068 0x00000010 0x00000000
|
||||
GPD9 (0x6C,0x12) 0x04000102 0x00000069 0x00000010 0x00000000
|
||||
GPD10 (0x6C,0x14) 0x44000600 0x0000006a 0x00000010 0x00000000
|
||||
GPD11 (0x6C,0x16) 0x04000102 0x0000006b 0x00000010 0x00000000
|
||||
GPP_C0 (0x6A,0x00) 0x44000702 0x00000048 0x00000010 0x00000000
|
||||
GPP_C1 (0x6A,0x02) 0x44000702 0x00000049 0x00000010 0x00000000
|
||||
GPP_C2 (0x6A,0x04) 0x44000102 0x0000004a 0x00000810 0x00000000
|
||||
GPP_C3 (0x6A,0x06) 0x44000102 0x0000004b 0x00000010 0x00000000
|
||||
GPP_C4 (0x6A,0x08) 0x44000102 0x0000004c 0x00000010 0x00000000
|
||||
GPP_C5 (0x6A,0x0A) 0x44000102 0x0000004d 0x00000010 0x00000000
|
||||
GPP_C6 (0x6A,0x0C) 0x44000102 0x0000004e 0x00000010 0x00000000
|
||||
GPP_C7 (0x6A,0x0E) 0x44000102 0x0000004f 0x00000010 0x00000000
|
||||
GPP_C8 (0x6A,0x10) 0x44000102 0x00000050 0x00000010 0x00000000
|
||||
GPP_C9 (0x6A,0x12) 0x84800102 0x00003051 0x00000010 0x00000000
|
||||
GPP_C10 (0x6A,0x14) 0x84000200 0x00000052 0x00000010 0x00000000
|
||||
GPP_C11 (0x6A,0x16) 0x44000102 0x00000053 0x00000010 0x00000000
|
||||
GPP_C12 (0x6A,0x18) 0x84000201 0x00000054 0x00000010 0x00000000
|
||||
GPP_C13 (0x6A,0x1A) 0x84000201 0x00000055 0x00000010 0x00000000
|
||||
GPP_C14 (0x6A,0x1C) 0x84000200 0x00000056 0x00000010 0x00000000
|
||||
GPP_C15 (0x6A,0x1E) 0x84000201 0x00003057 0x00000010 0x00000000
|
||||
GPP_C16 (0x6A,0x20) 0x44000702 0x00000058 0x00000010 0x00000000
|
||||
GPP_C17 (0x6A,0x22) 0x44000702 0x00000059 0x00000010 0x00000000
|
||||
GPP_C18 (0x6A,0x24) 0x44000102 0x0000005a 0x00000010 0x00000000
|
||||
GPP_C19 (0x6A,0x26) 0x44000102 0x0000005b 0x00000010 0x00000000
|
||||
GPP_C20 (0x6A,0x28) 0x44000102 0x0000005c 0x00000010 0x00000000
|
||||
GPP_C21 (0x6A,0x2A) 0x44000102 0x0000005d 0x00000010 0x00000000
|
||||
GPP_C22 (0x6A,0x2C) 0x44000102 0x0000005e 0x00000010 0x00000000
|
||||
GPP_C23 (0x6A,0x2E) 0x80100102 0x0000005f 0x00000010 0x00000000
|
||||
GPP_E0 (0x6A,0x30) 0x44000102 0x00000018 0x00000010 0x00000000
|
||||
GPP_E1 (0x6A,0x32) 0x44000102 0x00000019 0x00000010 0x00000000
|
||||
GPP_E2 (0x6A,0x34) 0x44000702 0x0000301a 0x00000010 0x00000000
|
||||
GPP_E3 (0x6A,0x36) 0x44000102 0x0000001b 0x00000010 0x00000000
|
||||
GPP_E4 (0x6A,0x38) 0x44000102 0x0000001c 0x00000010 0x00000000
|
||||
GPP_E5 (0x6A,0x3A) 0x44000102 0x0000001d 0x00000010 0x00000000
|
||||
GPP_E6 (0x6A,0x3C) 0x44000700 0x0000001e 0x00000010 0x00000000
|
||||
GPP_E7 (0x6A,0x3E) 0x44000102 0x0000001f 0x00000010 0x00000000
|
||||
GPP_E8 (0x6A,0x40) 0x44000700 0x00000020 0x00000010 0x00000000
|
||||
GPP_E9 (0x6A,0x42) 0x44000102 0x00000021 0x00000810 0x00000000
|
||||
GPP_E10 (0x6A,0x44) 0x44000102 0x00000022 0x00000810 0x00000000
|
||||
GPP_E11 (0x6A,0x46) 0x44000102 0x00000023 0x00000810 0x00000000
|
||||
GPP_E12 (0x6A,0x48) 0x44000102 0x00000024 0x00000010 0x00000000
|
||||
GPP_E13 (0x6A,0x4A) 0x44000700 0x00000025 0x00000010 0x00000000
|
||||
GPP_E14 (0x6A,0x4C) 0x44000700 0x00000026 0x00000010 0x00000000
|
||||
GPP_E15 (0x6A,0x4E) 0x44000102 0x00000027 0x00000010 0x00000000
|
||||
GPP_E16 (0x6A,0x50) 0x80880102 0x00000028 0x00000010 0x00000000
|
||||
GPP_E17 (0x6A,0x52) 0x44000702 0x00000029 0x00000010 0x00000000
|
||||
GPP_E18 (0x6A,0x54) 0x44000702 0x0000002a 0x00000010 0x00000000
|
||||
GPP_E19 (0x6A,0x56) 0x44000602 0x0000002b 0x00000810 0x00000000
|
||||
GPP_E20 (0x6A,0x58) 0x44000702 0x0000002c 0x00000010 0x00000000
|
||||
GPP_E21 (0x6A,0x5A) 0x44000602 0x0000002d 0x00000810 0x00000000
|
||||
GPP_E22 (0x6A,0x5C) 0x44000102 0x0000002e 0x00000010 0x00000000
|
||||
GPP_E23 (0x6A,0x5E) 0x44000102 0x0000002f 0x00000010 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
|
@ -26,7 +26,7 @@ CONFIG_USE_BLOBS=y
|
||||
# CONFIG_UBSAN is not set
|
||||
# CONFIG_NO_RELOCATABLE_RAMSTAGE is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
CONFIG_TSEG_STAGE_CACHE=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
|
||||
@ -50,7 +50,6 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_CAVIUM is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
@ -73,6 +72,7 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PORTWELL is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
@ -84,6 +84,7 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="system76/whl-u"
|
||||
@ -102,7 +103,7 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="System76"
|
||||
CONFIG_VARIANT_DIR="darp5"
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_INTEL_GMA_VBT_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/vbt.rom"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xe00
|
||||
# CONFIG_POST_IO is not set
|
||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
@ -114,6 +115,11 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_LEN=0x0
|
||||
CONFIG_CPU_MICROCODE_CBFS_LOC=0x0
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_DIMM_MAX=2
|
||||
@ -127,25 +133,30 @@ CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1325
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_MAINBOARD_VERSION="darp5"
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
CONFIG_CPU_MICROCODE_CBFS_LEN=0x0
|
||||
CONFIG_CPU_MICROCODE_CBFS_LOC=0x0
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_HEAP_SIZE=0x8000
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
||||
CONFIG_BOARD_SYSTEM76_DARP5=y
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1325
|
||||
CONFIG_CONSOLE_POST=y
|
||||
CONFIG_PXE_ROM_ID="10ec,8168"
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
@ -154,6 +165,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
@ -183,9 +195,10 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=216
|
||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
||||
@ -205,7 +218,6 @@ CONFIG_FSP_FD_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/FSP.fd"
|
||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
||||
# CONFIG_NHLT_MAX98357 is not set
|
||||
# CONFIG_NHLT_DA7219 is not set
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_IFD_CHIPSET="cnl"
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
@ -213,25 +225,22 @@ CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
|
||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=6
|
||||
# CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE=y
|
||||
CONFIG_SOC_INTEL_COMMON_CANNONLAKE_BASE=y
|
||||
# CONFIG_SOC_INTEL_COFFEELAKE is not set
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_BASE=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS=y
|
||||
CONFIG_SOC_INTEL_WHISKEYLAKE=y
|
||||
# CONFIG_SOC_INTEL_COMETLAKE is not set
|
||||
# CONFIG_SOC_INTEL_CANNONLAKE_PCH_H is not set
|
||||
# CONFIG_NHLT_MAX98373 is not set
|
||||
CONFIG_MAX_ROOT_PORTS=16
|
||||
CONFIG_MAX_PCIE_CLOCKS=6
|
||||
# CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE is not set
|
||||
# CONFIG_USE_CANNONLAKE_CAR_NEM_ENHANCED is not set
|
||||
CONFIG_USE_CANNONLAKE_FSP_CAR=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT=0
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
||||
CONFIG_SOC_INTEL_COMMON=y
|
||||
|
||||
@ -247,11 +256,6 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
||||
# CONFIG_INTEL_CAR_NEM is not set
|
||||
# CONFIG_INTEL_CAR_CQOS is not set
|
||||
# CONFIG_INTEL_CAR_NEM_ENHANCED is not set
|
||||
|
||||
#
|
||||
# Multiple Processor (MP) Initialization Options
|
||||
#
|
||||
CONFIG_USE_COREBOOT_NATIVE_MP_INIT=y
|
||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||
@ -264,8 +268,9 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
# CONFIG_SKIP_GRAPHICS_ENABLING is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||
@ -284,6 +289,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_AHCI_PORT_IMPLEMENTED_INVERT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||
@ -292,16 +298,19 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SA_PCIEX_LENGTH=0x10000000
|
||||
# CONFIG_SA_ENABLE_IMR is not set
|
||||
# CONFIG_SA_ENABLE_DPR is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
# CONFIG_USE_LEGACY_8254_TIMER is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
||||
|
||||
#
|
||||
# Intel SoC Common PCH Code
|
||||
@ -318,13 +327,13 @@ CONFIG_SOC_INTEL_COMMON_RESET=y
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
# CONFIG_ACPI_CONSOLE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_EC_PTS_WAK=y
|
||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
||||
@ -338,7 +347,6 @@ CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
@ -354,23 +362,24 @@ CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
||||
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_NO_SMM is not set
|
||||
# CONFIG_SMM_ASEG is not set
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_X86_AMD_INIT_SIPI is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
@ -391,7 +400,6 @@ CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
@ -413,18 +421,15 @@ CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
||||
# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
# CONFIG_EC_GOOGLE_WILCO is not set
|
||||
CONFIG_EC_BASE_ACPI_DATA=0x930
|
||||
CONFIG_EC_BASE_ACPI_COMMAND=0x934
|
||||
CONFIG_EC_BASE_HOST_DATA=0x940
|
||||
CONFIG_EC_BASE_HOST_COMMAND=0x944
|
||||
CONFIG_EC_BASE_PACKET=0x950
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
@ -477,28 +482,6 @@ CONFIG_UDK_VERSION=2017
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_USE_ARCH_TIMER is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_PPC64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_PPC64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
CONFIG_ARCH_RISCV_M=y
|
||||
# CONFIG_ARCH_RISCV_S is not set
|
||||
# CONFIG_ARCH_RISCV_U is not set
|
||||
# CONFIG_ARCH_RISCV_RV64 is not set
|
||||
# CONFIG_ARCH_RISCV_RV32 is not set
|
||||
# CONFIG_ARCH_RISCV_PMP is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
# CONFIG_RISCV_USE_ARCH_TIMER is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@ -530,15 +513,13 @@ CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
CONFIG_IDT_IN_EVERY_STAGE=y
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
|
||||
#
|
||||
# Devices
|
||||
@ -567,8 +548,6 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
@ -577,12 +556,13 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
@ -609,11 +589,10 @@ CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
@ -625,6 +604,8 @@ CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_HAVE_USBDEBUG is not set
|
||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
||||
# CONFIG_VPD is not set
|
||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
@ -640,6 +621,8 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
@ -647,7 +630,6 @@ CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
CONFIG_FSP_T_CBFS="fspt.bin"
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
CONFIG_FSP_T_FILE="$(obj)/Fsp_T.fd"
|
||||
CONFIG_FSP_CAR=y
|
||||
CONFIG_FSP_T_XIP=y
|
||||
@ -662,12 +644,13 @@ CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_HAVE_INTEL_PTT is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
# CONFIG_LPC_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
|
||||
@ -680,7 +663,6 @@ CONFIG_DRIVERS_MC146818=y
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVERS_USB_ACPI is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
@ -695,6 +677,12 @@ CONFIG_DRIVERS_MC146818=y
|
||||
# Trusted Platform Module
|
||||
#
|
||||
CONFIG_USER_NO_TPM=y
|
||||
|
||||
#
|
||||
# Memory initialization
|
||||
#
|
||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
@ -734,12 +722,10 @@ CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
||||
@ -802,7 +788,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
#
|
||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
# CONFIG_DEBUG_SMM_RELOCATION is not set
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
@ -824,6 +809,7 @@ CONFIG_HAVE_DEBUG_GPIO=y
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
CONFIG_NO_EDID_FILL_FB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
@ -836,5 +822,7 @@ CONFIG_REG_SCRIPT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_POSTCAR=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
218
models/darp5/gpio.h
Normal file
218
models/darp5/gpio.h
Normal file
@ -0,0 +1,218 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2019 System76
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef MAINBOARD_GPIO_H
|
||||
#define MAINBOARD_GPIO_H
|
||||
|
||||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
#ifndef __ACPI__
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
static const struct pad_config gpio_table[] = {
|
||||
PAD_CFG_GPI(GPD0, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD7, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD9, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD11, NONE, PWROK),
|
||||
PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A21, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B11, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_C9, 0x84800100, 0x3000),
|
||||
PAD_CFG_TERM_GPO(GPP_C10, 0, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_C11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C12, 1, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_C13, 1, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_C14, 0, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_C15, 1, UP_20K, PLTRST),
|
||||
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C22, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_C23, 0x80100100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D7, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D8, 1, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_D9, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_D10, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_D11, 0x40880100, 0x3000),
|
||||
PAD_CFG_GPI(GPP_D12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D15, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D16, 1, NONE, PWROK),
|
||||
PAD_CFG_GPI(GPP_D17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D18, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_D21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E1, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E2, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E5, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E15, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_E16, 0x80880100, 0x0000),
|
||||
PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_F1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F3, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F9, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F23, DN_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF3),
|
||||
PAD_CFG_GPI(GPP_H3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H17, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H22, 1, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_H23, NONE, DEEP),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
BIN
models/darp5/uecflash.efi
(Stored with Git LFS)
Normal file
BIN
models/darp5/uecflash.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
@ -4,6 +4,7 @@ PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x5916, Revisi
|
||||
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0x1911, Revision 0x00
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x9D2F, Revision 0x21
|
||||
PCI Device: 0000:00:14.2: Class 0x00118000, Vendor 0x8086, Device 0x9D31, Revision 0x21
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x9D3A, Revision 0x21
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0x9D03, Revision 0x21
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x9D10, Revision 0xF1
|
||||
PCI Device: 0000:00:1c.4: Class 0x00060400, Vendor 0x8086, Device 0x9D14, Revision 0xF1
|
||||
@ -16,173 +17,173 @@ PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x9D23, Revisi
|
||||
PCI Device: 0000:3a:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x5287, Revision 0x01
|
||||
PCI Device: 0000:3a:00.1: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x12
|
||||
PCI Device: 0000:3b:00.0: Class 0x00028000, Vendor 0x8086, Device 0x24FB, Revision 0x10
|
||||
PCI Device: 0000:3c:00.0: Class 0x00010802, Vendor 0x1B85, Device 0x6018, Revision 0x01
|
||||
PCI Device: 0000:3c:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA804, Revision 0x00
|
||||
## GPIO ##
|
||||
100 Series PCH-LP
|
||||
GPP_A0 = 0x44000502 0x00000018
|
||||
GPP_A1 = 0x44000402 0x00000019
|
||||
GPP_A2 = 0x44000402 0x0000001a
|
||||
GPP_A3 = 0x44000402 0x0000001b
|
||||
GPP_A4 = 0x44000402 0x0000001c
|
||||
GPP_A5 = 0x44000600 0x0000001d
|
||||
GPP_A6 = 0x44000402 0x0000001e
|
||||
GPP_A7 = 0x44000102 0x0000001f
|
||||
GPP_A8 = 0x44000700 0x00000020
|
||||
GPP_A9 = 0x44000600 0x00000021
|
||||
GPP_A10 = 0x44000600 0x00001022
|
||||
GPP_A11 = 0x44000200 0x00000023
|
||||
GPP_A12 = 0x44000200 0x00000024
|
||||
GPP_A13 = 0x44000200 0x00000025
|
||||
GPP_A14 = 0x44000600 0x00000026
|
||||
GPP_A15 = 0x44000502 0x00000027
|
||||
GPP_A16 = 0x44000200 0x00000028
|
||||
GPP_A17 = 0x44000200 0x00000029
|
||||
GPP_A18 = 0x44000201 0x0000002a
|
||||
GPP_A19 = 0x44000603 0x0000002b
|
||||
GPP_A20 = 0x44000200 0x0000002c
|
||||
GPP_A21 = 0x84000200 0x0000102d
|
||||
GPP_A22 = 0x04000200 0x0000002e
|
||||
GPP_A23 = 0x04000200 0x0000002f
|
||||
GPP_B0 = 0x44000700 0x00000030
|
||||
GPP_B1 = 0x44000700 0x00000031
|
||||
GPP_B2 = 0x44000200 0x00000032
|
||||
GPP_B3 = 0x44000200 0x00000033
|
||||
GPP_B4 = 0x44000200 0x00000034
|
||||
GPP_B5 = 0x44000200 0x00000035
|
||||
GPP_B6 = 0x44000200 0x00000036
|
||||
GPP_B7 = 0x44000702 0x00000037
|
||||
GPP_B8 = 0x44000700 0x00000038
|
||||
GPP_B9 = 0x44000702 0x00000039
|
||||
GPP_B10 = 0x44000700 0x0000003a
|
||||
GPP_B11 = 0x44000700 0x0000003b
|
||||
GPP_B12 = 0x44000200 0x0000003c
|
||||
GPP_B13 = 0x44000700 0x0000003d
|
||||
GPP_B14 = 0x44000600 0x0000103e
|
||||
GPP_B15 = 0x44000200 0x0000003f
|
||||
GPP_B16 = 0x44000200 0x00000040
|
||||
GPP_B17 = 0x44000200 0x00000041
|
||||
GPP_B18 = 0x44000600 0x00003042
|
||||
GPP_B19 = 0x44000200 0x00000043
|
||||
GPP_B20 = 0x44000200 0x00000044
|
||||
GPP_B21 = 0x44000200 0x00000045
|
||||
GPP_B22 = 0x44000700 0x00001046
|
||||
GPP_B23 = 0x44000200 0x00000047
|
||||
GPP_C0 = 0x44000702 0x00000048
|
||||
GPP_C1 = 0x44000702 0x00001049
|
||||
GPP_C2 = 0x44000201 0x0000104a
|
||||
GPP_C3 = 0x44000200 0x0000004b
|
||||
GPP_C4 = 0x44000200 0x0000004c
|
||||
GPP_C5 = 0x44000200 0x0000004d
|
||||
GPP_C6 = 0xffffffff 0xffffffff
|
||||
GPP_C7 = 0xffffffff 0xffffffff
|
||||
GPP_C8 = 0x44000702 0x00000050
|
||||
GPP_C9 = 0x44000700 0x00000051
|
||||
GPP_C10 = 0x44000700 0x00000052
|
||||
GPP_C11 = 0x44000702 0x00000053
|
||||
GPP_C12 = 0x44000702 0x00000054
|
||||
GPP_C13 = 0x82880102 0x00000055
|
||||
GPP_C14 = 0x44000700 0x00000056
|
||||
GPP_C15 = 0x44000702 0x00000057
|
||||
GPP_C16 = 0x44000200 0x00000058
|
||||
GPP_C17 = 0x44000200 0x00000059
|
||||
GPP_C18 = 0x44000200 0x0000005a
|
||||
GPP_C19 = 0x40880102 0x0000005b
|
||||
GPP_C20 = 0x44000702 0x0000005c
|
||||
GPP_C21 = 0x44000700 0x0000005d
|
||||
GPP_C22 = 0x44000700 0x0000005e
|
||||
GPP_C23 = 0x44000702 0x0000005f
|
||||
GPP_D0 = 0x44000200 0x00000060
|
||||
GPP_D1 = 0x44000200 0x00000061
|
||||
GPP_D2 = 0x44000200 0x00000062
|
||||
GPP_D3 = 0x44000200 0x00000063
|
||||
GPP_D4 = 0x44000200 0x00000064
|
||||
GPP_D5 = 0x44000702 0x00000065
|
||||
GPP_D6 = 0x44000702 0x00000066
|
||||
GPP_D7 = 0x44000700 0x00000067
|
||||
GPP_D8 = 0x44000201 0x00000068
|
||||
GPP_D9 = 0x44000200 0x00000069
|
||||
GPP_D10 = 0x44000200 0x0000006a
|
||||
GPP_D11 = 0x44000200 0x0000006b
|
||||
GPP_D12 = 0x44000200 0x0000006c
|
||||
GPP_D13 = 0x44000200 0x0000006d
|
||||
GPP_D14 = 0x44000200 0x0000006e
|
||||
GPP_D15 = 0x44000700 0x0000006f
|
||||
GPP_D16 = 0x44000702 0x00000070
|
||||
GPP_D17 = 0x44000700 0x00000071
|
||||
GPP_D18 = 0x44000700 0x00000072
|
||||
GPP_D19 = 0x44000700 0x00000073
|
||||
GPP_D20 = 0x44000700 0x00000074
|
||||
GPP_D21 = 0x44000100 0x00000075
|
||||
GPP_D22 = 0x44000700 0x00000076
|
||||
GPP_D23 = 0x44000700 0x00000077
|
||||
GPP_E0 = 0x42100100 0x00001018
|
||||
GPP_E1 = 0x44000702 0x00000019
|
||||
GPP_E2 = 0x44000502 0x0000001a
|
||||
GPP_E3 = 0x40000000 0x0000001b
|
||||
GPP_E4 = 0x04000700 0x0000001c
|
||||
GPP_E5 = 0x04000700 0x0000001d
|
||||
GPP_E6 = 0x44000200 0x0000001e
|
||||
GPP_E7 = 0x44000100 0x0000001f
|
||||
GPP_E8 = 0x44000700 0x00000020
|
||||
GPP_E9 = 0x44000200 0x00000021
|
||||
GPP_E10 = 0x44000200 0x00000022
|
||||
GPP_E11 = 0x44000200 0x00000023
|
||||
GPP_E12 = 0x44000200 0x00000024
|
||||
GPP_E13 = 0x44000700 0x00000025
|
||||
GPP_E14 = 0x44000700 0x00000026
|
||||
GPP_E15 = 0x42840102 0x00000027
|
||||
GPP_E16 = 0x80880102 0x00000028
|
||||
GPP_E17 = 0x44000702 0x00000029
|
||||
GPP_E18 = 0x44000702 0x0000002a
|
||||
GPP_E19 = 0x44000702 0x0000102b
|
||||
GPP_E20 = 0x44000702 0x0000002c
|
||||
GPP_E21 = 0x44000702 0x0000102d
|
||||
GPP_E22 = 0x40100000 0x0000002e
|
||||
GPP_E23 = 0x44000201 0x0000102f
|
||||
GPD0 = 0x04000702 0x00000050
|
||||
GPD1 = 0x04000702 0x00000051
|
||||
GPD2 = 0x00880502 0x00000052
|
||||
GPD3 = 0x04000702 0x00003053
|
||||
GPD4 = 0x04000700 0x00000054
|
||||
GPD5 = 0x04000700 0x00000055
|
||||
GPD6 = 0x04000700 0x00000056
|
||||
GPD7 = 0x04000301 0x00000057
|
||||
GPD8 = 0x04000700 0x00000058
|
||||
GPD9 = 0x04000700 0x00000059
|
||||
GPD10 = 0x04000700 0x0000005a
|
||||
GPD11 = 0x04000500 0x0000005b
|
||||
GPP_F0 = 0x44000700 0x00000030
|
||||
GPP_F1 = 0x44000702 0x00000031
|
||||
GPP_F2 = 0x44000700 0x00000032
|
||||
GPP_F3 = 0x44000700 0x00000033
|
||||
GPP_F4 = 0x44000702 0x02000034
|
||||
GPP_F5 = 0x44000702 0x02000035
|
||||
GPP_F6 = 0x44000702 0x02000036
|
||||
GPP_F7 = 0x44000702 0x02000037
|
||||
GPP_F8 = 0x44000702 0x02000038
|
||||
GPP_F9 = 0x44000702 0x02000039
|
||||
GPP_F10 = 0x44000b02 0x0200003a
|
||||
GPP_F11 = 0x44000b02 0x0200003b
|
||||
GPP_F12 = 0x44000702 0x0000003c
|
||||
GPP_F13 = 0x44000702 0x0000003d
|
||||
GPP_F14 = 0x44000702 0x0000003e
|
||||
GPP_F15 = 0x44000702 0x0000003f
|
||||
GPP_F16 = 0x44000702 0x00000040
|
||||
GPP_F17 = 0x44000700 0x00000041
|
||||
GPP_F18 = 0x44000700 0x00000042
|
||||
GPP_F19 = 0x44000702 0x00000043
|
||||
GPP_F20 = 0x44000700 0x00000044
|
||||
GPP_F21 = 0x44000700 0x00000045
|
||||
GPP_F22 = 0x44000700 0x00000046
|
||||
GPP_F23 = 0x40100102 0x00000047
|
||||
GPP_G0 = 0x44000700 0x00000048
|
||||
GPP_G1 = 0x44000102 0x00000049
|
||||
GPP_G2 = 0x44000700 0x0000004a
|
||||
GPP_G3 = 0x44000700 0x0000004b
|
||||
GPP_G4 = 0x44000700 0x0000004c
|
||||
GPP_G5 = 0x44000702 0x0000004d
|
||||
GPP_G6 = 0x44000700 0x0000004e
|
||||
GPP_G7 = 0x44000702 0x0000004f
|
||||
GPP_A0 (0xAF,0x00) 0x44000502 0x00000018
|
||||
GPP_A1 (0xAF,0x01) 0x44000402 0x00000019
|
||||
GPP_A2 (0xAF,0x02) 0x44000402 0x0000001a
|
||||
GPP_A3 (0xAF,0x03) 0x44000402 0x0000001b
|
||||
GPP_A4 (0xAF,0x04) 0x44000402 0x0000001c
|
||||
GPP_A5 (0xAF,0x05) 0x44000600 0x0000001d
|
||||
GPP_A6 (0xAF,0x06) 0x44000402 0x0000001e
|
||||
GPP_A7 (0xAF,0x07) 0x44000102 0x0000001f
|
||||
GPP_A8 (0xAF,0x08) 0x44000700 0x00000020
|
||||
GPP_A9 (0xAF,0x09) 0x44000600 0x00000021
|
||||
GPP_A10 (0xAF,0x0A) 0x44000600 0x00001022
|
||||
GPP_A11 (0xAF,0x0B) 0x44000200 0x00000023
|
||||
GPP_A12 (0xAF,0x0C) 0x44000300 0x00000024
|
||||
GPP_A13 (0xAF,0x0D) 0x44000200 0x00000025
|
||||
GPP_A14 (0xAF,0x0E) 0x44000600 0x00000026
|
||||
GPP_A15 (0xAF,0x0F) 0x44000502 0x00000027
|
||||
GPP_A16 (0xAF,0x10) 0x44000200 0x00000028
|
||||
GPP_A17 (0xAF,0x11) 0x44000200 0x00000029
|
||||
GPP_A18 (0xAF,0x12) 0x44000201 0x0000002a
|
||||
GPP_A19 (0xAF,0x13) 0x44000603 0x0000002b
|
||||
GPP_A20 (0xAF,0x14) 0x44000200 0x0000002c
|
||||
GPP_A21 (0xAF,0x15) 0x84000200 0x0000102d
|
||||
GPP_A22 (0xAF,0x16) 0x04000200 0x0000002e
|
||||
GPP_A23 (0xAF,0x17) 0x04000200 0x0000002f
|
||||
GPP_B0 (0xAF,0x18) 0x44000700 0x00000030
|
||||
GPP_B1 (0xAF,0x19) 0x44000700 0x00000031
|
||||
GPP_B2 (0xAF,0x1A) 0x44000200 0x00000032
|
||||
GPP_B3 (0xAF,0x1B) 0x44000200 0x00000033
|
||||
GPP_B4 (0xAF,0x1C) 0x44000200 0x00000034
|
||||
GPP_B5 (0xAF,0x1D) 0x44000200 0x00000035
|
||||
GPP_B6 (0xAF,0x1E) 0x44000200 0x00000036
|
||||
GPP_B7 (0xAF,0x1F) 0x44000702 0x00000037
|
||||
GPP_B8 (0xAF,0x20) 0x44000702 0x00000038
|
||||
GPP_B9 (0xAF,0x21) 0x44000702 0x00000039
|
||||
GPP_B10 (0xAF,0x22) 0x44000702 0x0000003a
|
||||
GPP_B11 (0xAF,0x23) 0x44000700 0x0000003b
|
||||
GPP_B12 (0xAF,0x24) 0x44000200 0x0000003c
|
||||
GPP_B13 (0xAF,0x25) 0x44000700 0x0000003d
|
||||
GPP_B14 (0xAF,0x26) 0x44000600 0x0000103e
|
||||
GPP_B15 (0xAF,0x27) 0x44000200 0x0000003f
|
||||
GPP_B16 (0xAF,0x28) 0x44000200 0x00000040
|
||||
GPP_B17 (0xAF,0x29) 0x44000200 0x00000041
|
||||
GPP_B18 (0xAF,0x2A) 0x44000600 0x00003042
|
||||
GPP_B19 (0xAF,0x2B) 0x44000200 0x00000043
|
||||
GPP_B20 (0xAF,0x2C) 0x44000200 0x00000044
|
||||
GPP_B21 (0xAF,0x2D) 0x44000200 0x00000045
|
||||
GPP_B22 (0xAF,0x2E) 0x44000700 0x00001046
|
||||
GPP_B23 (0xAF,0x2F) 0x44000200 0x00000047
|
||||
GPP_C0 (0xAE,0x00) 0x44000702 0x00000048
|
||||
GPP_C1 (0xAE,0x01) 0x44000702 0x00001049
|
||||
GPP_C2 (0xAE,0x02) 0x44000201 0x0000104a
|
||||
GPP_C3 (0xAE,0x03) 0x44000200 0x0000004b
|
||||
GPP_C4 (0xAE,0x04) 0x44000200 0x0000004c
|
||||
GPP_C5 (0xAE,0x05) 0x44000200 0x0000004d
|
||||
GPP_C6 (0xAE,0x06) 0xffffffff 0xffffffff
|
||||
GPP_C7 (0xAE,0x07) 0xffffffff 0xffffffff
|
||||
GPP_C8 (0xAE,0x08) 0x44000700 0x00000050
|
||||
GPP_C9 (0xAE,0x09) 0x44000700 0x00000051
|
||||
GPP_C10 (0xAE,0x0A) 0x44000700 0x00000052
|
||||
GPP_C11 (0xAE,0x0B) 0x44000700 0x00000053
|
||||
GPP_C12 (0xAE,0x0C) 0x44000700 0x00000054
|
||||
GPP_C13 (0xAE,0x0D) 0x82880102 0x00000055
|
||||
GPP_C14 (0xAE,0x0E) 0x44000700 0x00000056
|
||||
GPP_C15 (0xAE,0x0F) 0x44000700 0x00000057
|
||||
GPP_C16 (0xAE,0x10) 0x44000200 0x00000058
|
||||
GPP_C17 (0xAE,0x11) 0x44000200 0x00000059
|
||||
GPP_C18 (0xAE,0x12) 0x44000200 0x0000005a
|
||||
GPP_C19 (0xAE,0x13) 0x40880102 0x0000005b
|
||||
GPP_C20 (0xAE,0x14) 0x44000700 0x0000005c
|
||||
GPP_C21 (0xAE,0x15) 0x44000700 0x0000005d
|
||||
GPP_C22 (0xAE,0x16) 0x44000700 0x0000005e
|
||||
GPP_C23 (0xAE,0x17) 0x44000700 0x0000005f
|
||||
GPP_D0 (0xAE,0x18) 0x44000200 0x00000060
|
||||
GPP_D1 (0xAE,0x19) 0x44000200 0x00000061
|
||||
GPP_D2 (0xAE,0x1A) 0x44000200 0x00000062
|
||||
GPP_D3 (0xAE,0x1B) 0x44000200 0x00000063
|
||||
GPP_D4 (0xAE,0x1C) 0x44000200 0x00000064
|
||||
GPP_D5 (0xAE,0x1D) 0x44000700 0x00000065
|
||||
GPP_D6 (0xAE,0x1E) 0x44000700 0x00000066
|
||||
GPP_D7 (0xAE,0x1F) 0x44000700 0x00000067
|
||||
GPP_D8 (0xAE,0x20) 0x44000201 0x00000068
|
||||
GPP_D9 (0xAE,0x21) 0x44000200 0x00000069
|
||||
GPP_D10 (0xAE,0x22) 0x44000200 0x0000006a
|
||||
GPP_D11 (0xAE,0x23) 0x44000200 0x0000006b
|
||||
GPP_D12 (0xAE,0x24) 0x44000200 0x0000006c
|
||||
GPP_D13 (0xAE,0x25) 0x44000200 0x0000006d
|
||||
GPP_D14 (0xAE,0x26) 0x44000200 0x0000006e
|
||||
GPP_D15 (0xAE,0x27) 0x44000700 0x0000006f
|
||||
GPP_D16 (0xAE,0x28) 0x44000700 0x00000070
|
||||
GPP_D17 (0xAE,0x29) 0x44000700 0x00000071
|
||||
GPP_D18 (0xAE,0x2A) 0x44000700 0x00000072
|
||||
GPP_D19 (0xAE,0x2B) 0x44000700 0x00000073
|
||||
GPP_D20 (0xAE,0x2C) 0x44000700 0x00000074
|
||||
GPP_D21 (0xAE,0x2D) 0x44000100 0x00000075
|
||||
GPP_D22 (0xAE,0x2E) 0x44000700 0x00000076
|
||||
GPP_D23 (0xAE,0x2F) 0x44000700 0x00000077
|
||||
GPP_E0 (0xAE,0x30) 0x42100100 0x00001018
|
||||
GPP_E1 (0xAE,0x31) 0x44000702 0x00000019
|
||||
GPP_E2 (0xAE,0x32) 0x44000502 0x0000001a
|
||||
GPP_E3 (0xAE,0x33) 0x40000000 0x0000001b
|
||||
GPP_E4 (0xAE,0x34) 0x04000700 0x0000001c
|
||||
GPP_E5 (0xAE,0x35) 0x04000700 0x0000001d
|
||||
GPP_E6 (0xAE,0x36) 0x44000200 0x0000001e
|
||||
GPP_E7 (0xAE,0x37) 0x44000100 0x0000001f
|
||||
GPP_E8 (0xAE,0x38) 0x44000700 0x00000020
|
||||
GPP_E9 (0xAE,0x39) 0x44000200 0x00000021
|
||||
GPP_E10 (0xAE,0x3A) 0x44000200 0x00000022
|
||||
GPP_E11 (0xAE,0x3B) 0x44000200 0x00000023
|
||||
GPP_E12 (0xAE,0x3C) 0x44000200 0x00000024
|
||||
GPP_E13 (0xAE,0x3D) 0x44000700 0x00000025
|
||||
GPP_E14 (0xAE,0x3E) 0x44000700 0x00000026
|
||||
GPP_E15 (0xAE,0x3F) 0x42840102 0x00000027
|
||||
GPP_E16 (0xAE,0x40) 0x80880102 0x00000028
|
||||
GPP_E17 (0xAE,0x41) 0x44000702 0x00000029
|
||||
GPP_E18 (0xAE,0x42) 0x44000702 0x0000002a
|
||||
GPP_E19 (0xAE,0x43) 0x44000702 0x0000102b
|
||||
GPP_E20 (0xAE,0x44) 0x44000702 0x0000002c
|
||||
GPP_E21 (0xAE,0x45) 0x44000702 0x0000102d
|
||||
GPP_E22 (0xAE,0x46) 0x40100000 0x0000002e
|
||||
GPP_E23 (0xAE,0x47) 0x44000201 0x0000102f
|
||||
GPD0 (0xAD,0x00) 0x04000702 0x00000050
|
||||
GPD1 (0xAD,0x01) 0x04000702 0x00000051
|
||||
GPD2 (0xAD,0x02) 0x00880502 0x00000052
|
||||
GPD3 (0xAD,0x03) 0x04000702 0x00003053
|
||||
GPD4 (0xAD,0x04) 0x04000700 0x00000054
|
||||
GPD5 (0xAD,0x05) 0x04000700 0x00000055
|
||||
GPD6 (0xAD,0x06) 0x04000700 0x00000056
|
||||
GPD7 (0xAD,0x07) 0x04000301 0x00000057
|
||||
GPD8 (0xAD,0x08) 0x04000700 0x00000058
|
||||
GPD9 (0xAD,0x09) 0x04000700 0x00000059
|
||||
GPD10 (0xAD,0x0A) 0x04000700 0x0000005a
|
||||
GPD11 (0xAD,0x0B) 0x04000500 0x0000005b
|
||||
GPP_F0 (0xAC,0x00) 0x44000700 0x00000030
|
||||
GPP_F1 (0xAC,0x01) 0x44000700 0x00000031
|
||||
GPP_F2 (0xAC,0x02) 0x44000700 0x00000032
|
||||
GPP_F3 (0xAC,0x03) 0x44000700 0x00000033
|
||||
GPP_F4 (0xAC,0x04) 0x44000702 0x02000034
|
||||
GPP_F5 (0xAC,0x05) 0x44000702 0x02000035
|
||||
GPP_F6 (0xAC,0x06) 0x44000702 0x02000036
|
||||
GPP_F7 (0xAC,0x07) 0x44000702 0x02000037
|
||||
GPP_F8 (0xAC,0x08) 0x44000702 0x02000038
|
||||
GPP_F9 (0xAC,0x09) 0x44000702 0x02000039
|
||||
GPP_F10 (0xAC,0x0A) 0x44000b00 0x0200003a
|
||||
GPP_F11 (0xAC,0x0B) 0x44000b00 0x0200003b
|
||||
GPP_F12 (0xAC,0x0C) 0x44000700 0x0000003c
|
||||
GPP_F13 (0xAC,0x0D) 0x44000700 0x0000003d
|
||||
GPP_F14 (0xAC,0x0E) 0x44000700 0x0000003e
|
||||
GPP_F15 (0xAC,0x0F) 0x44000700 0x0000003f
|
||||
GPP_F16 (0xAC,0x10) 0x44000700 0x00000040
|
||||
GPP_F17 (0xAC,0x11) 0x44000700 0x00000041
|
||||
GPP_F18 (0xAC,0x12) 0x44000700 0x00000042
|
||||
GPP_F19 (0xAC,0x13) 0x44000700 0x00000043
|
||||
GPP_F20 (0xAC,0x14) 0x44000700 0x00000044
|
||||
GPP_F21 (0xAC,0x15) 0x44000700 0x00000045
|
||||
GPP_F22 (0xAC,0x16) 0x44000700 0x00000046
|
||||
GPP_F23 (0xAC,0x17) 0x40100100 0x00000047
|
||||
GPP_G0 (0xAC,0x18) 0x44000700 0x00000048
|
||||
GPP_G1 (0xAC,0x19) 0x44000102 0x00000049
|
||||
GPP_G2 (0xAC,0x1A) 0x44000700 0x0000004a
|
||||
GPP_G3 (0xAC,0x1B) 0x44000700 0x0000004b
|
||||
GPP_G4 (0xAC,0x1C) 0x44000700 0x0000004c
|
||||
GPP_G5 (0xAC,0x1D) 0x44000700 0x0000004d
|
||||
GPP_G6 (0xAC,0x1E) 0x44000700 0x0000004e
|
||||
GPP_G7 (0xAC,0x1F) 0x44000700 0x0000004f
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
@ -204,7 +205,7 @@ hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Kabylake HDMI
|
||||
vendor_id: 0x8086280b
|
||||
subsystem_id: 0x80860101
|
||||
subsystem_id: 0x15581303
|
||||
revision_id: 0x100000
|
||||
0x05: 0x18560010
|
||||
0x06: 0x18560010
|
||||
|
@ -84,6 +84,7 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="system76/kbl-u"
|
||||
@ -108,19 +109,16 @@ CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
CONFIG_ME_CLEANER_ARGS="-S"
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
|
||||
# CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
||||
CONFIG_TPM_INIT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_DIMM_MAX=2
|
||||
@ -135,23 +133,30 @@ CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1303
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_MAINBOARD_VERSION="galp2"
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_HEAP_SIZE=0x80000
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
||||
CONFIG_BOARD_SYSTEM76_GALP2=y
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1303
|
||||
CONFIG_CONSOLE_POST=y
|
||||
CONFIG_PXE_ROM_ID="10ec,8168"
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
@ -160,6 +165,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
@ -191,7 +197,7 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
|
||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
||||
@ -208,7 +214,6 @@ CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
|
||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
|
||||
# CONFIG_NHLT_MAX98357 is not set
|
||||
# CONFIG_NHLT_DA7219 is not set
|
||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
||||
CONFIG_IFD_CHIPSET="sklkbl"
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
@ -220,16 +225,11 @@ CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
# CONFIG_SOC_INTEL_COMMON_CANNONLAKE_BASE is not set
|
||||
# CONFIG_SOC_INTEL_COFFEELAKE is not set
|
||||
# CONFIG_SOC_INTEL_WHISKEYLAKE is not set
|
||||
# CONFIG_SOC_INTEL_COMETLAKE is not set
|
||||
# CONFIG_SOC_INTEL_CANNONLAKE_PCH_H is not set
|
||||
# CONFIG_NHLT_MAX98373 is not set
|
||||
CONFIG_MAX_ROOT_PORTS=24
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
CONFIG_SOC_INTEL_SKYLAKE=y
|
||||
CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
|
||||
CONFIG_SOC_INTEL_KABYLAKE=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
|
||||
CONFIG_MAINBOARD_USES_FSP2_0=y
|
||||
@ -257,11 +257,6 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
||||
# CONFIG_INTEL_CAR_NEM is not set
|
||||
# CONFIG_INTEL_CAR_CQOS is not set
|
||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
||||
|
||||
#
|
||||
# Multiple Processor (MP) Initialization Options
|
||||
#
|
||||
CONFIG_USE_COREBOOT_NATIVE_MP_INIT=y
|
||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||
@ -276,6 +271,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
# CONFIG_SKIP_GRAPHICS_ENABLING is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||
@ -293,6 +289,7 @@ CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||
@ -301,6 +298,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SA_PCIEX_LENGTH=0x4000000
|
||||
@ -308,6 +306,7 @@ CONFIG_PCIEX_LENGTH_64MB=y
|
||||
# CONFIG_SA_ENABLE_IMR is not set
|
||||
CONFIG_SA_ENABLE_DPR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
# CONFIG_USE_LEGACY_8254_TIMER is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
@ -329,13 +328,13 @@ CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
# CONFIG_ACPI_CONSOLE is not set
|
||||
# CONFIG_MMA is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_EC_PTS_WAK=y
|
||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
||||
@ -365,23 +364,23 @@ CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_NO_SMM is not set
|
||||
# CONFIG_SMM_ASEG is not set
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
@ -401,7 +400,6 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
@ -423,7 +421,8 @@ CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
@ -441,7 +440,11 @@ CONFIG_EC_BASE_PACKET=0x950
|
||||
#
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_CHECK_ME is not set
|
||||
# CONFIG_USE_ME_CLEANER is not set
|
||||
CONFIG_USE_ME_CLEANER=y
|
||||
|
||||
#
|
||||
# Please test the modified ME/TXE firmware and coreboot in two steps
|
||||
#
|
||||
# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
|
||||
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
|
||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||
@ -489,28 +492,11 @@ CONFIG_UDK_VERSION=2015
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_USE_ARCH_TIMER is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_PPC64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_PPC64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
CONFIG_ARCH_RISCV_M=y
|
||||
# CONFIG_ARCH_RISCV_S is not set
|
||||
# CONFIG_ARCH_RISCV_U is not set
|
||||
# CONFIG_ARCH_RISCV_RV64 is not set
|
||||
# CONFIG_ARCH_RISCV_RV32 is not set
|
||||
# CONFIG_ARCH_RISCV_PMP is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
# CONFIG_RISCV_USE_ARCH_TIMER is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@ -542,15 +528,13 @@ CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
# CONFIG_IDT_IN_EVERY_STAGE is not set
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
|
||||
#
|
||||
# Devices
|
||||
@ -559,12 +543,9 @@ CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_FSP_GOP=y
|
||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
||||
# CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
CONFIG_RUN_FSP_GOP=y
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
# CONFIG_PCI_OPTION_ROM_RUN_REALMODE is not set
|
||||
# CONFIG_PCI_OPTION_ROM_RUN_YABEL is not set
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
|
||||
#
|
||||
@ -582,8 +563,6 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
@ -597,7 +576,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
@ -618,8 +596,7 @@ CONFIG_SPI_FLASH_SMM=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
CONFIG_TPM_INIT=y
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
@ -631,6 +608,8 @@ CONFIG_TPM_INIT=y
|
||||
# CONFIG_HAVE_USBDEBUG is not set
|
||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
||||
# CONFIG_VPD is not set
|
||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
@ -646,13 +625,14 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
# CONFIG_PLATFORM_USES_FSP2_1 is not set
|
||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_FSP_CAR is not set
|
||||
# CONFIG_FSP_T_XIP is not set
|
||||
# CONFIG_FSP_USES_CB_STACK is not set
|
||||
@ -667,11 +647,12 @@ CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
@ -703,6 +684,12 @@ CONFIG_TPM2=y
|
||||
CONFIG_MAINBOARD_HAS_TPM2=y
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||
|
||||
#
|
||||
# Memory initialization
|
||||
#
|
||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
@ -742,12 +729,10 @@ CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
||||
@ -778,9 +763,6 @@ CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
# CONFIG_PAYLOAD_LINUX is not set
|
||||
CONFIG_PAYLOAD_TIANOCORE=y
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
# CONFIG_SEABIOS_STABLE is not set
|
||||
# CONFIG_SEABIOS_MASTER is not set
|
||||
# CONFIG_SEABIOS_REVISION is not set
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_TIANOCORE_STABLE=y
|
||||
@ -813,7 +795,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
#
|
||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
# CONFIG_DEBUG_SMM_RELOCATION is not set
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
@ -835,6 +816,7 @@ CONFIG_HAVE_DEBUG_GPIO=y
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
CONFIG_NO_EDID_FILL_FB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
@ -847,5 +829,4 @@ CONFIG_REG_SCRIPT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y
|
||||
|
BIN
models/galp2/uecflash.efi
(Stored with Git LFS)
Executable file
BIN
models/galp2/uecflash.efi
(Stored with Git LFS)
Executable file
Binary file not shown.
@ -7,7 +7,7 @@ https://system76.com/guides/galp3
|
||||
- [EC](./ec.rom)
|
||||
- Size: 128 KB
|
||||
- Model: N140WU
|
||||
- Version: 1.07.03
|
||||
- Version: 1.05.02
|
||||
- [FD](./fd.rom)
|
||||
- Size: 4 KB
|
||||
- HAP: true
|
||||
|
@ -1,209 +0,0 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x5914, Revision 0x08
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x5917, Revision 0x07
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x9D2F, Revision 0x21
|
||||
PCI Device: 0000:00:14.2: Class 0x00118000, Vendor 0x8086, Device 0x9D31, Revision 0x21
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x9D3A, Revision 0x21
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0x9D03, Revision 0x21
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x9D10, Revision 0xF1
|
||||
PCI Device: 0000:00:1c.4: Class 0x00060400, Vendor 0x8086, Device 0x9D14, Revision 0xF1
|
||||
PCI Device: 0000:00:1c.5: Class 0x00060400, Vendor 0x8086, Device 0x9D15, Revision 0xF1
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x9D4E, Revision 0x21
|
||||
PCI Device: 0000:00:1f.2: Class 0x00058000, Vendor 0x8086, Device 0x9D21, Revision 0x21
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x9D71, Revision 0x21
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x9D23, Revision 0x21
|
||||
PCI Device: 0000:3a:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x5287, Revision 0x01
|
||||
PCI Device: 0000:3a:00.1: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x12
|
||||
PCI Device: 0000:3b:00.0: Class 0x00028000, Vendor 0x8086, Device 0x24FB, Revision 0x10
|
||||
## GPIO ##
|
||||
100 Series PCH-LP
|
||||
GPP_A0 = 0x44000502 0x00000018
|
||||
GPP_A1 = 0x44000402 0x00000019
|
||||
GPP_A2 = 0x44000402 0x0000001a
|
||||
GPP_A3 = 0x44000402 0x0000001b
|
||||
GPP_A4 = 0x44000402 0x0000001c
|
||||
GPP_A5 = 0x44000600 0x0000001d
|
||||
GPP_A6 = 0x44000402 0x0000001e
|
||||
GPP_A7 = 0x44000102 0x0000001f
|
||||
GPP_A8 = 0x44000700 0x00000020
|
||||
GPP_A9 = 0x44000600 0x00000021
|
||||
GPP_A10 = 0x44000600 0x00001022
|
||||
GPP_A11 = 0x44000200 0x00000023
|
||||
GPP_A12 = 0x44000200 0x00000024
|
||||
GPP_A13 = 0x44000200 0x00000025
|
||||
GPP_A14 = 0x44000600 0x00000026
|
||||
GPP_A15 = 0x44000502 0x00000027
|
||||
GPP_A16 = 0x44000200 0x00000028
|
||||
GPP_A17 = 0x44000200 0x00000029
|
||||
GPP_A18 = 0x44000201 0x0000002a
|
||||
GPP_A19 = 0x44000603 0x0000002b
|
||||
GPP_A20 = 0x44000200 0x0000002c
|
||||
GPP_A21 = 0x84000200 0x0000102d
|
||||
GPP_A22 = 0x04000200 0x0000002e
|
||||
GPP_A23 = 0x04000200 0x0000002f
|
||||
GPP_B0 = 0x44000700 0x00000030
|
||||
GPP_B1 = 0x44000700 0x00000031
|
||||
GPP_B2 = 0x44000200 0x00000032
|
||||
GPP_B3 = 0x44000200 0x00000033
|
||||
GPP_B4 = 0x44000200 0x00000034
|
||||
GPP_B5 = 0x44000200 0x00000035
|
||||
GPP_B6 = 0x44000200 0x00000036
|
||||
GPP_B7 = 0x44000702 0x00000037
|
||||
GPP_B8 = 0x44000700 0x00000038
|
||||
GPP_B9 = 0x44000702 0x00000039
|
||||
GPP_B10 = 0x44000702 0x0000003a
|
||||
GPP_B11 = 0x44000700 0x0000003b
|
||||
GPP_B12 = 0x44000200 0x0000003c
|
||||
GPP_B13 = 0x44000700 0x0000003d
|
||||
GPP_B14 = 0x44000600 0x0000103e
|
||||
GPP_B15 = 0x44000200 0x0000003f
|
||||
GPP_B16 = 0x44000200 0x00000040
|
||||
GPP_B17 = 0x44000200 0x00000041
|
||||
GPP_B18 = 0x44000600 0x00003042
|
||||
GPP_B19 = 0x44000200 0x00000043
|
||||
GPP_B20 = 0x44000200 0x00000044
|
||||
GPP_B21 = 0x44000200 0x00000045
|
||||
GPP_B22 = 0x44000700 0x00001046
|
||||
GPP_B23 = 0x44000200 0x00000047
|
||||
GPP_C0 = 0x44000702 0x00000048
|
||||
GPP_C1 = 0x44000702 0x00001049
|
||||
GPP_C2 = 0x44000201 0x0000104a
|
||||
GPP_C3 = 0x44000200 0x0000004b
|
||||
GPP_C4 = 0x44000200 0x0000004c
|
||||
GPP_C5 = 0x44000200 0x0000004d
|
||||
GPP_C6 = 0xffffffff 0xffffffff
|
||||
GPP_C7 = 0xffffffff 0xffffffff
|
||||
GPP_C8 = 0x44000702 0x00000050
|
||||
GPP_C9 = 0x44000700 0x00000051
|
||||
GPP_C10 = 0x44000700 0x00000052
|
||||
GPP_C11 = 0x44000700 0x00000053
|
||||
GPP_C12 = 0x44000702 0x00000054
|
||||
GPP_C13 = 0x82880102 0x00000055
|
||||
GPP_C14 = 0x44000700 0x00000056
|
||||
GPP_C15 = 0x44000702 0x00000057
|
||||
GPP_C16 = 0x44000200 0x00000058
|
||||
GPP_C17 = 0x44000200 0x00000059
|
||||
GPP_C18 = 0x44000200 0x0000005a
|
||||
GPP_C19 = 0x40880102 0x0000005b
|
||||
GPP_C20 = 0x44000702 0x0000005c
|
||||
GPP_C21 = 0x44000700 0x0000005d
|
||||
GPP_C22 = 0x44000700 0x0000005e
|
||||
GPP_C23 = 0x44000702 0x0000005f
|
||||
GPP_D0 = 0x44000200 0x00000060
|
||||
GPP_D1 = 0x44000200 0x00000061
|
||||
GPP_D2 = 0x44000200 0x00000062
|
||||
GPP_D3 = 0x44000200 0x00000063
|
||||
GPP_D4 = 0x44000200 0x00000064
|
||||
GPP_D5 = 0x44000700 0x00000065
|
||||
GPP_D6 = 0x44000700 0x00000066
|
||||
GPP_D7 = 0x44000700 0x00000067
|
||||
GPP_D8 = 0x44000201 0x00000068
|
||||
GPP_D9 = 0x44000200 0x00000069
|
||||
GPP_D10 = 0x44000200 0x0000006a
|
||||
GPP_D11 = 0x44000200 0x0000006b
|
||||
GPP_D12 = 0x44000200 0x0000006c
|
||||
GPP_D13 = 0x44000200 0x0000006d
|
||||
GPP_D14 = 0x44000200 0x0000006e
|
||||
GPP_D15 = 0x44000700 0x0000006f
|
||||
GPP_D16 = 0x44000700 0x00000070
|
||||
GPP_D17 = 0x44000700 0x00000071
|
||||
GPP_D18 = 0x44000700 0x00000072
|
||||
GPP_D19 = 0x44000700 0x00000073
|
||||
GPP_D20 = 0x44000700 0x00000074
|
||||
GPP_D21 = 0x44000102 0x00000075
|
||||
GPP_D22 = 0x44000700 0x00000076
|
||||
GPP_D23 = 0x44000700 0x00000077
|
||||
GPP_E0 = 0x42100100 0x00001018
|
||||
GPP_E1 = 0x44000702 0x00000019
|
||||
GPP_E2 = 0x44000500 0x0000001a
|
||||
GPP_E3 = 0x40000000 0x0000001b
|
||||
GPP_E4 = 0x04000700 0x0000001c
|
||||
GPP_E5 = 0x04000700 0x0000001d
|
||||
GPP_E6 = 0x44000200 0x0000001e
|
||||
GPP_E7 = 0x44000100 0x0000001f
|
||||
GPP_E8 = 0x44000700 0x00000020
|
||||
GPP_E9 = 0x44000200 0x00000021
|
||||
GPP_E10 = 0x44000200 0x00000022
|
||||
GPP_E11 = 0x44000200 0x00000023
|
||||
GPP_E12 = 0x44000200 0x00000024
|
||||
GPP_E13 = 0x44000702 0x00000025
|
||||
GPP_E14 = 0x44000700 0x00000026
|
||||
GPP_E15 = 0x42840102 0x00000027
|
||||
GPP_E16 = 0x80880102 0x00000028
|
||||
GPP_E17 = 0x44000700 0x00000029
|
||||
GPP_E18 = 0x44000702 0x0000002a
|
||||
GPP_E19 = 0x44000702 0x0000102b
|
||||
GPP_E20 = 0x44000702 0x0000002c
|
||||
GPP_E21 = 0x44000702 0x0000102d
|
||||
GPP_E22 = 0x40100000 0x0000002e
|
||||
GPP_E23 = 0x44000201 0x0000102f
|
||||
GPD0 = 0x04000702 0x00000050
|
||||
GPD1 = 0x04000702 0x00000051
|
||||
GPD2 = 0x00880502 0x00000052
|
||||
GPD3 = 0x04000702 0x00003053
|
||||
GPD4 = 0x04000700 0x00000054
|
||||
GPD5 = 0x04000700 0x00000055
|
||||
GPD6 = 0x04000700 0x00000056
|
||||
GPD7 = 0x04000301 0x00000057
|
||||
GPD8 = 0x04000700 0x00000058
|
||||
GPD9 = 0x04000700 0x00000059
|
||||
GPD10 = 0x04000700 0x0000005a
|
||||
GPD11 = 0x04000500 0x0000005b
|
||||
GPP_F0 = 0x44000700 0x00000030
|
||||
GPP_F1 = 0x44000700 0x00000031
|
||||
GPP_F2 = 0x44000700 0x00000032
|
||||
GPP_F3 = 0x44000700 0x00000033
|
||||
GPP_F4 = 0x44000702 0x02000034
|
||||
GPP_F5 = 0x44000702 0x02000035
|
||||
GPP_F6 = 0x44000702 0x02000036
|
||||
GPP_F7 = 0x44000702 0x02000037
|
||||
GPP_F8 = 0x44000702 0x02000038
|
||||
GPP_F9 = 0x44000702 0x02000039
|
||||
GPP_F10 = 0x44000b02 0x0200003a
|
||||
GPP_F11 = 0x44000b02 0x0200003b
|
||||
GPP_F12 = 0x44000700 0x0000003c
|
||||
GPP_F13 = 0x44000700 0x0000003d
|
||||
GPP_F14 = 0x44000700 0x0000003e
|
||||
GPP_F15 = 0x44000700 0x0000003f
|
||||
GPP_F16 = 0x44000700 0x00000040
|
||||
GPP_F17 = 0x44000700 0x00000041
|
||||
GPP_F18 = 0x44000700 0x00000042
|
||||
GPP_F19 = 0x44000700 0x00000043
|
||||
GPP_F20 = 0x44000700 0x00000044
|
||||
GPP_F21 = 0x44000700 0x00000045
|
||||
GPP_F22 = 0x44000700 0x00000046
|
||||
GPP_F23 = 0x40100100 0x00000047
|
||||
GPP_G0 = 0x44000700 0x00000048
|
||||
GPP_G1 = 0x44000102 0x00000049
|
||||
GPP_G2 = 0x44000700 0x0000004a
|
||||
GPP_G3 = 0x44000700 0x0000004b
|
||||
GPP_G4 = 0x44000700 0x0000004c
|
||||
GPP_G5 = 0x44000702 0x0000004d
|
||||
GPP_G6 = 0x44000700 0x0000004e
|
||||
GPP_G7 = 0x44000700 0x0000004f
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC269VC
|
||||
vendor_id: 0x10ec0269
|
||||
subsystem_id: 0x15581414
|
||||
revision_id: 0x100202
|
||||
0x12: 0x90a60140
|
||||
0x14: 0x90170120
|
||||
0x15: 0x02211010
|
||||
0x17: 0x40000000
|
||||
0x18: 0x02a11030
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x40f4a205
|
||||
0x1e: 0x411111f0
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Kabylake HDMI
|
||||
vendor_id: 0x8086280b
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x05: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x07: 0x18560010
|
@ -26,7 +26,7 @@ CONFIG_USE_BLOBS=y
|
||||
# CONFIG_UBSAN is not set
|
||||
# CONFIG_NO_RELOCATABLE_RAMSTAGE is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
CONFIG_TSEG_STAGE_CACHE=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
|
||||
@ -50,7 +50,6 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_CAVIUM is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
@ -73,6 +72,7 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PORTWELL is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
@ -84,6 +84,7 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="system76/kbl-u"
|
||||
@ -108,19 +109,16 @@ CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
CONFIG_ME_CLEANER_ARGS="-S"
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
|
||||
# CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
||||
CONFIG_TPM_INIT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_DIMM_MAX=2
|
||||
@ -135,23 +133,30 @@ CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1413
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_MAINBOARD_VERSION="galp3-b"
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_HEAP_SIZE=0x80000
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
||||
CONFIG_BOARD_SYSTEM76_GALP3_B=y
|
||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1413
|
||||
CONFIG_CONSOLE_POST=y
|
||||
CONFIG_PXE_ROM_ID="10ec,8168"
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
@ -160,6 +165,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
@ -189,9 +195,10 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
|
||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
||||
@ -208,7 +215,6 @@ CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
|
||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
|
||||
# CONFIG_NHLT_MAX98357 is not set
|
||||
# CONFIG_NHLT_DA7219 is not set
|
||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
||||
CONFIG_IFD_CHIPSET="sklkbl"
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
@ -216,20 +222,15 @@ CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
|
||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=6
|
||||
# CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
# CONFIG_SOC_INTEL_COMMON_CANNONLAKE_BASE is not set
|
||||
# CONFIG_SOC_INTEL_COFFEELAKE is not set
|
||||
# CONFIG_SOC_INTEL_WHISKEYLAKE is not set
|
||||
# CONFIG_SOC_INTEL_COMETLAKE is not set
|
||||
# CONFIG_SOC_INTEL_CANNONLAKE_PCH_H is not set
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
# CONFIG_NHLT_MAX98373 is not set
|
||||
CONFIG_MAX_ROOT_PORTS=24
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
CONFIG_SOC_INTEL_SKYLAKE=y
|
||||
CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
|
||||
CONFIG_SOC_INTEL_KABYLAKE=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
|
||||
CONFIG_MAINBOARD_USES_FSP2_0=y
|
||||
@ -257,11 +258,6 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
||||
# CONFIG_INTEL_CAR_NEM is not set
|
||||
# CONFIG_INTEL_CAR_CQOS is not set
|
||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
||||
|
||||
#
|
||||
# Multiple Processor (MP) Initialization Options
|
||||
#
|
||||
CONFIG_USE_COREBOOT_NATIVE_MP_INIT=y
|
||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||
@ -276,6 +272,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
# CONFIG_SKIP_GRAPHICS_ENABLING is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||
@ -293,6 +290,7 @@ CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||
@ -301,13 +299,16 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SA_PCIEX_LENGTH=0x4000000
|
||||
CONFIG_PCIEX_LENGTH_64MB=y
|
||||
# CONFIG_SA_ENABLE_IMR is not set
|
||||
CONFIG_SA_ENABLE_DPR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
# CONFIG_USE_LEGACY_8254_TIMER is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
@ -329,13 +330,13 @@ CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
# CONFIG_ACPI_CONSOLE is not set
|
||||
# CONFIG_MMA is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_EC_PTS_WAK=y
|
||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
||||
@ -349,7 +350,6 @@ CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
@ -365,23 +365,24 @@ CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_NO_SMM is not set
|
||||
# CONFIG_SMM_ASEG is not set
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_X86_AMD_INIT_SIPI is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
@ -401,7 +402,6 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
@ -423,25 +423,26 @@ CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
||||
# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
# CONFIG_EC_GOOGLE_WILCO is not set
|
||||
CONFIG_EC_BASE_ACPI_DATA=0x930
|
||||
CONFIG_EC_BASE_ACPI_COMMAND=0x934
|
||||
CONFIG_EC_BASE_HOST_DATA=0x940
|
||||
CONFIG_EC_BASE_HOST_COMMAND=0x944
|
||||
CONFIG_EC_BASE_PACKET=0x950
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_CHECK_ME is not set
|
||||
# CONFIG_USE_ME_CLEANER is not set
|
||||
CONFIG_USE_ME_CLEANER=y
|
||||
|
||||
#
|
||||
# Please test the modified ME/TXE firmware and coreboot in two steps
|
||||
#
|
||||
# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
|
||||
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
|
||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||
@ -489,28 +490,6 @@ CONFIG_UDK_VERSION=2015
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_USE_ARCH_TIMER is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_PPC64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_PPC64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
CONFIG_ARCH_RISCV_M=y
|
||||
# CONFIG_ARCH_RISCV_S is not set
|
||||
# CONFIG_ARCH_RISCV_U is not set
|
||||
# CONFIG_ARCH_RISCV_RV64 is not set
|
||||
# CONFIG_ARCH_RISCV_RV32 is not set
|
||||
# CONFIG_ARCH_RISCV_PMP is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
# CONFIG_RISCV_USE_ARCH_TIMER is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@ -542,15 +521,13 @@ CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
# CONFIG_IDT_IN_EVERY_STAGE is not set
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
|
||||
#
|
||||
# Devices
|
||||
@ -559,12 +536,9 @@ CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_FSP_GOP=y
|
||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
||||
# CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
CONFIG_RUN_FSP_GOP=y
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
# CONFIG_PCI_OPTION_ROM_RUN_REALMODE is not set
|
||||
# CONFIG_PCI_OPTION_ROM_RUN_YABEL is not set
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
|
||||
#
|
||||
@ -582,8 +556,6 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
@ -592,12 +564,13 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
@ -618,8 +591,7 @@ CONFIG_SPI_FLASH_SMM=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
CONFIG_TPM_INIT=y
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
@ -631,6 +603,8 @@ CONFIG_TPM_INIT=y
|
||||
# CONFIG_HAVE_USBDEBUG is not set
|
||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
||||
# CONFIG_VPD is not set
|
||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
@ -646,13 +620,14 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
# CONFIG_PLATFORM_USES_FSP2_1 is not set
|
||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_FSP_CAR is not set
|
||||
# CONFIG_FSP_T_XIP is not set
|
||||
# CONFIG_FSP_USES_CB_STACK is not set
|
||||
@ -666,12 +641,13 @@ CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_HAVE_INTEL_PTT is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
@ -685,7 +661,6 @@ CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVERS_USB_ACPI is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
@ -703,6 +678,12 @@ CONFIG_TPM2=y
|
||||
CONFIG_MAINBOARD_HAS_TPM2=y
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||
|
||||
#
|
||||
# Memory initialization
|
||||
#
|
||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
@ -742,12 +723,10 @@ CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
||||
@ -778,9 +757,6 @@ CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
# CONFIG_PAYLOAD_LINUX is not set
|
||||
CONFIG_PAYLOAD_TIANOCORE=y
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
# CONFIG_SEABIOS_STABLE is not set
|
||||
# CONFIG_SEABIOS_MASTER is not set
|
||||
# CONFIG_SEABIOS_REVISION is not set
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_TIANOCORE_STABLE=y
|
||||
@ -813,7 +789,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
#
|
||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
# CONFIG_DEBUG_SMM_RELOCATION is not set
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
@ -835,6 +810,7 @@ CONFIG_HAVE_DEBUG_GPIO=y
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
CONFIG_NO_EDID_FILL_FB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
@ -847,5 +823,7 @@ CONFIG_REG_SCRIPT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_POSTCAR=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
BIN
models/galp3-b/ec.rom
(Stored with Git LFS)
BIN
models/galp3-b/ec.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/galp3-b/uecflash.efi
(Stored with Git LFS)
Normal file
BIN
models/galp3-b/uecflash.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
@ -4,206 +4,221 @@ PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x3EA0, Revisi
|
||||
PCI Device: 0000:00:12.0: Class 0x00118000, Vendor 0x8086, Device 0x9DF9, Revision 0x30
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x9DED, Revision 0x30
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x9DEF, Revision 0x30
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x9DF0, Revision 0x30
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0x9DD3, Revision 0x30
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x9DBC, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x9DB0, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.1: Class 0x00060400, Vendor 0x8086, Device 0x9DB1, Revision 0xF0
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x9D84, Revision 0x30
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x9DC8, Revision 0x30
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x9DA3, Revision 0x30
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x9DA4, Revision 0x30
|
||||
PCI Device: 0000:01:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:02:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:02:01.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:02:02.0: Class 0x00060400, Vendor 0x8086, Device 0x15E7, Revision 0x06
|
||||
PCI Device: 0000:03:00.0: Class 0x00088000, Vendor 0x8086, Device 0x15E8, Revision 0x06
|
||||
PCI Device: 0000:04:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15D3, Revision 0x02
|
||||
PCI Device: 0000:05:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15D3, Revision 0x02
|
||||
PCI Device: 0000:05:01.0: Class 0x00060400, Vendor 0x8086, Device 0x15D3, Revision 0x02
|
||||
PCI Device: 0000:05:02.0: Class 0x00060400, Vendor 0x8086, Device 0x15D3, Revision 0x02
|
||||
PCI Device: 0000:05:04.0: Class 0x00060400, Vendor 0x8086, Device 0x15D3, Revision 0x02
|
||||
PCI Device: 0000:06:00.0: Class 0x000C0330, Vendor 0x1B73, Device 0x1100, Revision 0x10
|
||||
PCI Device: 0000:07:00.0: Class 0x000C0330, Vendor 0x1B21, Device 0x1142, Revision 0x00
|
||||
PCI Device: 0000:08:00.0: Class 0x00020000, Vendor 0x8086, Device 0x1533, Revision 0x03
|
||||
PCI Device: 0000:38:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x15E9, Revision 0x06
|
||||
PCI Device: 0000:39:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x5287, Revision 0x01
|
||||
PCI Device: 0000:39:00.1: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x12
|
||||
PCI Device: 0000:3a:00.0: Class 0x00028000, Vendor 0x8086, Device 0x24FD, Revision 0x78
|
||||
## GPIO ##
|
||||
300 Series PCH
|
||||
GPP_A0 = 0x44000702 0x00000018 0x00000010 0x00000000
|
||||
GPP_A1 = 0x44000702 0x00003c19 0x00000010 0x00000000
|
||||
GPP_A2 = 0x44000702 0x00003c1a 0x00000010 0x00000000
|
||||
GPP_A3 = 0x44000702 0x00003c1b 0x00000010 0x00000000
|
||||
GPP_A4 = 0x44000702 0x00003c1c 0x00000010 0x00000000
|
||||
GPP_A5 = 0x44000700 0x0000001d 0x00000010 0x00000000
|
||||
GPP_A6 = 0x44000702 0x0000001e 0x00000010 0x00000000
|
||||
GPP_A7 = 0x44000102 0x0000001f 0x00000010 0x00000000
|
||||
GPP_A8 = 0x44000700 0x00000020 0x00000010 0x00000000
|
||||
GPP_A9 = 0x44000700 0x00001021 0x00000010 0x00000000
|
||||
GPP_A10 = 0x44000500 0x00001022 0x00000010 0x00000000
|
||||
GPP_A11 = 0x44000102 0x00003023 0x00000010 0x00000000
|
||||
GPP_A12 = 0x44000102 0x00000024 0x00000010 0x00000000
|
||||
GPP_A13 = 0x44000700 0x00000025 0x00000010 0x00000000
|
||||
GPP_A14 = 0x44000700 0x00000026 0x00000010 0x00000000
|
||||
GPP_A15 = 0x44000702 0x00003027 0x00000010 0x00000000
|
||||
GPP_A16 = 0x44000102 0x00000028 0x00000010 0x00000000
|
||||
GPP_A17 = 0x44000100 0x00000029 0x00000010 0x00000000
|
||||
GPP_A18 = 0x44000102 0x0000002a 0x00000010 0x00000000
|
||||
GPP_A19 = 0x44000102 0x0000002b 0x00000010 0x00000000
|
||||
GPP_A20 = 0x44000102 0x0000002c 0x00000010 0x00000000
|
||||
GPP_A21 = 0x44000102 0x0000002d 0x00000010 0x00000000
|
||||
GPP_A22 = 0x44000200 0x0000002e 0x00000010 0x00000000
|
||||
GPP_A23 = 0x44000102 0x0000002f 0x00000010 0x00000000
|
||||
GPP_B0 = 0x44000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_B1 = 0x44000102 0x00000030 0x00000010 0x00000000
|
||||
GPP_B2 = 0x44000102 0x00000031 0x00000010 0x00000000
|
||||
GPP_B3 = 0x44000102 0x00000032 0x00000010 0x00000000
|
||||
GPP_B4 = 0x44000102 0x00000033 0x00000010 0x00000000
|
||||
GPP_B5 = 0x44000102 0x00000034 0x00000010 0x00000000
|
||||
GPP_B6 = 0x44000102 0x00000035 0x00000010 0x00000000
|
||||
GPP_B7 = 0x44000102 0x00000036 0x00000010 0x00000000
|
||||
GPP_B8 = 0x44000702 0x00000037 0x00000010 0x00000000
|
||||
GPP_B9 = 0x44000700 0x00000038 0x00000010 0x00000000
|
||||
GPP_B10 = 0x44000702 0x00000039 0x00000010 0x00000000
|
||||
GPP_B11 = 0x44000702 0x0000003a 0x00000010 0x00000000
|
||||
GPP_B12 = 0x44000102 0x0000003b 0x00000010 0x00000000
|
||||
GPP_B13 = 0x44000700 0x0000003c 0x00000010 0x00000000
|
||||
GPP_B14 = 0x44000700 0x0000003d 0x00000010 0x00000000
|
||||
GPP_B15 = 0x44000600 0x0000003e 0x00000010 0x00000000
|
||||
GPP_B16 = 0x44000102 0x0000003f 0x00000010 0x00000000
|
||||
GPP_B17 = 0x44000102 0x00000040 0x00000010 0x00000000
|
||||
GPP_B18 = 0x44000100 0x00000041 0x00000010 0x00000000
|
||||
GPP_B19 = 0x44000102 0x00000042 0x00000010 0x00000000
|
||||
GPP_B20 = 0x44000102 0x00000043 0x00000010 0x00000000
|
||||
GPP_B21 = 0x44000102 0x00000044 0x00000010 0x00000000
|
||||
GPP_B22 = 0x44000102 0x00000045 0x00000010 0x00000000
|
||||
GPP_B23 = 0x44000102 0x00000046 0x00000010 0x00000000
|
||||
GPP_G0 = 0x44000102 0x00000047 0x00000010 0x00000000
|
||||
GPP_G1 = 0x44000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_G2 = 0x44000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_G3 = 0x44000102 0x0000006c 0x00000010 0x00000000
|
||||
GPP_G4 = 0x44000102 0x0000006d 0x00000010 0x00000000
|
||||
GPP_G5 = 0x44000102 0x0000006e 0x00000010 0x00000000
|
||||
GPP_G6 = 0x44000102 0x0000006f 0x00000010 0x00000000
|
||||
GPP_G7 = 0x44000102 0x00000070 0x00000010 0x00000000
|
||||
GPP_D0 = 0x44000102 0x00000060 0x00000010 0x00000000
|
||||
GPP_D1 = 0x44000102 0x00000061 0x00000010 0x00000000
|
||||
GPP_D2 = 0x44000102 0x00000062 0x00000010 0x00000000
|
||||
GPP_D3 = 0x44000102 0x00000063 0x00000010 0x00000000
|
||||
GPP_D4 = 0x44000102 0x00000064 0x00000010 0x00000000
|
||||
GPP_D5 = 0x44000102 0x00000065 0x00000010 0x00000000
|
||||
GPP_D6 = 0x44000102 0x00000066 0x00000010 0x00000000
|
||||
GPP_D7 = 0x44000102 0x00000067 0x00000010 0x00000000
|
||||
GPP_D8 = 0x44000201 0x00000068 0x00000010 0x00000000
|
||||
GPP_D9 = 0x40880102 0x00000069 0x00000010 0x00000000
|
||||
GPP_D10 = 0x44000102 0x0000006a 0x00000010 0x00000000
|
||||
GPP_D11 = 0x40880102 0x0000306b 0x00000010 0x00000000
|
||||
GPP_D12 = 0x44000102 0x0000006c 0x00000810 0x00000000
|
||||
GPP_D13 = 0x44000102 0x0000006d 0x00000010 0x00000000
|
||||
GPP_D14 = 0x44000102 0x0000006e 0x00000010 0x00000000
|
||||
GPP_D15 = 0x44000102 0x0000006f 0x00000010 0x00000000
|
||||
GPP_D16 = 0x04000201 0x00000070 0x00000010 0x00000000
|
||||
GPP_D17 = 0x44000102 0x00000071 0x00000010 0x00000000
|
||||
GPP_D18 = 0x44000102 0x00000072 0x00000010 0x00000000
|
||||
GPP_D19 = 0x44000500 0x00000073 0x00000010 0x00000000
|
||||
GPP_D20 = 0x44000500 0x00000074 0x00000010 0x00000000
|
||||
GPP_D21 = 0x44000102 0x00000075 0x00000010 0x00000000
|
||||
GPP_D22 = 0x44000102 0x00000076 0x00000010 0x00000000
|
||||
GPP_D23 = 0x44000102 0x00000077 0x00000010 0x00000000
|
||||
GPP_F0 = 0x44000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_F1 = 0x44000700 0x00000030 0x00000010 0x00000000
|
||||
GPP_F2 = 0x44000100 0x00000031 0x00000010 0x00000000
|
||||
GPP_F3 = 0x44000100 0x00000032 0x00000010 0x00000000
|
||||
GPP_F4 = 0x44000100 0x00000033 0x00000010 0x00000000
|
||||
GPP_F5 = 0x44000700 0x00000034 0x00000010 0x00000000
|
||||
GPP_F6 = 0x44000702 0x00003035 0x00000010 0x00000000
|
||||
GPP_F7 = 0x44000700 0x00000036 0x00000010 0x00000000
|
||||
GPP_F8 = 0x44000702 0x00003037 0x00000010 0x00000000
|
||||
GPP_F9 = 0x44000700 0x00000038 0x00000010 0x00000000
|
||||
GPP_F10 = 0x44000700 0x00000039 0x00000010 0x00000000
|
||||
GPP_F11 = 0x44000100 0x0000003a 0x00000010 0x00000000
|
||||
GPP_F12 = 0x44000100 0x0000003b 0x00000010 0x00000000
|
||||
GPP_F13 = 0x44000100 0x0000003c 0x00000010 0x00000000
|
||||
GPP_F14 = 0x44000100 0x0000003d 0x00000010 0x00000000
|
||||
GPP_F15 = 0x44000100 0x0000003e 0x00000010 0x00000000
|
||||
GPP_F16 = 0x44000100 0x0000003f 0x00000010 0x00000000
|
||||
GPP_F17 = 0x44000100 0x00000040 0x00000010 0x00000000
|
||||
GPP_F18 = 0x44000100 0x00000041 0x00000010 0x00000000
|
||||
GPP_F19 = 0x44000100 0x00000042 0x00000010 0x00000000
|
||||
GPP_F20 = 0x44000100 0x00000043 0x00000010 0x00000000
|
||||
GPP_F21 = 0x44000100 0x00000044 0x00000010 0x00000000
|
||||
GPP_F22 = 0x44000100 0x00000045 0x00000010 0x00000000
|
||||
GPP_F23 = 0x44000100 0x00000046 0x00000010 0x00000000
|
||||
GPP_H0 = 0x44000100 0x00001047 0x00000010 0x00000000
|
||||
GPP_H1 = 0x44000102 0x00000048 0x00000010 0x00000000
|
||||
GPP_H2 = 0x44000f00 0x00000049 0x00000010 0x00000000
|
||||
GPP_H3 = 0x44000f00 0x0000004a 0x00000010 0x00000000
|
||||
GPP_H4 = 0x44000102 0x0000004b 0x00000010 0x00000000
|
||||
GPP_H5 = 0x44000102 0x0000004c 0x00000010 0x00000000
|
||||
GPP_H6 = 0x44000102 0x0000004d 0x00000010 0x00000000
|
||||
GPP_H7 = 0x44000102 0x0000004e 0x00000010 0x00000000
|
||||
GPP_H8 = 0x44000102 0x0000004f 0x00000010 0x00000000
|
||||
GPP_H9 = 0x44000102 0x00000050 0x00000010 0x00000000
|
||||
GPP_H10 = 0x44000102 0x00000051 0x00000010 0x00000000
|
||||
GPP_H11 = 0x44000102 0x00000052 0x00000010 0x00000000
|
||||
GPP_H12 = 0x44000102 0x00000053 0x00000010 0x00000000
|
||||
GPP_H13 = 0x44000102 0x00000054 0x00000010 0x00000000
|
||||
GPP_H14 = 0x44000102 0x00000055 0x00000010 0x00000000
|
||||
GPP_H15 = 0x44000102 0x00000056 0x00000010 0x00000000
|
||||
GPP_H16 = 0x44000102 0x00000057 0x00000010 0x00000000
|
||||
GPP_H17 = 0x44000102 0x00000058 0x00000010 0x00000000
|
||||
GPP_H18 = 0x44000102 0x00000059 0x00000010 0x00000000
|
||||
GPP_H19 = 0x44000500 0x0000005a 0x00000010 0x00000000
|
||||
GPP_H20 = 0x44000102 0x0000005b 0x00000010 0x00000000
|
||||
GPP_H21 = 0x44000102 0x0000005c 0x00000010 0x00000000
|
||||
GPP_H22 = 0x44000102 0x0000005d 0x00000810 0x00000000
|
||||
GPP_H23 = 0x84000201 0x0000005e 0x00000010 0x00000000
|
||||
GPD0 = 0x04000102 0x00000060 0x00000010 0x00000000
|
||||
GPD1 = 0x44000700 0x00003c61 0x00000010 0x00000000
|
||||
GPD2 = 0x04000102 0x00003c62 0x00000010 0x00000000
|
||||
GPD3 = 0x44000702 0x00003063 0x00000010 0x00000000
|
||||
GPD4 = 0x44000600 0x00000064 0x00000010 0x00000000
|
||||
GPD5 = 0x44000600 0x00000065 0x00000010 0x00000000
|
||||
GPD6 = 0x44000600 0x00000066 0x00000010 0x00000000
|
||||
GPD7 = 0x04000102 0x00000067 0x00000810 0x00000000
|
||||
GPD8 = 0x44000700 0x00000068 0x00000010 0x00000000
|
||||
GPD9 = 0x04000102 0x00000069 0x00000010 0x00000000
|
||||
GPD10 = 0x44000600 0x0000006a 0x00000010 0x00000000
|
||||
GPD11 = 0x04000102 0x0000006b 0x00000010 0x00000000
|
||||
GPP_C0 = 0x44000702 0x00000048 0x00000010 0x00000000
|
||||
GPP_C1 = 0x44000702 0x00000049 0x00000010 0x00000000
|
||||
GPP_C2 = 0x44000102 0x0000004a 0x00000010 0x00000000
|
||||
GPP_C3 = 0x44000102 0x0000004b 0x00000010 0x00000000
|
||||
GPP_C4 = 0x44000102 0x0000004c 0x00000010 0x00000000
|
||||
GPP_C5 = 0x44000100 0x0000004d 0x00000010 0x00000000
|
||||
GPP_C6 = 0x44000102 0x0000004e 0x00000010 0x00000000
|
||||
GPP_C7 = 0x44000102 0x0000004f 0x00000010 0x00000000
|
||||
GPP_C8 = 0x44000102 0x00000050 0x00000010 0x00000000
|
||||
GPP_C9 = 0x82880102 0x00003051 0x00000010 0x00000000
|
||||
GPP_C10 = 0x84000200 0x00000052 0x00000010 0x00000000
|
||||
GPP_C11 = 0x44000102 0x00000053 0x00000010 0x00000000
|
||||
GPP_C12 = 0x84000201 0x00000054 0x00000010 0x00000000
|
||||
GPP_C13 = 0x84000201 0x00000055 0x00000010 0x00000000
|
||||
GPP_C14 = 0x84000200 0x00000056 0x00000010 0x00000000
|
||||
GPP_C15 = 0x84000201 0x00003057 0x00000010 0x00000000
|
||||
GPP_C16 = 0x44000102 0x00000058 0x00000010 0x00000000
|
||||
GPP_C17 = 0x44000102 0x00000059 0x00000010 0x00000000
|
||||
GPP_C18 = 0x44000102 0x0000005a 0x00000010 0x00000000
|
||||
GPP_C19 = 0x44000102 0x0000005b 0x00000010 0x00000000
|
||||
GPP_C20 = 0x44000102 0x0000005c 0x00000010 0x00000000
|
||||
GPP_C21 = 0x44000102 0x0000005d 0x00000010 0x00000000
|
||||
GPP_C22 = 0x44000102 0x0000005e 0x00000010 0x00000000
|
||||
GPP_C23 = 0x44000102 0x0000005f 0x00000010 0x00000000
|
||||
GPP_E0 = 0x44000102 0x00000018 0x00000010 0x00000000
|
||||
GPP_E1 = 0x44000102 0x00000019 0x00000010 0x00000000
|
||||
GPP_E2 = 0x44000700 0x0000301a 0x00000010 0x00000000
|
||||
GPP_E3 = 0x44000102 0x0000001b 0x00000010 0x00000000
|
||||
GPP_E4 = 0x44000102 0x0000001c 0x00000010 0x00000000
|
||||
GPP_E5 = 0x44000102 0x0000001d 0x00000010 0x00000000
|
||||
GPP_E6 = 0x44000700 0x0000001e 0x00000010 0x00000000
|
||||
GPP_E7 = 0x44000102 0x0000001f 0x00000010 0x00000000
|
||||
GPP_E8 = 0x44000700 0x00000020 0x00000010 0x00000000
|
||||
GPP_E9 = 0x44000102 0x00000021 0x00000810 0x00000000
|
||||
GPP_E10 = 0x44000102 0x00000022 0x00000810 0x00000000
|
||||
GPP_E11 = 0x44000102 0x00000023 0x00000810 0x00000000
|
||||
GPP_E12 = 0x44000102 0x00000024 0x00000010 0x00000000
|
||||
GPP_E13 = 0x44000700 0x00000025 0x00000010 0x00000000
|
||||
GPP_E14 = 0x44000700 0x00000026 0x00000010 0x00000000
|
||||
GPP_E15 = 0x44000102 0x00000027 0x00000010 0x00000000
|
||||
GPP_E16 = 0x80880102 0x00000028 0x00000010 0x00000000
|
||||
GPP_E17 = 0x44000702 0x00000029 0x00000010 0x00000000
|
||||
GPP_E18 = 0x44000702 0x0000002a 0x00000010 0x00000000
|
||||
GPP_E19 = 0x44000602 0x0000002b 0x00000810 0x00000000
|
||||
GPP_E20 = 0x44000702 0x0000002c 0x00000010 0x00000000
|
||||
GPP_E21 = 0x44000602 0x0000002d 0x00000810 0x00000000
|
||||
GPP_E22 = 0x44000102 0x0000002e 0x00000010 0x00000000
|
||||
GPP_E23 = 0x44000102 0x0000002f 0x00000010 0x00000000
|
||||
300 Series PCH-LP
|
||||
GPP_A0 (0x6E,0x00) 0x44000702 0x00000018 0x00000010 0x00000000
|
||||
GPP_A1 (0x6E,0x02) 0x44000702 0x00003c19 0x00000010 0x00000000
|
||||
GPP_A2 (0x6E,0x04) 0x44000702 0x00003c1a 0x00000010 0x00000000
|
||||
GPP_A3 (0x6E,0x06) 0x44000702 0x00003c1b 0x00000010 0x00000000
|
||||
GPP_A4 (0x6E,0x08) 0x44000702 0x00003c1c 0x00000010 0x00000000
|
||||
GPP_A5 (0x6E,0x0A) 0x44000700 0x0000001d 0x00000010 0x00000000
|
||||
GPP_A6 (0x6E,0x0C) 0x44000702 0x0000001e 0x00000010 0x00000000
|
||||
GPP_A7 (0x6E,0x0E) 0x44000102 0x0000001f 0x00000010 0x00000000
|
||||
GPP_A8 (0x6E,0x10) 0x44000700 0x00000020 0x00000010 0x00000000
|
||||
GPP_A9 (0x6E,0x12) 0x44000700 0x00001021 0x00000010 0x00000000
|
||||
GPP_A10 (0x6E,0x14) 0x44000500 0x00001022 0x00000010 0x00000000
|
||||
GPP_A11 (0x6E,0x16) 0x44000102 0x00003023 0x00000010 0x00000000
|
||||
GPP_A12 (0x6E,0x18) 0x44000102 0x00000024 0x00000010 0x00000000
|
||||
GPP_A13 (0x6E,0x1A) 0x44000700 0x00000025 0x00000010 0x00000000
|
||||
GPP_A14 (0x6E,0x1C) 0x44000700 0x00000026 0x00000010 0x00000000
|
||||
GPP_A15 (0x6E,0x1E) 0x44000702 0x00003027 0x00000010 0x00000000
|
||||
GPP_A16 (0x6E,0x20) 0x44000102 0x00000028 0x00000010 0x00000000
|
||||
GPP_A17 (0x6E,0x22) 0x44000100 0x00000029 0x00000010 0x00000000
|
||||
GPP_A18 (0x6E,0x24) 0x44000102 0x0000002a 0x00000010 0x00000000
|
||||
GPP_A19 (0x6E,0x26) 0x44000102 0x0000002b 0x00000010 0x00000000
|
||||
GPP_A20 (0x6E,0x28) 0x44000102 0x0000002c 0x00000010 0x00000000
|
||||
GPP_A21 (0x6E,0x2A) 0x44000102 0x0000002d 0x00000010 0x00000000
|
||||
GPP_A22 (0x6E,0x2C) 0x44000200 0x0000002e 0x00000010 0x00000000
|
||||
GPP_A23 (0x6E,0x2E) 0x44000102 0x0000002f 0x00000010 0x00000000
|
||||
GPP_B0 (0x6E,0x32) 0x44000102 0x00000030 0x00000010 0x00000000
|
||||
GPP_B1 (0x6E,0x34) 0x44000102 0x00000031 0x00000010 0x00000000
|
||||
GPP_B2 (0x6E,0x36) 0x44000102 0x00000032 0x00000010 0x00000000
|
||||
GPP_B3 (0x6E,0x38) 0x44000102 0x00000033 0x00000010 0x00000000
|
||||
GPP_B4 (0x6E,0x3A) 0x44000102 0x00000034 0x00000010 0x00000000
|
||||
GPP_B5 (0x6E,0x3C) 0x44000102 0x00000035 0x00000010 0x00000000
|
||||
GPP_B6 (0x6E,0x3E) 0x44000102 0x00000036 0x00000010 0x00000000
|
||||
GPP_B7 (0x6E,0x40) 0x44000702 0x00000037 0x00000010 0x00000000
|
||||
GPP_B8 (0x6E,0x42) 0x44000702 0x00000038 0x00000010 0x00000000
|
||||
GPP_B9 (0x6E,0x44) 0x44000700 0x00000039 0x00000010 0x00000000
|
||||
GPP_B10 (0x6E,0x46) 0x44000702 0x0000003a 0x00000010 0x00000000
|
||||
GPP_B11 (0x6E,0x48) 0x44000102 0x0000003b 0x00000010 0x00000000
|
||||
GPP_B12 (0x6E,0x4A) 0x44000700 0x0000003c 0x00000010 0x00000000
|
||||
GPP_B13 (0x6E,0x4C) 0x44000700 0x0000003d 0x00000010 0x00000000
|
||||
GPP_B14 (0x6E,0x4E) 0x44000600 0x0000003e 0x00000010 0x00000000
|
||||
GPP_B15 (0x6E,0x50) 0x44000102 0x0000003f 0x00000010 0x00000000
|
||||
GPP_B16 (0x6E,0x52) 0x44000102 0x00000040 0x00000010 0x00000000
|
||||
GPP_B17 (0x6E,0x54) 0x44000100 0x00000041 0x00000010 0x00000000
|
||||
GPP_B18 (0x6E,0x56) 0x44000102 0x00000042 0x00000010 0x00000000
|
||||
GPP_B19 (0x6E,0x58) 0x44000102 0x00000043 0x00000010 0x00000000
|
||||
GPP_B20 (0x6E,0x5A) 0x44000102 0x00000044 0x00000010 0x00000000
|
||||
GPP_B21 (0x6E,0x5C) 0x44000102 0x00000045 0x00000010 0x00000000
|
||||
GPP_B22 (0x6E,0x5E) 0x44000102 0x00000046 0x00000010 0x00000000
|
||||
GPP_B23 (0x6E,0x60) 0x44000102 0x00000047 0x00000010 0x00000000
|
||||
GPP_G0 (0x6E,0x66) 0x44000102 0x0000006c 0x00000010 0x00000000
|
||||
GPP_G1 (0x6E,0x68) 0x44000102 0x0000006d 0x00000010 0x00000000
|
||||
GPP_G2 (0x6E,0x6A) 0x44000102 0x0000006e 0x00000010 0x00000000
|
||||
GPP_G3 (0x6E,0x6C) 0x44000102 0x0000006f 0x00000010 0x00000000
|
||||
GPP_G4 (0x6E,0x6E) 0x44000102 0x00000070 0x00000010 0x00000000
|
||||
GPP_G5 (0x6E,0x70) 0x44000102 0x00000071 0x00000010 0x00000000
|
||||
GPP_G6 (0x6E,0x72) 0x44000102 0x00000072 0x00000010 0x00000000
|
||||
GPP_G7 (0x6E,0x74) 0x44000102 0x00000073 0x00000010 0x00000000
|
||||
GPP_D0 (0x6D,0x00) 0x44000102 0x00000060 0x00000010 0x00000000
|
||||
GPP_D1 (0x6D,0x02) 0x44000102 0x00000061 0x00000010 0x00000000
|
||||
GPP_D2 (0x6D,0x04) 0x44000102 0x00000062 0x00000010 0x00000000
|
||||
GPP_D3 (0x6D,0x06) 0x44000102 0x00000063 0x00000010 0x00000000
|
||||
GPP_D4 (0x6D,0x08) 0x44000102 0x00000064 0x00000010 0x00000000
|
||||
GPP_D5 (0x6D,0x0A) 0x44000102 0x00000065 0x00000010 0x00000000
|
||||
GPP_D6 (0x6D,0x0C) 0x44000102 0x00000066 0x00000010 0x00000000
|
||||
GPP_D7 (0x6D,0x0E) 0x44000102 0x00000067 0x00000010 0x00000000
|
||||
GPP_D8 (0x6D,0x10) 0x44000201 0x00000068 0x00000010 0x00000000
|
||||
GPP_D9 (0x6D,0x12) 0x40880102 0x00000069 0x00000010 0x00000000
|
||||
GPP_D10 (0x6D,0x14) 0x44000102 0x0000006a 0x00000010 0x00000000
|
||||
GPP_D11 (0x6D,0x16) 0x40880102 0x0000306b 0x00000010 0x00000000
|
||||
GPP_D12 (0x6D,0x18) 0x44000102 0x0000006c 0x00000810 0x00000000
|
||||
GPP_D13 (0x6D,0x1A) 0x44000102 0x0000006d 0x00000010 0x00000000
|
||||
GPP_D14 (0x6D,0x1C) 0x44000102 0x0000006e 0x00000010 0x00000000
|
||||
GPP_D15 (0x6D,0x1E) 0x44000102 0x0000006f 0x00000010 0x00000000
|
||||
GPP_D16 (0x6D,0x20) 0x04000201 0x00000070 0x00000010 0x00000000
|
||||
GPP_D17 (0x6D,0x22) 0x44000102 0x00000071 0x00000010 0x00000000
|
||||
GPP_D18 (0x6D,0x24) 0x44000102 0x00000072 0x00000010 0x00000000
|
||||
GPP_D19 (0x6D,0x26) 0x44000500 0x00000073 0x00000010 0x00000000
|
||||
GPP_D20 (0x6D,0x28) 0x44000500 0x00000074 0x00000010 0x00000000
|
||||
GPP_D21 (0x6D,0x2A) 0x44000102 0x00000075 0x00000010 0x00000000
|
||||
GPP_D22 (0x6D,0x2C) 0x44000102 0x00000076 0x00000010 0x00000000
|
||||
GPP_D23 (0x6D,0x2E) 0x44000102 0x00000077 0x00000010 0x00000000
|
||||
GPP_F0 (0x6D,0x32) 0x44000700 0x00000030 0x00000010 0x00000000
|
||||
GPP_F1 (0x6D,0x34) 0x44000100 0x00000031 0x00000010 0x00000000
|
||||
GPP_F2 (0x6D,0x36) 0x44000100 0x00000032 0x00000010 0x00000000
|
||||
GPP_F3 (0x6D,0x38) 0x44000100 0x00000033 0x00000010 0x00000000
|
||||
GPP_F4 (0x6D,0x3A) 0x44000700 0x00000034 0x00000010 0x00000000
|
||||
GPP_F5 (0x6D,0x3C) 0x44000702 0x00003035 0x00000010 0x00000000
|
||||
GPP_F6 (0x6D,0x3E) 0x44000700 0x00000036 0x00000810 0x00000000
|
||||
GPP_F7 (0x6D,0x40) 0x44000702 0x00003037 0x00000010 0x00000000
|
||||
GPP_F8 (0x6D,0x42) 0x44000700 0x00000038 0x00000010 0x00000000
|
||||
GPP_F9 (0x6D,0x44) 0x44000700 0x00000039 0x00000010 0x00000000
|
||||
GPP_F10 (0x6D,0x46) 0x44000100 0x0000003a 0x00000010 0x00000000
|
||||
GPP_F11 (0x6D,0x48) 0x44000100 0x0000003b 0x00000010 0x00000000
|
||||
GPP_F12 (0x6D,0x4A) 0x44000100 0x0000003c 0x00000010 0x00000000
|
||||
GPP_F13 (0x6D,0x4C) 0x44000100 0x0000003d 0x00000010 0x00000000
|
||||
GPP_F14 (0x6D,0x4E) 0x44000100 0x0000003e 0x00000010 0x00000000
|
||||
GPP_F15 (0x6D,0x50) 0x44000100 0x0000003f 0x00000010 0x00000000
|
||||
GPP_F16 (0x6D,0x52) 0x44000100 0x00000040 0x00000010 0x00000000
|
||||
GPP_F17 (0x6D,0x54) 0x44000100 0x00000041 0x00000010 0x00000000
|
||||
GPP_F18 (0x6D,0x56) 0x44000100 0x00000042 0x00000010 0x00000000
|
||||
GPP_F19 (0x6D,0x58) 0x44000100 0x00000043 0x00000010 0x00000000
|
||||
GPP_F20 (0x6D,0x5A) 0x44000100 0x00000044 0x00000010 0x00000000
|
||||
GPP_F21 (0x6D,0x5C) 0x44000100 0x00000045 0x00000010 0x00000000
|
||||
GPP_F22 (0x6D,0x5E) 0x44000100 0x00000046 0x00000010 0x00000000
|
||||
GPP_F23 (0x6D,0x60) 0x44000100 0x00001047 0x00000010 0x00000000
|
||||
GPP_H0 (0x6D,0x62) 0x44000102 0x00000048 0x00000010 0x00000000
|
||||
GPP_H1 (0x6D,0x64) 0x44000f00 0x00000049 0x00000010 0x00000000
|
||||
GPP_H2 (0x6D,0x66) 0x44000f00 0x0000004a 0x00000010 0x00000000
|
||||
GPP_H3 (0x6D,0x68) 0x44000102 0x0000004b 0x00000010 0x00000000
|
||||
GPP_H4 (0x6D,0x6A) 0x44000102 0x0000004c 0x00000010 0x00000000
|
||||
GPP_H5 (0x6D,0x6C) 0x44000102 0x0000004d 0x00000010 0x00000000
|
||||
GPP_H6 (0x6D,0x6E) 0x44000102 0x0000004e 0x00000010 0x00000000
|
||||
GPP_H7 (0x6D,0x70) 0x44000102 0x0000004f 0x00000010 0x00000000
|
||||
GPP_H8 (0x6D,0x72) 0x44000102 0x00000050 0x00000010 0x00000000
|
||||
GPP_H9 (0x6D,0x74) 0x44000102 0x00000051 0x00000010 0x00000000
|
||||
GPP_H10 (0x6D,0x76) 0x44000102 0x00000052 0x00000010 0x00000000
|
||||
GPP_H11 (0x6D,0x78) 0x44000102 0x00000053 0x00000010 0x00000000
|
||||
GPP_H12 (0x6D,0x7A) 0x44000102 0x00000054 0x00000010 0x00000000
|
||||
GPP_H13 (0x6D,0x7C) 0x44000102 0x00000055 0x00000010 0x00000000
|
||||
GPP_H14 (0x6D,0x7E) 0x44000102 0x00000056 0x00000010 0x00000000
|
||||
GPP_H15 (0x6D,0x80) 0x44000102 0x00000057 0x00000010 0x00000000
|
||||
GPP_H16 (0x6D,0x82) 0x44000102 0x00000058 0x00000010 0x00000000
|
||||
GPP_H17 (0x6D,0x84) 0x44000102 0x00000059 0x00000010 0x00000000
|
||||
GPP_H18 (0x6D,0x86) 0x44000500 0x0000005a 0x00000010 0x00000000
|
||||
GPP_H19 (0x6D,0x88) 0x44000102 0x0000005b 0x00000010 0x00000000
|
||||
GPP_H20 (0x6D,0x8A) 0x44000102 0x0000005c 0x00000010 0x00000000
|
||||
GPP_H21 (0x6D,0x8C) 0x44000102 0x0000005d 0x00000810 0x00000000
|
||||
GPP_H22 (0x6D,0x8E) 0x84000201 0x0000005e 0x00000010 0x00000000
|
||||
GPP_H23 (0x6D,0x90) 0x44000102 0x0000005f 0x00000010 0x00000000
|
||||
GPD0 (0x6C,0x00) 0x04000102 0x00000060 0x00000010 0x00000000
|
||||
GPD1 (0x6C,0x02) 0x44000702 0x00003c61 0x00000010 0x00000000
|
||||
GPD2 (0x6C,0x04) 0x04000102 0x00003c62 0x00000010 0x00000000
|
||||
GPD3 (0x6C,0x06) 0x44000702 0x00003063 0x00000010 0x00000000
|
||||
GPD4 (0x6C,0x08) 0x44000600 0x00000064 0x00000010 0x00000000
|
||||
GPD5 (0x6C,0x0A) 0x44000600 0x00000065 0x00000010 0x00000000
|
||||
GPD6 (0x6C,0x0C) 0x44000600 0x00000066 0x00000010 0x00000000
|
||||
GPD7 (0x6C,0x0E) 0x04000102 0x00000067 0x00000810 0x00000000
|
||||
GPD8 (0x6C,0x10) 0x44000700 0x00000068 0x00000010 0x00000000
|
||||
GPD9 (0x6C,0x12) 0x04000102 0x00000069 0x00000010 0x00000000
|
||||
GPD10 (0x6C,0x14) 0x44000600 0x0000006a 0x00000010 0x00000000
|
||||
GPD11 (0x6C,0x16) 0x04000102 0x0000006b 0x00000010 0x00000000
|
||||
GPP_C0 (0x6A,0x00) 0x44000702 0x00000048 0x00000010 0x00000000
|
||||
GPP_C1 (0x6A,0x02) 0x44000702 0x00000049 0x00000010 0x00000000
|
||||
GPP_C2 (0x6A,0x04) 0x44000102 0x0000004a 0x00000010 0x00000000
|
||||
GPP_C3 (0x6A,0x06) 0x44000102 0x0000004b 0x00000010 0x00000000
|
||||
GPP_C4 (0x6A,0x08) 0x44000102 0x0000004c 0x00000010 0x00000000
|
||||
GPP_C5 (0x6A,0x0A) 0x44000100 0x0000004d 0x00000010 0x00000000
|
||||
GPP_C6 (0x6A,0x0C) 0x44000102 0x0000004e 0x00000010 0x00000000
|
||||
GPP_C7 (0x6A,0x0E) 0x44000102 0x0000004f 0x00000010 0x00000000
|
||||
GPP_C8 (0x6A,0x10) 0x44000102 0x00000050 0x00000010 0x00000000
|
||||
GPP_C9 (0x6A,0x12) 0x82880102 0x00003051 0x00000010 0x00000000
|
||||
GPP_C10 (0x6A,0x14) 0x84000200 0x00000052 0x00000010 0x00000000
|
||||
GPP_C11 (0x6A,0x16) 0x44000102 0x00000053 0x00000010 0x00000000
|
||||
GPP_C12 (0x6A,0x18) 0x84000201 0x00000054 0x00000010 0x00000000
|
||||
GPP_C13 (0x6A,0x1A) 0x84000201 0x00000055 0x00000010 0x00000000
|
||||
GPP_C14 (0x6A,0x1C) 0x84000200 0x00000056 0x00000010 0x00000000
|
||||
GPP_C15 (0x6A,0x1E) 0x84000201 0x00003057 0x00000010 0x00000000
|
||||
GPP_C16 (0x6A,0x20) 0x44000102 0x00000058 0x00000010 0x00000000
|
||||
GPP_C17 (0x6A,0x22) 0x44000102 0x00000059 0x00000010 0x00000000
|
||||
GPP_C18 (0x6A,0x24) 0x44000102 0x0000005a 0x00000010 0x00000000
|
||||
GPP_C19 (0x6A,0x26) 0x44000102 0x0000005b 0x00000010 0x00000000
|
||||
GPP_C20 (0x6A,0x28) 0x44000102 0x0000005c 0x00000010 0x00000000
|
||||
GPP_C21 (0x6A,0x2A) 0x44000102 0x0000005d 0x00000010 0x00000000
|
||||
GPP_C22 (0x6A,0x2C) 0x44000102 0x0000005e 0x00000010 0x00000000
|
||||
GPP_C23 (0x6A,0x2E) 0x44000102 0x0000005f 0x00000010 0x00000000
|
||||
GPP_E0 (0x6A,0x30) 0x44000102 0x00000018 0x00000010 0x00000000
|
||||
GPP_E1 (0x6A,0x32) 0x44000102 0x00000019 0x00000010 0x00000000
|
||||
GPP_E2 (0x6A,0x34) 0x44000700 0x0000301a 0x00000010 0x00000000
|
||||
GPP_E3 (0x6A,0x36) 0x44000102 0x0000001b 0x00000010 0x00000000
|
||||
GPP_E4 (0x6A,0x38) 0x44000102 0x0000001c 0x00000010 0x00000000
|
||||
GPP_E5 (0x6A,0x3A) 0x44000102 0x0000001d 0x00000010 0x00000000
|
||||
GPP_E6 (0x6A,0x3C) 0x44000700 0x0000001e 0x00000010 0x00000000
|
||||
GPP_E7 (0x6A,0x3E) 0x44000102 0x0000001f 0x00000010 0x00000000
|
||||
GPP_E8 (0x6A,0x40) 0x44000700 0x00000020 0x00000010 0x00000000
|
||||
GPP_E9 (0x6A,0x42) 0x44000102 0x00000021 0x00000810 0x00000000
|
||||
GPP_E10 (0x6A,0x44) 0x44000102 0x00000022 0x00000810 0x00000000
|
||||
GPP_E11 (0x6A,0x46) 0x44000102 0x00000023 0x00000810 0x00000000
|
||||
GPP_E12 (0x6A,0x48) 0x44000102 0x00000024 0x00000010 0x00000000
|
||||
GPP_E13 (0x6A,0x4A) 0x44000700 0x00000025 0x00000010 0x00000000
|
||||
GPP_E14 (0x6A,0x4C) 0x44000700 0x00000026 0x00000010 0x00000000
|
||||
GPP_E15 (0x6A,0x4E) 0x44000102 0x00000027 0x00000010 0x00000000
|
||||
GPP_E16 (0x6A,0x50) 0x80880102 0x00000028 0x00000010 0x00000000
|
||||
GPP_E17 (0x6A,0x52) 0x44000702 0x00000029 0x00000010 0x00000000
|
||||
GPP_E18 (0x6A,0x54) 0x44000702 0x0000002a 0x00000010 0x00000000
|
||||
GPP_E19 (0x6A,0x56) 0x44000602 0x0000002b 0x00000810 0x00000000
|
||||
GPP_E20 (0x6A,0x58) 0x44000702 0x0000002c 0x00000010 0x00000000
|
||||
GPP_E21 (0x6A,0x5A) 0x44000602 0x0000002d 0x00000810 0x00000000
|
||||
GPP_E22 (0x6A,0x5C) 0x44000102 0x0000002e 0x00000010 0x00000000
|
||||
GPP_E23 (0x6A,0x5E) 0x44000102 0x0000002f 0x00000010 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
|
@ -26,7 +26,7 @@ CONFIG_USE_BLOBS=y
|
||||
# CONFIG_UBSAN is not set
|
||||
# CONFIG_NO_RELOCATABLE_RAMSTAGE is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
CONFIG_TSEG_STAGE_CACHE=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
|
||||
@ -50,7 +50,6 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_CAVIUM is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
@ -73,6 +72,7 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PORTWELL is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
@ -84,6 +84,7 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="system76/whl-u"
|
||||
@ -102,7 +103,7 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="System76"
|
||||
CONFIG_VARIANT_DIR="galp3-c"
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_INTEL_GMA_VBT_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/vbt.rom"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xe00
|
||||
# CONFIG_POST_IO is not set
|
||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
@ -114,6 +115,11 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_LEN=0x0
|
||||
CONFIG_CPU_MICROCODE_CBFS_LOC=0x0
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_DIMM_MAX=2
|
||||
@ -127,25 +133,30 @@ CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1323
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_MAINBOARD_VERSION="galp3-c"
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
CONFIG_CPU_MICROCODE_CBFS_LEN=0x0
|
||||
CONFIG_CPU_MICROCODE_CBFS_LOC=0x0
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_HEAP_SIZE=0x8000
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
||||
CONFIG_BOARD_SYSTEM76_GALP3_C=y
|
||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1323
|
||||
CONFIG_CONSOLE_POST=y
|
||||
CONFIG_PXE_ROM_ID="10ec,8168"
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
@ -154,6 +165,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
@ -183,9 +195,10 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=216
|
||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
||||
@ -205,7 +218,6 @@ CONFIG_FSP_FD_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/FSP.fd"
|
||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
||||
# CONFIG_NHLT_MAX98357 is not set
|
||||
# CONFIG_NHLT_DA7219 is not set
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_IFD_CHIPSET="cnl"
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
@ -213,25 +225,22 @@ CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
|
||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=6
|
||||
# CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE=y
|
||||
CONFIG_SOC_INTEL_COMMON_CANNONLAKE_BASE=y
|
||||
# CONFIG_SOC_INTEL_COFFEELAKE is not set
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_BASE=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS=y
|
||||
CONFIG_SOC_INTEL_WHISKEYLAKE=y
|
||||
# CONFIG_SOC_INTEL_COMETLAKE is not set
|
||||
# CONFIG_SOC_INTEL_CANNONLAKE_PCH_H is not set
|
||||
# CONFIG_NHLT_MAX98373 is not set
|
||||
CONFIG_MAX_ROOT_PORTS=16
|
||||
CONFIG_MAX_PCIE_CLOCKS=6
|
||||
# CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE is not set
|
||||
# CONFIG_USE_CANNONLAKE_CAR_NEM_ENHANCED is not set
|
||||
CONFIG_USE_CANNONLAKE_FSP_CAR=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT=0
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
||||
CONFIG_SOC_INTEL_COMMON=y
|
||||
|
||||
@ -247,11 +256,6 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
||||
# CONFIG_INTEL_CAR_NEM is not set
|
||||
# CONFIG_INTEL_CAR_CQOS is not set
|
||||
# CONFIG_INTEL_CAR_NEM_ENHANCED is not set
|
||||
|
||||
#
|
||||
# Multiple Processor (MP) Initialization Options
|
||||
#
|
||||
CONFIG_USE_COREBOOT_NATIVE_MP_INIT=y
|
||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||
@ -264,8 +268,9 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
# CONFIG_SKIP_GRAPHICS_ENABLING is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||
@ -284,6 +289,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_AHCI_PORT_IMPLEMENTED_INVERT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||
@ -292,16 +298,19 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SA_PCIEX_LENGTH=0x10000000
|
||||
# CONFIG_SA_ENABLE_IMR is not set
|
||||
# CONFIG_SA_ENABLE_DPR is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
# CONFIG_USE_LEGACY_8254_TIMER is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
||||
|
||||
#
|
||||
# Intel SoC Common PCH Code
|
||||
@ -318,13 +327,13 @@ CONFIG_SOC_INTEL_COMMON_RESET=y
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
# CONFIG_ACPI_CONSOLE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_EC_PTS_WAK=y
|
||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
||||
@ -338,7 +347,6 @@ CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
@ -354,23 +362,24 @@ CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
||||
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_NO_SMM is not set
|
||||
# CONFIG_SMM_ASEG is not set
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_X86_AMD_INIT_SIPI is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
@ -391,7 +400,6 @@ CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
@ -413,18 +421,15 @@ CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
||||
# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
# CONFIG_EC_GOOGLE_WILCO is not set
|
||||
CONFIG_EC_BASE_ACPI_DATA=0x930
|
||||
CONFIG_EC_BASE_ACPI_COMMAND=0x934
|
||||
CONFIG_EC_BASE_HOST_DATA=0x940
|
||||
CONFIG_EC_BASE_HOST_COMMAND=0x944
|
||||
CONFIG_EC_BASE_PACKET=0x950
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
@ -477,28 +482,6 @@ CONFIG_UDK_VERSION=2017
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_USE_ARCH_TIMER is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_PPC64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_PPC64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
CONFIG_ARCH_RISCV_M=y
|
||||
# CONFIG_ARCH_RISCV_S is not set
|
||||
# CONFIG_ARCH_RISCV_U is not set
|
||||
# CONFIG_ARCH_RISCV_RV64 is not set
|
||||
# CONFIG_ARCH_RISCV_RV32 is not set
|
||||
# CONFIG_ARCH_RISCV_PMP is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
# CONFIG_RISCV_USE_ARCH_TIMER is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@ -530,15 +513,13 @@ CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
CONFIG_IDT_IN_EVERY_STAGE=y
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
|
||||
#
|
||||
# Devices
|
||||
@ -567,8 +548,6 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
@ -577,12 +556,13 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
@ -609,11 +589,10 @@ CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
@ -625,6 +604,8 @@ CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_HAVE_USBDEBUG is not set
|
||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
||||
# CONFIG_VPD is not set
|
||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
@ -640,6 +621,8 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
@ -647,7 +630,6 @@ CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
CONFIG_FSP_T_CBFS="fspt.bin"
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
CONFIG_FSP_T_FILE="$(obj)/Fsp_T.fd"
|
||||
CONFIG_FSP_CAR=y
|
||||
CONFIG_FSP_T_XIP=y
|
||||
@ -662,12 +644,13 @@ CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_HAVE_INTEL_PTT is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
# CONFIG_LPC_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
|
||||
@ -680,7 +663,6 @@ CONFIG_DRIVERS_MC146818=y
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVERS_USB_ACPI is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
@ -695,6 +677,12 @@ CONFIG_DRIVERS_MC146818=y
|
||||
# Trusted Platform Module
|
||||
#
|
||||
CONFIG_USER_NO_TPM=y
|
||||
|
||||
#
|
||||
# Memory initialization
|
||||
#
|
||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
@ -734,12 +722,10 @@ CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
||||
@ -802,7 +788,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
#
|
||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
# CONFIG_DEBUG_SMM_RELOCATION is not set
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
@ -824,6 +809,7 @@ CONFIG_HAVE_DEBUG_GPIO=y
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
CONFIG_NO_EDID_FILL_FB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
@ -836,5 +822,7 @@ CONFIG_REG_SCRIPT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_POSTCAR=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
218
models/galp3-c/gpio.h
Normal file
218
models/galp3-c/gpio.h
Normal file
@ -0,0 +1,218 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2019 System76
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef MAINBOARD_GPIO_H
|
||||
#define MAINBOARD_GPIO_H
|
||||
|
||||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
#ifndef __ACPI__
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
static const struct pad_config gpio_table[] = {
|
||||
PAD_CFG_GPI(GPD0, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD7, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD9, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD11, NONE, PWROK),
|
||||
PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A21, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B11, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_C9, 0x82880100, 0x3000),
|
||||
PAD_CFG_TERM_GPO(GPP_C10, 0, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_C11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C12, 1, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_C13, 1, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_C14, 0, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_C15, 1, UP_20K, PLTRST),
|
||||
PAD_CFG_GPI(GPP_C16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D7, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D8, 1, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_D9, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_D10, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_D11, 0x40880100, 0x3000),
|
||||
PAD_CFG_GPI(GPP_D12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D15, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D16, 1, NONE, PWROK),
|
||||
PAD_CFG_GPI(GPP_D17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D18, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_D21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E1, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E2, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E5, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E15, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_E16, 0x80880100, 0x0000),
|
||||
PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_F1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F3, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F9, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F23, DN_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF3),
|
||||
PAD_CFG_GPI(GPP_H3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H17, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H22, 1, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_H23, NONE, DEEP),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
BIN
models/galp3-c/uecflash.efi
(Stored with Git LFS)
Normal file
BIN
models/galp3-c/uecflash.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
@ -1,216 +0,0 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x5914, Revision 0x08
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x5917, Revision 0x07
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x9D2F, Revision 0x21
|
||||
PCI Device: 0000:00:14.2: Class 0x00118000, Vendor 0x8086, Device 0x9D31, Revision 0x21
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x9D3A, Revision 0x21
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0x9D03, Revision 0x21
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x9D10, Revision 0xF1
|
||||
PCI Device: 0000:00:1c.4: Class 0x00060400, Vendor 0x8086, Device 0x9D14, Revision 0xF1
|
||||
PCI Device: 0000:00:1c.5: Class 0x00060400, Vendor 0x8086, Device 0x9D15, Revision 0xF1
|
||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x9D18, Revision 0xF1
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x9D4E, Revision 0x21
|
||||
PCI Device: 0000:00:1f.2: Class 0x00058000, Vendor 0x8086, Device 0x9D21, Revision 0x21
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x9D71, Revision 0x21
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x9D23, Revision 0x21
|
||||
PCI Device: 0000:01:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15DA, Revision 0x02
|
||||
PCI Device: 0000:02:00.0: Class 0x00060400, Vendor 0x8086, Device 0x15DA, Revision 0x02
|
||||
PCI Device: 0000:02:01.0: Class 0x00060400, Vendor 0x8086, Device 0x15DA, Revision 0x02
|
||||
PCI Device: 0000:02:02.0: Class 0x00060400, Vendor 0x8086, Device 0x15DA, Revision 0x02
|
||||
PCI Device: 0000:39:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x15DB, Revision 0x02
|
||||
PCI Device: 0000:3a:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x5287, Revision 0x01
|
||||
PCI Device: 0000:3a:00.1: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x12
|
||||
PCI Device: 0000:3b:00.0: Class 0x00028000, Vendor 0x8086, Device 0x24FB, Revision 0x10
|
||||
PCI Device: 0000:3c:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA808, Revision 0x00
|
||||
## GPIO ##
|
||||
100 Series PCH-LP
|
||||
GPP_A0 = 0x44000502 0x00000018
|
||||
GPP_A1 = 0x44000402 0x00000019
|
||||
GPP_A2 = 0x44000402 0x0000001a
|
||||
GPP_A3 = 0x44000402 0x0000001b
|
||||
GPP_A4 = 0x44000402 0x0000001c
|
||||
GPP_A5 = 0x44000600 0x0000001d
|
||||
GPP_A6 = 0x44000402 0x0000001e
|
||||
GPP_A7 = 0x44000102 0x0000001f
|
||||
GPP_A8 = 0x44000700 0x00000020
|
||||
GPP_A9 = 0x44000600 0x00000021
|
||||
GPP_A10 = 0x44000600 0x00001022
|
||||
GPP_A11 = 0x44000200 0x00000023
|
||||
GPP_A12 = 0x44000200 0x00000024
|
||||
GPP_A13 = 0x44000200 0x00000025
|
||||
GPP_A14 = 0x44000600 0x00000026
|
||||
GPP_A15 = 0x44000502 0x00000027
|
||||
GPP_A16 = 0x44000200 0x00000028
|
||||
GPP_A17 = 0x44000200 0x00000029
|
||||
GPP_A18 = 0x44000201 0x0000002a
|
||||
GPP_A19 = 0x44000603 0x0000002b
|
||||
GPP_A20 = 0x44000200 0x0000002c
|
||||
GPP_A21 = 0x84000200 0x0000102d
|
||||
GPP_A22 = 0x04000200 0x0000002e
|
||||
GPP_A23 = 0x04000200 0x0000002f
|
||||
GPP_B0 = 0x44000700 0x00000030
|
||||
GPP_B1 = 0x44000700 0x00000031
|
||||
GPP_B2 = 0x44000200 0x00000032
|
||||
GPP_B3 = 0x44000200 0x00000033
|
||||
GPP_B4 = 0x44000200 0x00000034
|
||||
GPP_B5 = 0x44000200 0x00000035
|
||||
GPP_B6 = 0x44000200 0x00000036
|
||||
GPP_B7 = 0x44000702 0x00000037
|
||||
GPP_B8 = 0x44000700 0x00000038
|
||||
GPP_B9 = 0x44000700 0x00000039
|
||||
GPP_B10 = 0x44000702 0x0000003a
|
||||
GPP_B11 = 0x44000700 0x0000003b
|
||||
GPP_B12 = 0x44000200 0x0000003c
|
||||
GPP_B13 = 0x44000700 0x0000003d
|
||||
GPP_B14 = 0x44000600 0x0000103e
|
||||
GPP_B15 = 0x44000200 0x0000003f
|
||||
GPP_B16 = 0x44000200 0x00000040
|
||||
GPP_B17 = 0x44000200 0x00000041
|
||||
GPP_B18 = 0x44000600 0x00003042
|
||||
GPP_B19 = 0x44000200 0x00000043
|
||||
GPP_B20 = 0x44000200 0x00000044
|
||||
GPP_B21 = 0x44000200 0x00000045
|
||||
GPP_B22 = 0x44000700 0x00001046
|
||||
GPP_B23 = 0x44000200 0x00000047
|
||||
GPP_C0 = 0x44000702 0x00000048
|
||||
GPP_C1 = 0x44000702 0x00001049
|
||||
GPP_C2 = 0x44000201 0x0000104a
|
||||
GPP_C3 = 0x44000200 0x0000004b
|
||||
GPP_C4 = 0x44000200 0x0000004c
|
||||
GPP_C5 = 0x44000200 0x0000004d
|
||||
GPP_C6 = 0xffffffff 0xffffffff
|
||||
GPP_C7 = 0xffffffff 0xffffffff
|
||||
GPP_C8 = 0x44000702 0x00000050
|
||||
GPP_C9 = 0x44000700 0x00000051
|
||||
GPP_C10 = 0x44000700 0x00000052
|
||||
GPP_C11 = 0x44000702 0x00000053
|
||||
GPP_C12 = 0x44000702 0x00000054
|
||||
GPP_C13 = 0x82880102 0x00000055
|
||||
GPP_C14 = 0x44000700 0x00000056
|
||||
GPP_C15 = 0x44000702 0x00000057
|
||||
GPP_C16 = 0x44000200 0x00000058
|
||||
GPP_C17 = 0x44000200 0x00000059
|
||||
GPP_C18 = 0x44000200 0x0000005a
|
||||
GPP_C19 = 0x40880102 0x0000005b
|
||||
GPP_C20 = 0x44000702 0x0000005c
|
||||
GPP_C21 = 0x44000700 0x0000005d
|
||||
GPP_C22 = 0x44000700 0x0000005e
|
||||
GPP_C23 = 0x44000702 0x0000005f
|
||||
GPP_D0 = 0x44000200 0x00000060
|
||||
GPP_D1 = 0x44000200 0x00000061
|
||||
GPP_D2 = 0x44000200 0x00000062
|
||||
GPP_D3 = 0x44000200 0x00000063
|
||||
GPP_D4 = 0x44000200 0x00000064
|
||||
GPP_D5 = 0x44000702 0x00000065
|
||||
GPP_D6 = 0x44000700 0x00000066
|
||||
GPP_D7 = 0x44000700 0x00000067
|
||||
GPP_D8 = 0x44000201 0x00000068
|
||||
GPP_D9 = 0x44000200 0x00000069
|
||||
GPP_D10 = 0x44000200 0x0000006a
|
||||
GPP_D11 = 0x44000200 0x0000006b
|
||||
GPP_D12 = 0x44000200 0x0000006c
|
||||
GPP_D13 = 0x44000200 0x0000006d
|
||||
GPP_D14 = 0x44000200 0x0000006e
|
||||
GPP_D15 = 0x44000700 0x0000006f
|
||||
GPP_D16 = 0x44000700 0x00000070
|
||||
GPP_D17 = 0x44000700 0x00000071
|
||||
GPP_D18 = 0x44000700 0x00000072
|
||||
GPP_D19 = 0x44000700 0x00000073
|
||||
GPP_D20 = 0x44000700 0x00000074
|
||||
GPP_D21 = 0x44000102 0x00000075
|
||||
GPP_D22 = 0x44000700 0x00000076
|
||||
GPP_D23 = 0x44000700 0x00000077
|
||||
GPP_E0 = 0x42100100 0x00001018
|
||||
GPP_E1 = 0x44000702 0x00000019
|
||||
GPP_E2 = 0x44000502 0x0000001a
|
||||
GPP_E3 = 0x40000000 0x0000001b
|
||||
GPP_E4 = 0x04000700 0x0000001c
|
||||
GPP_E5 = 0x04000700 0x0000001d
|
||||
GPP_E6 = 0x44000200 0x0000001e
|
||||
GPP_E7 = 0x44000100 0x0000001f
|
||||
GPP_E8 = 0x44000700 0x00000020
|
||||
GPP_E9 = 0x44000200 0x00000021
|
||||
GPP_E10 = 0x44000200 0x00000022
|
||||
GPP_E11 = 0x44000200 0x00000023
|
||||
GPP_E12 = 0x44000200 0x00000024
|
||||
GPP_E13 = 0x44000700 0x00000025
|
||||
GPP_E14 = 0x44000700 0x00000026
|
||||
GPP_E15 = 0x42840102 0x00000027
|
||||
GPP_E16 = 0x80880102 0x00000028
|
||||
GPP_E17 = 0x44000702 0x00000029
|
||||
GPP_E18 = 0x44000702 0x0000002a
|
||||
GPP_E19 = 0x44000702 0x0000102b
|
||||
GPP_E20 = 0x44000702 0x0000002c
|
||||
GPP_E21 = 0x44000702 0x0000102d
|
||||
GPP_E22 = 0x40100000 0x0000002e
|
||||
GPP_E23 = 0x44000201 0x0000102f
|
||||
GPD0 = 0x04000702 0x00000050
|
||||
GPD1 = 0x04000700 0x00000051
|
||||
GPD2 = 0x00880502 0x00000052
|
||||
GPD3 = 0x04000702 0x00003053
|
||||
GPD4 = 0x04000700 0x00000054
|
||||
GPD5 = 0x04000700 0x00000055
|
||||
GPD6 = 0x04000700 0x00000056
|
||||
GPD7 = 0x04000301 0x00000057
|
||||
GPD8 = 0x04000700 0x00000058
|
||||
GPD9 = 0x04000700 0x00000059
|
||||
GPD10 = 0x04000700 0x0000005a
|
||||
GPD11 = 0x04000500 0x0000005b
|
||||
GPP_F0 = 0x44000700 0x00000030
|
||||
GPP_F1 = 0x44000700 0x00000031
|
||||
GPP_F2 = 0x44000700 0x00000032
|
||||
GPP_F3 = 0x44000700 0x00000033
|
||||
GPP_F4 = 0x44000702 0x02000034
|
||||
GPP_F5 = 0x44000702 0x02000035
|
||||
GPP_F6 = 0x44000702 0x02000036
|
||||
GPP_F7 = 0x44000702 0x02000037
|
||||
GPP_F8 = 0x44000702 0x02000038
|
||||
GPP_F9 = 0x44000702 0x02000039
|
||||
GPP_F10 = 0x44000b02 0x0200003a
|
||||
GPP_F11 = 0x44000b02 0x0200003b
|
||||
GPP_F12 = 0x44000700 0x0000003c
|
||||
GPP_F13 = 0x44000700 0x0000003d
|
||||
GPP_F14 = 0x44000700 0x0000003e
|
||||
GPP_F15 = 0x44000700 0x0000003f
|
||||
GPP_F16 = 0x44000700 0x00000040
|
||||
GPP_F17 = 0x44000700 0x00000041
|
||||
GPP_F18 = 0x44000700 0x00000042
|
||||
GPP_F19 = 0x44000700 0x00000043
|
||||
GPP_F20 = 0x44000700 0x00000044
|
||||
GPP_F21 = 0x44000700 0x00000045
|
||||
GPP_F22 = 0x44000700 0x00000046
|
||||
GPP_F23 = 0x40100100 0x00000047
|
||||
GPP_G0 = 0x44000700 0x00000048
|
||||
GPP_G1 = 0x44000102 0x00000049
|
||||
GPP_G2 = 0x44000700 0x0000004a
|
||||
GPP_G3 = 0x44000700 0x0000004b
|
||||
GPP_G4 = 0x44000700 0x0000004c
|
||||
GPP_G5 = 0x44000702 0x0000004d
|
||||
GPP_G6 = 0x44000700 0x0000004e
|
||||
GPP_G7 = 0x44000700 0x0000004f
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC269VC
|
||||
vendor_id: 0x10ec0269
|
||||
subsystem_id: 0x15581313
|
||||
revision_id: 0x100202
|
||||
0x12: 0x90a60140
|
||||
0x14: 0x90170120
|
||||
0x15: 0x02211010
|
||||
0x17: 0x40000000
|
||||
0x18: 0x02a11030
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x40f4a205
|
||||
0x1e: 0x411111f0
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Kabylake HDMI
|
||||
vendor_id: 0x8086280b
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x05: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x07: 0x18560010
|
@ -84,6 +84,7 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="system76/kbl-u"
|
||||
@ -108,19 +109,16 @@ CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
CONFIG_ME_CLEANER_ARGS="-S"
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
|
||||
# CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
||||
CONFIG_TPM_INIT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_DIMM_MAX=2
|
||||
@ -135,23 +133,29 @@ CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1313
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_MAINBOARD_VERSION="galp3"
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_HEAP_SIZE=0x80000
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
||||
CONFIG_BOARD_SYSTEM76_GALP3=y
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x1313
|
||||
CONFIG_CONSOLE_POST=y
|
||||
CONFIG_PXE_ROM_ID="10ec,8168"
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
@ -160,6 +164,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
@ -191,7 +196,7 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
|
||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
||||
@ -208,7 +213,6 @@ CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
|
||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
|
||||
# CONFIG_NHLT_MAX98357 is not set
|
||||
# CONFIG_NHLT_DA7219 is not set
|
||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
||||
CONFIG_IFD_CHIPSET="sklkbl"
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
@ -220,16 +224,11 @@ CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
# CONFIG_SOC_INTEL_COMMON_CANNONLAKE_BASE is not set
|
||||
# CONFIG_SOC_INTEL_COFFEELAKE is not set
|
||||
# CONFIG_SOC_INTEL_WHISKEYLAKE is not set
|
||||
# CONFIG_SOC_INTEL_COMETLAKE is not set
|
||||
# CONFIG_SOC_INTEL_CANNONLAKE_PCH_H is not set
|
||||
# CONFIG_NHLT_MAX98373 is not set
|
||||
CONFIG_MAX_ROOT_PORTS=24
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
CONFIG_SOC_INTEL_SKYLAKE=y
|
||||
CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
|
||||
CONFIG_SOC_INTEL_KABYLAKE=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
|
||||
CONFIG_MAINBOARD_USES_FSP2_0=y
|
||||
@ -257,11 +256,6 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
||||
# CONFIG_INTEL_CAR_NEM is not set
|
||||
# CONFIG_INTEL_CAR_CQOS is not set
|
||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
||||
|
||||
#
|
||||
# Multiple Processor (MP) Initialization Options
|
||||
#
|
||||
CONFIG_USE_COREBOOT_NATIVE_MP_INIT=y
|
||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||
@ -276,6 +270,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
# CONFIG_SKIP_GRAPHICS_ENABLING is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||
@ -293,6 +288,7 @@ CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||
@ -301,6 +297,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SA_PCIEX_LENGTH=0x4000000
|
||||
@ -308,6 +305,7 @@ CONFIG_PCIEX_LENGTH_64MB=y
|
||||
# CONFIG_SA_ENABLE_IMR is not set
|
||||
CONFIG_SA_ENABLE_DPR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
# CONFIG_USE_LEGACY_8254_TIMER is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
@ -329,13 +327,13 @@ CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
# CONFIG_ACPI_CONSOLE is not set
|
||||
# CONFIG_MMA is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_EC_PTS_WAK=y
|
||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
||||
@ -365,23 +363,23 @@ CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_NO_SMM is not set
|
||||
# CONFIG_SMM_ASEG is not set
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
@ -401,7 +399,6 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
@ -423,7 +420,8 @@ CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
@ -441,7 +439,11 @@ CONFIG_EC_BASE_PACKET=0x950
|
||||
#
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_CHECK_ME is not set
|
||||
# CONFIG_USE_ME_CLEANER is not set
|
||||
CONFIG_USE_ME_CLEANER=y
|
||||
|
||||
#
|
||||
# Please test the modified ME/TXE firmware and coreboot in two steps
|
||||
#
|
||||
# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
|
||||
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
|
||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||
@ -489,28 +491,11 @@ CONFIG_UDK_VERSION=2015
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_USE_ARCH_TIMER is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_PPC64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_PPC64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
CONFIG_ARCH_RISCV_M=y
|
||||
# CONFIG_ARCH_RISCV_S is not set
|
||||
# CONFIG_ARCH_RISCV_U is not set
|
||||
# CONFIG_ARCH_RISCV_RV64 is not set
|
||||
# CONFIG_ARCH_RISCV_RV32 is not set
|
||||
# CONFIG_ARCH_RISCV_PMP is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
# CONFIG_RISCV_USE_ARCH_TIMER is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@ -542,15 +527,13 @@ CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
# CONFIG_IDT_IN_EVERY_STAGE is not set
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
|
||||
#
|
||||
# Devices
|
||||
@ -559,12 +542,9 @@ CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_FSP_GOP=y
|
||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
||||
# CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
CONFIG_RUN_FSP_GOP=y
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
# CONFIG_PCI_OPTION_ROM_RUN_REALMODE is not set
|
||||
# CONFIG_PCI_OPTION_ROM_RUN_YABEL is not set
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
|
||||
#
|
||||
@ -582,8 +562,6 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
@ -597,7 +575,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
@ -618,8 +595,7 @@ CONFIG_SPI_FLASH_SMM=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
CONFIG_TPM_INIT=y
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
@ -631,6 +607,8 @@ CONFIG_TPM_INIT=y
|
||||
# CONFIG_HAVE_USBDEBUG is not set
|
||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
||||
# CONFIG_VPD is not set
|
||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
@ -646,13 +624,14 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
# CONFIG_PLATFORM_USES_FSP2_1 is not set
|
||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_FSP_CAR is not set
|
||||
# CONFIG_FSP_T_XIP is not set
|
||||
# CONFIG_FSP_USES_CB_STACK is not set
|
||||
@ -667,11 +646,12 @@ CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
@ -703,6 +683,12 @@ CONFIG_TPM2=y
|
||||
CONFIG_MAINBOARD_HAS_TPM2=y
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||
|
||||
#
|
||||
# Memory initialization
|
||||
#
|
||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
@ -742,12 +728,10 @@ CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
||||
@ -778,9 +762,6 @@ CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
# CONFIG_PAYLOAD_LINUX is not set
|
||||
CONFIG_PAYLOAD_TIANOCORE=y
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
# CONFIG_SEABIOS_STABLE is not set
|
||||
# CONFIG_SEABIOS_MASTER is not set
|
||||
# CONFIG_SEABIOS_REVISION is not set
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_TIANOCORE_STABLE=y
|
||||
@ -813,7 +794,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
#
|
||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
# CONFIG_DEBUG_SMM_RELOCATION is not set
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
@ -835,6 +815,7 @@ CONFIG_HAVE_DEBUG_GPIO=y
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
CONFIG_NO_EDID_FILL_FB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
@ -847,5 +828,4 @@ CONFIG_REG_SCRIPT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y
|
||||
|
BIN
models/galp3/uecflash.efi
(Stored with Git LFS)
Normal file
BIN
models/galp3/uecflash.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
@ -1,276 +0,0 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x3EC4, Revision 0x07
|
||||
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1901, Revision 0x07
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x3E9B, Revision 0x00
|
||||
PCI Device: 0000:00:12.0: Class 0x00118000, Vendor 0x8086, Device 0xA379, Revision 0x10
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0xA36D, Revision 0x10
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0xA36F, Revision 0x10
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0xA370, Revision 0x10
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0xA368, Revision 0x10
|
||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0xA369, Revision 0x10
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0xA353, Revision 0x10
|
||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0xA330, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.6: Class 0x00060400, Vendor 0x8086, Device 0xA336, Revision 0xF0
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0xA30D, Revision 0x10
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0xA348, Revision 0x10
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0xA323, Revision 0x10
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0xA324, Revision 0x10
|
||||
PCI Device: 0000:06:00.0: Class 0x00010802, Vendor 0x15B7, Device 0x5002, Revision 0x00
|
||||
PCI Device: 0000:07:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x5287, Revision 0x01
|
||||
PCI Device: 0000:07:00.1: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x12
|
||||
## GPIO ##
|
||||
300 Series PCH
|
||||
GPP_A0 = 0x44000702 0x00000018 0x00000000 0x00000000
|
||||
GPP_A1 = 0x44000402 0x00000019 0x00000000 0x00000000
|
||||
GPP_A2 = 0x44000402 0x0000001a 0x00000000 0x00000000
|
||||
GPP_A3 = 0x44000402 0x0000001b 0x00000000 0x00000000
|
||||
GPP_A4 = 0x44000402 0x0000001c 0x00000000 0x00000000
|
||||
GPP_A5 = 0x44000400 0x0000001d 0x00000000 0x00000000
|
||||
GPP_A6 = 0x44000402 0x0000001e 0x00000000 0x00000000
|
||||
GPP_A7 = 0x44000702 0x0000001f 0x00000000 0x00000000
|
||||
GPP_A8 = 0x44000700 0x00000020 0x00000000 0x00000000
|
||||
GPP_A9 = 0x44000600 0x00000021 0x00000000 0x00000000
|
||||
GPP_A10 = 0x44000600 0x00000022 0x00000000 0x00000000
|
||||
GPP_A11 = 0x44000102 0x00000023 0x00000000 0x00000000
|
||||
GPP_A12 = 0x44000102 0x00000024 0x00000000 0x00000000
|
||||
GPP_A13 = 0x44000700 0x00001025 0x00000000 0x00000000
|
||||
GPP_A14 = 0x44000200 0x00001026 0x00000000 0x00000000
|
||||
GPP_A15 = 0x44000100 0x00000027 0x00000000 0x00000000
|
||||
GPP_A16 = 0x44000300 0x00000028 0x00000000 0x00000000
|
||||
GPP_A17 = 0x44000300 0x00000029 0x00000000 0x00000000
|
||||
GPP_A18 = 0x44000201 0x0000002a 0x00000000 0x00000000
|
||||
GPP_A19 = 0x44000300 0x0000002b 0x00000000 0x00000000
|
||||
GPP_A20 = 0x44000300 0x0000002c 0x00000000 0x00000000
|
||||
GPP_A21 = 0x44000300 0x0000002d 0x00000000 0x00000000
|
||||
GPP_A22 = 0x44000200 0x0000002e 0x00000000 0x00000000
|
||||
GPP_A23 = 0x44000300 0x0000002f 0x00000000 0x00000000
|
||||
GPP_B0 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_B1 = 0x44000102 0x00000030 0x00000000 0x00000000
|
||||
GPP_B2 = 0x44000200 0x00000031 0x00000000 0x00000000
|
||||
GPP_B3 = 0x44000102 0x00000032 0x00000000 0x00000000
|
||||
GPP_B4 = 0x44000102 0x00000033 0x00000000 0x00000000
|
||||
GPP_B5 = 0x44000201 0x00000034 0x00000000 0x00000000
|
||||
GPP_B6 = 0x84000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_B7 = 0x84000102 0x00000036 0x00000000 0x00000000
|
||||
GPP_B8 = 0x84000102 0x00000037 0x00000000 0x00000000
|
||||
GPP_B9 = 0x84000102 0x00000038 0x00000000 0x00000000
|
||||
GPP_B10 = 0x84000102 0x00000039 0x00000000 0x00000000
|
||||
GPP_B11 = 0x44000700 0x0000003a 0x00000000 0x00000000
|
||||
GPP_B12 = 0x44000102 0x0000303b 0x00000000 0x00000000
|
||||
GPP_B13 = 0x44000600 0x0000003c 0x00000000 0x00000000
|
||||
GPP_B14 = 0x44000600 0x0000003d 0x00000000 0x00000000
|
||||
GPP_B15 = 0x44000600 0x0000003e 0x00000000 0x00000000
|
||||
GPP_B16 = 0x44000300 0x0000003f 0x00000000 0x00000000
|
||||
GPP_B17 = 0x44000102 0x00000040 0x00000000 0x00000000
|
||||
GPP_B18 = 0x44000102 0x00000041 0x00000000 0x00000000
|
||||
GPP_B19 = 0x44000500 0x00000042 0x00000000 0x00000000
|
||||
GPP_B20 = 0x44000300 0x00000043 0x00000000 0x00000000
|
||||
GPP_B21 = 0x44000300 0x00000044 0x00000000 0x00000000
|
||||
GPP_B22 = 0x44000300 0x00000045 0x00000000 0x00000000
|
||||
GPP_B23 = 0x44000500 0x00000046 0x00000000 0x00000000
|
||||
GPP_C0 = 0x44000602 0x00000048 0x00000000 0x00000000
|
||||
GPP_C1 = 0x44000402 0x00000049 0x00000000 0x00000000
|
||||
GPP_C2 = 0x44000102 0x0000004a 0x00000800 0x00000000
|
||||
GPP_C3 = 0x44000300 0x0000004b 0x00000000 0x00000000
|
||||
GPP_C4 = 0x44000300 0x0000004c 0x00000000 0x00000000
|
||||
GPP_C5 = 0x44000102 0x0000004d 0x00000000 0x00000000
|
||||
GPP_C6 = 0x44000102 0x0000004e 0x00000000 0x00000000
|
||||
GPP_C7 = 0x44000102 0x0000004f 0x00000000 0x00000000
|
||||
GPP_C8 = 0x44000300 0x00000050 0x00000000 0x00000000
|
||||
GPP_C9 = 0x44000201 0x00000051 0x00000000 0x00000000
|
||||
GPP_C10 = 0x44000300 0x00000052 0x00000000 0x00000000
|
||||
GPP_C11 = 0x44000300 0x00000053 0x00000000 0x00000000
|
||||
GPP_C12 = 0x44000300 0x00000054 0x00000000 0x00000000
|
||||
GPP_C13 = 0x44000300 0x00000055 0x00000000 0x00000000
|
||||
GPP_C14 = 0x44000300 0x00000056 0x00000000 0x00000000
|
||||
GPP_C15 = 0x44000300 0x00000057 0x00000000 0x00000000
|
||||
GPP_C16 = 0x84000402 0x00000058 0x00000000 0x00000000
|
||||
GPP_C17 = 0x84000402 0x00000059 0x00000000 0x00000000
|
||||
GPP_C18 = 0x44000702 0x0000005a 0x00000000 0x00000000
|
||||
GPP_C19 = 0x44000702 0x0000005b 0x00000000 0x00000000
|
||||
GPP_C20 = 0x44000502 0x0000005c 0x00000000 0x00000000
|
||||
GPP_C21 = 0x44000500 0x0000005d 0x00000000 0x00000000
|
||||
GPP_C22 = 0x44000700 0x0000005e 0x00000000 0x00000000
|
||||
GPP_C23 = 0x44000702 0x0000005f 0x00000000 0x00000000
|
||||
GPP_D0 = 0x44000300 0x00000060 0x00000000 0x00000000
|
||||
GPP_D1 = 0x44000300 0x00000061 0x00000000 0x00000000
|
||||
GPP_D2 = 0x44000300 0x00000062 0x00000000 0x00000000
|
||||
GPP_D3 = 0x44000300 0x00000063 0x00000000 0x00000000
|
||||
GPP_D4 = 0x44000300 0x00000064 0x00000000 0x00000000
|
||||
GPP_D5 = 0x44000d00 0x00000065 0x00000000 0x00000000
|
||||
GPP_D6 = 0x44000d00 0x00000066 0x00000000 0x00000000
|
||||
GPP_D7 = 0x44000300 0x00000067 0x00000000 0x00000000
|
||||
GPP_D8 = 0x44000300 0x00000068 0x00000000 0x00000000
|
||||
GPP_D9 = 0x44000300 0x00000069 0x00000000 0x00000000
|
||||
GPP_D10 = 0x44000300 0x0000006a 0x00000000 0x00000000
|
||||
GPP_D11 = 0x44000300 0x0000006b 0x00000000 0x00000000
|
||||
GPP_D12 = 0x44000300 0x0000006c 0x00000000 0x00000000
|
||||
GPP_D13 = 0x44000300 0x0000006d 0x00000000 0x00000000
|
||||
GPP_D14 = 0x44000300 0x0000006e 0x00000000 0x00000000
|
||||
GPP_D15 = 0x44000300 0x0000006f 0x00000000 0x00000000
|
||||
GPP_D16 = 0x44000300 0x00000070 0x00000000 0x00000000
|
||||
GPP_D17 = 0x44000700 0x00000071 0x00000000 0x00000000
|
||||
GPP_D18 = 0x44000700 0x00000072 0x00000000 0x00000000
|
||||
GPP_D19 = 0x44000700 0x00000073 0x00000000 0x00000000
|
||||
GPP_D20 = 0x44000700 0x00000074 0x00000000 0x00000000
|
||||
GPP_D21 = 0x44000300 0x00000075 0x00000000 0x00000000
|
||||
GPP_D22 = 0x44000300 0x00000076 0x00000000 0x00000000
|
||||
GPP_D23 = 0x44000300 0x00000077 0x00000000 0x00000000
|
||||
GPP_G0 = 0x44000102 0x0000006c 0x00000000 0x00000000
|
||||
GPP_G1 = 0x44000100 0x0000006d 0x00000000 0x00000000
|
||||
GPP_G2 = 0x44000100 0x0000006e 0x00000000 0x00000000
|
||||
GPP_G3 = 0x44000100 0x0000306f 0x00000000 0x00000000
|
||||
GPP_G4 = 0x44000300 0x00000070 0x00000000 0x00000000
|
||||
GPP_G5 = 0x44000300 0x00000071 0x00000000 0x00000000
|
||||
GPP_G6 = 0x44000300 0x00000072 0x00000000 0x00000000
|
||||
GPP_G7 = 0x44000300 0x00000073 0x00000000 0x00000000
|
||||
GPD0 = 0x44000502 0x00000060 0x00000000 0x00000000
|
||||
GPD1 = 0x44000500 0x00003c61 0x00000000 0x00000000
|
||||
GPD2 = 0x04000102 0x00003c62 0x00000000 0x00000000
|
||||
GPD3 = 0x44000502 0x00003063 0x00000010 0x00000000
|
||||
GPD4 = 0x44000600 0x00000064 0x00000000 0x00000000
|
||||
GPD5 = 0x44000600 0x00000065 0x00000000 0x00000000
|
||||
GPD6 = 0x44000601 0x00000066 0x00000000 0x00000000
|
||||
GPD7 = 0x04000300 0x00000067 0x00000800 0x00000000
|
||||
GPD8 = 0x44000600 0x00000068 0x00000000 0x00000000
|
||||
GPD9 = 0x04000102 0x00000069 0x00000000 0x00000000
|
||||
GPD10 = 0x04000700 0x0000006a 0x00000000 0x00000000
|
||||
GPD11 = 0x04000200 0x0000006b 0x00000000 0x00000000
|
||||
GPP_K0 = 0x44000300 0x00000018 0x00000000 0x00000000
|
||||
GPP_K1 = 0x44000300 0x00000019 0x00000000 0x00000000
|
||||
GPP_K2 = 0x44000300 0x0000001a 0x00000000 0x00000000
|
||||
GPP_K3 = 0x80880102 0x0000301b 0x00000000 0x00000000
|
||||
GPP_K4 = 0x44000300 0x0000001c 0x00000000 0x00000000
|
||||
GPP_K5 = 0x44000300 0x0000001d 0x00000000 0x00000000
|
||||
GPP_K6 = 0x40880102 0x0000301e 0x00000000 0x00000000
|
||||
GPP_K7 = 0x44000300 0x0000001f 0x00000000 0x00000000
|
||||
GPP_K8 = 0x44000102 0x00000020 0x00000000 0x00000000
|
||||
GPP_K9 = 0x44000102 0x00000021 0x00000000 0x00000000
|
||||
GPP_K10 = 0x44000102 0x00000022 0x00000000 0x00000000
|
||||
GPP_K11 = 0x44000102 0x00000023 0x00000000 0x00000000
|
||||
GPP_K12 = 0x44000300 0x00000024 0x00000000 0x00000000
|
||||
GPP_K13 = 0x44000300 0x00000025 0x00000000 0x00000000
|
||||
GPP_K14 = 0x44000300 0x00000026 0x00000000 0x00000000
|
||||
GPP_K15 = 0x44000300 0x00000027 0x00000000 0x00000000
|
||||
GPP_K16 = 0x44000300 0x00000028 0x00000000 0x00000000
|
||||
GPP_K17 = 0x44000300 0x00000029 0x00000000 0x00000000
|
||||
GPP_K18 = 0x44000300 0x0000002a 0x00000000 0x00000000
|
||||
GPP_K19 = 0x42000102 0x0000302b 0x00000000 0x00000000
|
||||
GPP_K20 = 0x44000101 0x0000002c 0x00000000 0x00000000
|
||||
GPP_K21 = 0x44000100 0x0000002d 0x00000000 0x00000000
|
||||
GPP_K22 = 0x80000100 0x0000002e 0x00000000 0x00000000
|
||||
GPP_K23 = 0x44000700 0x0000002f 0x00000000 0x00000000
|
||||
GPP_H0 = 0x44000702 0x00000048 0x00000000 0x00000000
|
||||
GPP_H1 = 0x84000300 0x00000049 0x00000000 0x00000000
|
||||
GPP_H2 = 0x44000702 0x0000004a 0x00000000 0x00000000
|
||||
GPP_H3 = 0x84000300 0x0000004b 0x00000000 0x00000000
|
||||
GPP_H4 = 0x44000700 0x0000004c 0x00000000 0x00000000
|
||||
GPP_H5 = 0x44000702 0x0000004d 0x00000000 0x00000000
|
||||
GPP_H6 = 0x84000300 0x0000004e 0x00000000 0x00000000
|
||||
GPP_H7 = 0x84000300 0x0000004f 0x00000000 0x00000000
|
||||
GPP_H8 = 0x84000300 0x00000050 0x00000000 0x00000000
|
||||
GPP_H9 = 0x84000300 0x00000051 0x00000000 0x00000000
|
||||
GPP_H10 = 0x44000102 0x00000052 0x00000000 0x00000000
|
||||
GPP_H11 = 0x44000102 0x00000053 0x00000000 0x00000000
|
||||
GPP_H12 = 0x44000102 0x00000054 0x00000000 0x00000000
|
||||
GPP_H13 = 0x44000102 0x00000055 0x00000000 0x00000000
|
||||
GPP_H14 = 0x44000102 0x00000056 0x00000000 0x00000000
|
||||
GPP_H15 = 0x44000102 0x00000057 0x00000800 0x00000000
|
||||
GPP_H16 = 0x44000102 0x00000058 0x00000000 0x00000000
|
||||
GPP_H17 = 0x44000102 0x00000059 0x00000000 0x00000000
|
||||
GPP_H18 = 0x44000102 0x0000005a 0x00000000 0x00000000
|
||||
GPP_H19 = 0x44000102 0x0000005b 0x00000000 0x00000000
|
||||
GPP_H20 = 0x44000102 0x0000005c 0x00000000 0x00000000
|
||||
GPP_H21 = 0x44000102 0x0000005d 0x00000000 0x00000000
|
||||
GPP_H22 = 0x44000102 0x0000005e 0x00000000 0x00000000
|
||||
GPP_H23 = 0x44000102 0x0000005f 0x00000000 0x00000000
|
||||
GPP_E0 = 0x44000102 0x00000018 0x00000000 0x00000000
|
||||
GPP_E1 = 0x44000502 0x00000019 0x00000000 0x00000000
|
||||
GPP_E2 = 0x44000102 0x0000001a 0x00000000 0x00000000
|
||||
GPP_E3 = 0x44000103 0x0000001b 0x00000000 0x00000000
|
||||
GPP_E4 = 0x44000102 0x0000301c 0x00000000 0x00000000
|
||||
GPP_E5 = 0x44000102 0x0000301d 0x00000000 0x00000000
|
||||
GPP_E6 = 0x44000300 0x0000001e 0x00000000 0x00000000
|
||||
GPP_E7 = 0x40800102 0x0000301f 0x00000000 0x00000000
|
||||
GPP_E8 = 0x44000700 0x00000020 0x00000000 0x00000000
|
||||
GPP_E9 = 0x44000300 0x00000021 0x00000800 0x00000000
|
||||
GPP_E10 = 0x44000300 0x00000022 0x00000800 0x00000000
|
||||
GPP_E11 = 0x44000300 0x00000023 0x00000800 0x00000000
|
||||
GPP_E12 = 0x44000300 0x00000024 0x00000000 0x00000000
|
||||
GPP_F0 = 0x44000300 0x00000030 0x00000000 0x00000000
|
||||
GPP_F1 = 0x44000300 0x00000031 0x00000000 0x00000000
|
||||
GPP_F2 = 0x44000300 0x00000032 0x00000000 0x00000000
|
||||
GPP_F3 = 0x44000300 0x00000033 0x00000000 0x00000000
|
||||
GPP_F4 = 0x44000300 0x00000034 0x00000000 0x00000000
|
||||
GPP_F5 = 0x44000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_F6 = 0x44000102 0x00000036 0x00000000 0x00000000
|
||||
GPP_F7 = 0x44000300 0x00000037 0x00000000 0x00000000
|
||||
GPP_F8 = 0x44000300 0x00000038 0x00000000 0x00000000
|
||||
GPP_F9 = 0x44000300 0x00000039 0x00000000 0x00000000
|
||||
GPP_F10 = 0x44000300 0x0000003a 0x00000000 0x00000000
|
||||
GPP_F11 = 0x44000300 0x0000003b 0x00000000 0x00000000
|
||||
GPP_F12 = 0x44000300 0x0000003c 0x00000000 0x00000000
|
||||
GPP_F13 = 0x44000300 0x0000003d 0x00000000 0x00000000
|
||||
GPP_F14 = 0x44000100 0x0000303e 0x00000000 0x00000000
|
||||
GPP_F15 = 0x44000300 0x0000003f 0x00000000 0x00000000
|
||||
GPP_F16 = 0x44000300 0x00000040 0x00000000 0x00000000
|
||||
GPP_F17 = 0x44000300 0x00000041 0x00000000 0x00000000
|
||||
GPP_F18 = 0x44000300 0x00000042 0x00000000 0x00000000
|
||||
GPP_F19 = 0x44000600 0x00000043 0x00000000 0x00000000
|
||||
GPP_F20 = 0x44000600 0x00000044 0x00000000 0x00000000
|
||||
GPP_F21 = 0x44000600 0x00000045 0x00000000 0x00000000
|
||||
GPP_F22 = 0x84000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_F23 = 0x44000200 0x00000047 0x00000000 0x00000000
|
||||
GPP_I0 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I1 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I2 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I3 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_I4 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_I5 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_I6 = 0x40000702 0x00000000 0x00000000 0x00000000
|
||||
GPP_I7 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_I8 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_I9 = 0x40000700 0x00001000 0x00000000 0x00000000
|
||||
GPP_I10 = 0x40000700 0x00001000 0x00000000 0x00000000
|
||||
GPP_I11 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I12 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I13 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I14 = 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_J0 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_J1 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_J2 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_J3 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_J4 = 0x40000700 0x00003c00 0x00000800 0x00000000
|
||||
GPP_J5 = 0x44000102 0x00000030 0x00000000 0x00000000
|
||||
GPP_J6 = 0x84000500 0x00000031 0x00000000 0x00000000
|
||||
GPP_J7 = 0x44000502 0x00000032 0x00000000 0x00000000
|
||||
GPP_J8 = 0x46880100 0x00000033 0x00000000 0x00000000
|
||||
GPP_J9 = 0x44000502 0x00000034 0x00000000 0x00000000
|
||||
GPP_J10 = 0x44000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_J11 = 0x44000102 0x00000036 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC269VC
|
||||
vendor_id: 0x10ec0269
|
||||
subsystem_id: 0x15588560
|
||||
revision_id: 0x100203
|
||||
0x12: 0x90a60140
|
||||
0x14: 0x90170110
|
||||
0x15: 0x02211020
|
||||
0x17: 0x40000000
|
||||
0x18: 0x02a11030
|
||||
0x19: 0x02a1103f
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x40f00001
|
||||
0x1e: 0x411111f0
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Kabylake HDMI
|
||||
vendor_id: 0x8086280b
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x05: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x07: 0x18560010
|
@ -82,12 +82,14 @@ CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="system76/cfl-h"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="gaze14"
|
||||
CONFIG_MAX_CPUS=12
|
||||
CONFIG_CBFS_SIZE=0xA00000
|
||||
CONFIG_UART_FOR_CONSOLE=2
|
||||
CONFIG_MAINBOARD_VENDOR="System76"
|
||||
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
||||
CONFIG_DIMM_SPD_SIZE=512
|
||||
@ -110,6 +112,11 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_LEN=0x0
|
||||
CONFIG_CPU_MICROCODE_CBFS_LOC=0x0
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_DIMM_MAX=2
|
||||
@ -123,14 +130,10 @@ CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x8560
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_MAINBOARD_VERSION="gaze14"
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
CONFIG_CPU_MICROCODE_CBFS_LEN=0x0
|
||||
CONFIG_CPU_MICROCODE_CBFS_LOC=0x0
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_HEAP_SIZE=0x8000
|
||||
CONFIG_BOARD_SYSTEM76_GAZE14_1650_15=y
|
||||
@ -143,9 +146,13 @@ CONFIG_BOARD_SYSTEM76_GAZE14_1650_15=y
|
||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x8560
|
||||
CONFIG_CONSOLE_POST=y
|
||||
CONFIG_PXE_ROM_ID="10ec,8168"
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
@ -154,6 +161,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
@ -183,6 +191,7 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe032000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
@ -205,7 +214,6 @@ CONFIG_FSP_FD_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/FSP.fd"
|
||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
||||
# CONFIG_NHLT_MAX98357 is not set
|
||||
# CONFIG_NHLT_DA7219 is not set
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_IFD_CHIPSET="cnl"
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
@ -225,6 +233,7 @@ CONFIG_SOC_INTEL_COFFEELAKE=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_PCH_H=y
|
||||
# CONFIG_NHLT_MAX98373 is not set
|
||||
CONFIG_MAX_ROOT_PORTS=24
|
||||
CONFIG_MAX_PCIE_CLOCKS=16
|
||||
# CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE is not set
|
||||
# CONFIG_USE_CANNONLAKE_CAR_NEM_ENHANCED is not set
|
||||
CONFIG_USE_CANNONLAKE_FSP_CAR=y
|
||||
@ -264,8 +273,9 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
# CONFIG_SKIP_GRAPHICS_ENABLING is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||
@ -284,6 +294,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_AHCI_PORT_IMPLEMENTED_INVERT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||
@ -292,6 +303,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SA_PCIEX_LENGTH=0x10000000
|
||||
@ -299,6 +311,7 @@ CONFIG_SA_PCIEX_LENGTH=0x10000000
|
||||
# CONFIG_SA_ENABLE_DPR is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG is not set
|
||||
@ -318,13 +331,13 @@ CONFIG_SOC_INTEL_COMMON_RESET=y
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
# CONFIG_ACPI_CONSOLE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_EC_PTS_WAK=y
|
||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
||||
@ -370,7 +383,6 @@ CONFIG_SMM_STUB_STACK_SIZE=0x400
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
@ -413,6 +425,8 @@ CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
|
||||
#
|
||||
@ -488,7 +502,7 @@ CONFIG_UDK_VERSION=2017
|
||||
# CONFIG_ARCH_ROMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
CONFIG_ARCH_RISCV_M=y
|
||||
# CONFIG_ARCH_RISCV_M is not set
|
||||
# CONFIG_ARCH_RISCV_S is not set
|
||||
# CONFIG_ARCH_RISCV_U is not set
|
||||
# CONFIG_ARCH_RISCV_RV64 is not set
|
||||
@ -565,8 +579,6 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
@ -580,7 +592,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
@ -607,17 +618,16 @@ CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
CONFIG_DRIVERS_UART=y
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
|
||||
CONFIG_DRIVERS_UART_8250MEM=y
|
||||
CONFIG_DRIVERS_UART_8250MEM_32=y
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
# CONFIG_HAVE_USBDEBUG is not set
|
||||
@ -638,6 +648,8 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
@ -645,7 +657,6 @@ CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
CONFIG_FSP_T_CBFS="fspt.bin"
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
CONFIG_FSP_T_FILE="$(obj)/Fsp_T.fd"
|
||||
CONFIG_FSP_CAR=y
|
||||
CONFIG_FSP_T_XIP=y
|
||||
@ -708,6 +719,8 @@ CONFIG_RTC=y
|
||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||
CONFIG_POSTCAR_CONSOLE=y
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
# CONFIG_CONSOLE_SERIAL is not set
|
||||
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
@ -822,6 +835,7 @@ CONFIG_HAVE_DEBUG_GPIO=y
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
CONFIG_NO_EDID_FILL_FB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
@ -834,5 +848,8 @@ CONFIG_REG_SCRIPT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_POSTCAR=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
12
models/gaze14_1650_17/README.md
Normal file
12
models/gaze14_1650_17/README.md
Normal file
@ -0,0 +1,12 @@
|
||||
# System76 Gazelle (gaze14)
|
||||
|
||||
https://system76.com/guides/gaze14
|
||||
|
||||
## Contents
|
||||
|
||||
- [EC](./ec.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [FD](./fd.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [ME](./me.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
3
models/gaze14_1650_17/README.md.in
Normal file
3
models/gaze14_1650_17/README.md.in
Normal file
@ -0,0 +1,3 @@
|
||||
# System76 Gazelle (gaze14)
|
||||
|
||||
https://system76.com/guides/gaze14
|
288
models/gaze14_1650_17/coreboot-collector.txt
Normal file
288
models/gaze14_1650_17/coreboot-collector.txt
Normal file
@ -0,0 +1,288 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x3EC4, Revision 0x07
|
||||
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1901, Revision 0x07
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x3E9B, Revision 0x00
|
||||
PCI Device: 0000:00:12.0: Class 0x00118000, Vendor 0x8086, Device 0xA379, Revision 0x10
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0xA36D, Revision 0x10
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0xA36F, Revision 0x10
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0xA370, Revision 0x10
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0xA368, Revision 0x10
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0xA360, Revision 0x10
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0xA353, Revision 0x10
|
||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0xA330, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.6: Class 0x00060400, Vendor 0x8086, Device 0xA336, Revision 0xF0
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0xA30D, Revision 0x10
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0xA348, Revision 0x10
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0xA323, Revision 0x10
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0xA324, Revision 0x10
|
||||
PCI Device: 0000:01:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x1F91, Revision 0xA1
|
||||
PCI Device: 0000:01:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x10FA, Revision 0xA1
|
||||
PCI Device: 0000:06:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA808, Revision 0x00
|
||||
PCI Device: 0000:07:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x5287, Revision 0x01
|
||||
PCI Device: 0000:07:00.1: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x12
|
||||
## GPIO ##
|
||||
300 Series PCH
|
||||
GPP_A0 (0x6E,0x00) 0x44000702 0x00000018 0x00000000 0x00000000
|
||||
GPP_A1 (0x6E,0x02) 0x44000402 0x00000019 0x00000000 0x00000000
|
||||
GPP_A2 (0x6E,0x04) 0x44000402 0x0000001a 0x00000000 0x00000000
|
||||
GPP_A3 (0x6E,0x06) 0x44000402 0x0000001b 0x00000000 0x00000000
|
||||
GPP_A4 (0x6E,0x08) 0x44000402 0x0000001c 0x00000000 0x00000000
|
||||
GPP_A5 (0x6E,0x0A) 0x44000400 0x0000001d 0x00000000 0x00000000
|
||||
GPP_A6 (0x6E,0x0C) 0x44000402 0x0000001e 0x00000000 0x00000000
|
||||
GPP_A7 (0x6E,0x0E) 0x44000702 0x0000001f 0x00000000 0x00000000
|
||||
GPP_A8 (0x6E,0x10) 0x44000700 0x00000020 0x00000000 0x00000000
|
||||
GPP_A9 (0x6E,0x12) 0x44000600 0x00000021 0x00000000 0x00000000
|
||||
GPP_A10 (0x6E,0x14) 0x44000600 0x00000022 0x00000000 0x00000000
|
||||
GPP_A11 (0x6E,0x16) 0x44000102 0x00000023 0x00000000 0x00000000
|
||||
GPP_A12 (0x6E,0x18) 0x44000102 0x00000024 0x00000000 0x00000000
|
||||
GPP_A13 (0x6E,0x1A) 0x44000700 0x00001025 0x00000000 0x00000000
|
||||
GPP_A14 (0x6E,0x1C) 0x44000200 0x00001026 0x00000000 0x00000000
|
||||
GPP_A15 (0x6E,0x1E) 0x44000100 0x00000027 0x00000000 0x00000000
|
||||
GPP_A16 (0x6E,0x20) 0x44000300 0x00000028 0x00000000 0x00000000
|
||||
GPP_A17 (0x6E,0x22) 0x44000300 0x00000029 0x00000000 0x00000000
|
||||
GPP_A18 (0x6E,0x24) 0x44000201 0x0000002a 0x00000000 0x00000000
|
||||
GPP_A19 (0x6E,0x26) 0x44000300 0x0000002b 0x00000000 0x00000000
|
||||
GPP_A20 (0x6E,0x28) 0x44000300 0x0000002c 0x00000000 0x00000000
|
||||
GPP_A21 (0x6E,0x2A) 0x44000300 0x0000002d 0x00000000 0x00000000
|
||||
GPP_A22 (0x6E,0x2C) 0x44000200 0x0000002e 0x00000000 0x00000000
|
||||
GPP_A23 (0x6E,0x2E) 0x44000300 0x0000002f 0x00000000 0x00000000
|
||||
GPP_B0 (0x6E,0x32) 0x44000102 0x00000030 0x00000000 0x00000000
|
||||
GPP_B1 (0x6E,0x34) 0x44000200 0x00000031 0x00000000 0x00000000
|
||||
GPP_B2 (0x6E,0x36) 0x44000102 0x00000032 0x00000000 0x00000000
|
||||
GPP_B3 (0x6E,0x38) 0x44000102 0x00000033 0x00000000 0x00000000
|
||||
GPP_B4 (0x6E,0x3A) 0x44000201 0x00000034 0x00000000 0x00000000
|
||||
GPP_B5 (0x6E,0x3C) 0x84000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_B6 (0x6E,0x3E) 0x84000102 0x00000036 0x00000000 0x00000000
|
||||
GPP_B7 (0x6E,0x40) 0x84000102 0x00000037 0x00000000 0x00000000
|
||||
GPP_B8 (0x6E,0x42) 0x84000102 0x00000038 0x00000000 0x00000000
|
||||
GPP_B9 (0x6E,0x44) 0x84000102 0x00000039 0x00000000 0x00000000
|
||||
GPP_B10 (0x6E,0x46) 0x44000702 0x0000003a 0x00000000 0x00000000
|
||||
GPP_B11 (0x6E,0x48) 0x44000102 0x0000303b 0x00000000 0x00000000
|
||||
GPP_B12 (0x6E,0x4A) 0x44000600 0x0000003c 0x00000000 0x00000000
|
||||
GPP_B13 (0x6E,0x4C) 0x44000600 0x0000003d 0x00000000 0x00000000
|
||||
GPP_B14 (0x6E,0x4E) 0x44000600 0x0000003e 0x00000000 0x00000000
|
||||
GPP_B15 (0x6E,0x50) 0x44000300 0x0000003f 0x00000000 0x00000000
|
||||
GPP_B16 (0x6E,0x52) 0x44000102 0x00000040 0x00000000 0x00000000
|
||||
GPP_B17 (0x6E,0x54) 0x44000102 0x00000041 0x00000000 0x00000000
|
||||
GPP_B18 (0x6E,0x56) 0x44000500 0x00000042 0x00000000 0x00000000
|
||||
GPP_B19 (0x6E,0x58) 0x44000300 0x00000043 0x00000000 0x00000000
|
||||
GPP_B20 (0x6E,0x5A) 0x44000300 0x00000044 0x00000000 0x00000000
|
||||
GPP_B21 (0x6E,0x5C) 0x44000300 0x00000045 0x00000000 0x00000000
|
||||
GPP_B22 (0x6E,0x5E) 0x44000500 0x00000046 0x00000000 0x00000000
|
||||
GPP_B23 (0x6E,0x60) 0x44000900 0x00000047 0x00000000 0x00000000
|
||||
GPP_C0 (0x6D,0x00) 0x44000602 0x00000048 0x00000000 0x00000000
|
||||
GPP_C1 (0x6D,0x02) 0x44000402 0x00000049 0x00000000 0x00000000
|
||||
GPP_C2 (0x6D,0x04) 0x44000102 0x0000004a 0x00000800 0x00000000
|
||||
GPP_C3 (0x6D,0x06) 0x44000300 0x0000004b 0x00000000 0x00000000
|
||||
GPP_C4 (0x6D,0x08) 0x44000300 0x0000004c 0x00000000 0x00000000
|
||||
GPP_C5 (0x6D,0x0A) 0x44000102 0x0000004d 0x00000000 0x00000000
|
||||
GPP_C6 (0x6D,0x0C) 0x44000102 0x0000004e 0x00000000 0x00000000
|
||||
GPP_C7 (0x6D,0x0E) 0x44000102 0x0000004f 0x00000000 0x00000000
|
||||
GPP_C8 (0x6D,0x10) 0x44000300 0x00000050 0x00000000 0x00000000
|
||||
GPP_C9 (0x6D,0x12) 0x44000201 0x00000051 0x00000000 0x00000000
|
||||
GPP_C10 (0x6D,0x14) 0x44000300 0x00000052 0x00000000 0x00000000
|
||||
GPP_C11 (0x6D,0x16) 0x44000300 0x00000053 0x00000000 0x00000000
|
||||
GPP_C12 (0x6D,0x18) 0x44000300 0x00000054 0x00000000 0x00000000
|
||||
GPP_C13 (0x6D,0x1A) 0x44000300 0x00000055 0x00000000 0x00000000
|
||||
GPP_C14 (0x6D,0x1C) 0x44000300 0x00000056 0x00000000 0x00000000
|
||||
GPP_C15 (0x6D,0x1E) 0x44000300 0x00000057 0x00000000 0x00000000
|
||||
GPP_C16 (0x6D,0x20) 0x84000402 0x00000058 0x00000000 0x00000000
|
||||
GPP_C17 (0x6D,0x22) 0x84000402 0x00000059 0x00000000 0x00000000
|
||||
GPP_C18 (0x6D,0x24) 0x44000300 0x0000005a 0x00000000 0x00000000
|
||||
GPP_C19 (0x6D,0x26) 0x44000300 0x0000005b 0x00000000 0x00000000
|
||||
GPP_C20 (0x6D,0x28) 0x44000502 0x0000005c 0x00000000 0x00000000
|
||||
GPP_C21 (0x6D,0x2A) 0x44000500 0x0000005d 0x00000000 0x00000000
|
||||
GPP_C22 (0x6D,0x2C) 0x44000700 0x0000005e 0x00000000 0x00000000
|
||||
GPP_C23 (0x6D,0x2E) 0x44000702 0x0000005f 0x00000000 0x00000000
|
||||
GPP_D0 (0x6D,0x30) 0x44000300 0x00000060 0x00000000 0x00000000
|
||||
GPP_D1 (0x6D,0x32) 0x44000300 0x00000061 0x00000000 0x00000000
|
||||
GPP_D2 (0x6D,0x34) 0x44000300 0x00000062 0x00000000 0x00000000
|
||||
GPP_D3 (0x6D,0x36) 0x44000300 0x00000063 0x00000000 0x00000000
|
||||
GPP_D4 (0x6D,0x38) 0x44000300 0x00000064 0x00000000 0x00000000
|
||||
GPP_D5 (0x6D,0x3A) 0x44000d00 0x00000065 0x00000000 0x00000000
|
||||
GPP_D6 (0x6D,0x3C) 0x44000d00 0x00000066 0x00000000 0x00000000
|
||||
GPP_D7 (0x6D,0x3E) 0x44000300 0x00000067 0x00000000 0x00000000
|
||||
GPP_D8 (0x6D,0x40) 0x44000300 0x00000068 0x00000000 0x00000000
|
||||
GPP_D9 (0x6D,0x42) 0x44000300 0x00000069 0x00000000 0x00000000
|
||||
GPP_D10 (0x6D,0x44) 0x44000300 0x0000006a 0x00000000 0x00000000
|
||||
GPP_D11 (0x6D,0x46) 0x44000300 0x0000006b 0x00000000 0x00000000
|
||||
GPP_D12 (0x6D,0x48) 0x44000300 0x0000006c 0x00000000 0x00000000
|
||||
GPP_D13 (0x6D,0x4A) 0x44000300 0x0000006d 0x00000000 0x00000000
|
||||
GPP_D14 (0x6D,0x4C) 0x44000300 0x0000006e 0x00000000 0x00000000
|
||||
GPP_D15 (0x6D,0x4E) 0x44000300 0x0000006f 0x00000000 0x00000000
|
||||
GPP_D16 (0x6D,0x50) 0x44000300 0x00000070 0x00000000 0x00000000
|
||||
GPP_D17 (0x6D,0x52) 0x44000700 0x00000071 0x00000000 0x00000000
|
||||
GPP_D18 (0x6D,0x54) 0x44000700 0x00000072 0x00000000 0x00000000
|
||||
GPP_D19 (0x6D,0x56) 0x44000700 0x00000073 0x00000000 0x00000000
|
||||
GPP_D20 (0x6D,0x58) 0x44000700 0x00000074 0x00000000 0x00000000
|
||||
GPP_D21 (0x6D,0x5A) 0x44000300 0x00000075 0x00000000 0x00000000
|
||||
GPP_D22 (0x6D,0x5C) 0x44000300 0x00000076 0x00000000 0x00000000
|
||||
GPP_D23 (0x6D,0x5E) 0x44000300 0x00000077 0x00000000 0x00000000
|
||||
GPP_G0 (0x6D,0x60) 0x44000100 0x0000006c 0x00000000 0x00000000
|
||||
GPP_G1 (0x6D,0x62) 0x44000100 0x0000006d 0x00000000 0x00000000
|
||||
GPP_G2 (0x6D,0x64) 0x44000100 0x0000006e 0x00000000 0x00000000
|
||||
GPP_G3 (0x6D,0x66) 0x44000102 0x0000306f 0x00000000 0x00000000
|
||||
GPP_G4 (0x6D,0x68) 0x44000300 0x00000070 0x00000000 0x00000000
|
||||
GPP_G5 (0x6D,0x6A) 0x44000300 0x00000071 0x00000000 0x00000000
|
||||
GPP_G6 (0x6D,0x6C) 0x44000300 0x00000072 0x00000000 0x00000000
|
||||
GPP_G7 (0x6D,0x6E) 0x44000300 0x00000073 0x00000000 0x00000000
|
||||
GPD0 (0x6C,0x00) 0x44000502 0x00000060 0x00000000 0x00000000
|
||||
GPD1 (0x6C,0x02) 0x44000502 0x00003c61 0x00000000 0x00000000
|
||||
GPD2 (0x6C,0x04) 0x04000102 0x00003c62 0x00000000 0x00000000
|
||||
GPD3 (0x6C,0x06) 0x44000502 0x00003063 0x00000010 0x00000000
|
||||
GPD4 (0x6C,0x08) 0x44000600 0x00000064 0x00000000 0x00000000
|
||||
GPD5 (0x6C,0x0A) 0x44000600 0x00000065 0x00000000 0x00000000
|
||||
GPD6 (0x6C,0x0C) 0x44000601 0x00000066 0x00000000 0x00000000
|
||||
GPD7 (0x6C,0x0E) 0x04000300 0x00000067 0x00000800 0x00000000
|
||||
GPD8 (0x6C,0x10) 0x44000600 0x00000068 0x00000000 0x00000000
|
||||
GPD9 (0x6C,0x12) 0x04000102 0x00000069 0x00000000 0x00000000
|
||||
GPD10 (0x6C,0x14) 0x04000700 0x0000006a 0x00000000 0x00000000
|
||||
GPD11 (0x6C,0x16) 0x04000200 0x0000006b 0x00000000 0x00000000
|
||||
GPP_K0 (0x6B,0x00) 0x44000300 0x00000018 0x00000000 0x00000000
|
||||
GPP_K1 (0x6B,0x02) 0x44000300 0x00000019 0x00000000 0x00000000
|
||||
GPP_K2 (0x6B,0x04) 0x44000300 0x0000001a 0x00000000 0x00000000
|
||||
GPP_K3 (0x6B,0x06) 0x80880102 0x0000301b 0x00000000 0x00000000
|
||||
GPP_K4 (0x6B,0x08) 0x44000300 0x0000001c 0x00000000 0x00000000
|
||||
GPP_K5 (0x6B,0x0A) 0x44000300 0x0000001d 0x00000000 0x00000000
|
||||
GPP_K6 (0x6B,0x0C) 0x40880102 0x0000301e 0x00000000 0x00000000
|
||||
GPP_K7 (0x6B,0x0E) 0x44000300 0x0000001f 0x00000000 0x00000000
|
||||
GPP_K8 (0x6B,0x10) 0x44000102 0x00000020 0x00000000 0x00000000
|
||||
GPP_K9 (0x6B,0x12) 0x44000102 0x00000021 0x00000000 0x00000000
|
||||
GPP_K10 (0x6B,0x14) 0x44000102 0x00000022 0x00000000 0x00000000
|
||||
GPP_K11 (0x6B,0x16) 0x44000102 0x00000023 0x00000000 0x00000000
|
||||
GPP_K12 (0x6B,0x18) 0x44000300 0x00000024 0x00000000 0x00000000
|
||||
GPP_K13 (0x6B,0x1A) 0x44000300 0x00000025 0x00000000 0x00000000
|
||||
GPP_K14 (0x6B,0x1C) 0x44000300 0x00000026 0x00000000 0x00000000
|
||||
GPP_K15 (0x6B,0x1E) 0x44000300 0x00000027 0x00000000 0x00000000
|
||||
GPP_K16 (0x6B,0x20) 0x44000300 0x00000028 0x00000000 0x00000000
|
||||
GPP_K17 (0x6B,0x22) 0x44000300 0x00000029 0x00000000 0x00000000
|
||||
GPP_K18 (0x6B,0x24) 0x44000300 0x0000002a 0x00000000 0x00000000
|
||||
GPP_K19 (0x6B,0x26) 0x42000102 0x0000302b 0x00000000 0x00000000
|
||||
GPP_K20 (0x6B,0x28) 0x44000103 0x0000002c 0x00000000 0x00000000
|
||||
GPP_K21 (0x6B,0x2A) 0x44000100 0x0000002d 0x00000000 0x00000000
|
||||
GPP_K22 (0x6B,0x2C) 0x80000102 0x0000002e 0x00000000 0x00000000
|
||||
GPP_K23 (0x6B,0x2E) 0x44000700 0x0000002f 0x00000000 0x00000000
|
||||
GPP_H0 (0x6B,0x30) 0x44000702 0x00000048 0x00000000 0x00000000
|
||||
GPP_H1 (0x6B,0x32) 0x84000300 0x00000049 0x00000000 0x00000000
|
||||
GPP_H2 (0x6B,0x34) 0x44000700 0x0000004a 0x00000000 0x00000000
|
||||
GPP_H3 (0x6B,0x36) 0x84000300 0x0000004b 0x00000000 0x00000000
|
||||
GPP_H4 (0x6B,0x38) 0x84000300 0x0000004c 0x00000000 0x00000000
|
||||
GPP_H5 (0x6B,0x3A) 0x84000300 0x0000004d 0x00000000 0x00000000
|
||||
GPP_H6 (0x6B,0x3C) 0x84000300 0x0000004e 0x00000000 0x00000000
|
||||
GPP_H7 (0x6B,0x3E) 0x84000300 0x0000004f 0x00000000 0x00000000
|
||||
GPP_H8 (0x6B,0x40) 0x84000300 0x00000050 0x00000000 0x00000000
|
||||
GPP_H9 (0x6B,0x42) 0x84000300 0x00000051 0x00000000 0x00000000
|
||||
GPP_H10 (0x6B,0x44) 0x44000102 0x00000052 0x00000000 0x00000000
|
||||
GPP_H11 (0x6B,0x46) 0x44000102 0x00000053 0x00000000 0x00000000
|
||||
GPP_H12 (0x6B,0x48) 0x44000102 0x00000054 0x00000000 0x00000000
|
||||
GPP_H13 (0x6B,0x4A) 0x44000102 0x00000055 0x00000000 0x00000000
|
||||
GPP_H14 (0x6B,0x4C) 0x44000102 0x00000056 0x00000000 0x00000000
|
||||
GPP_H15 (0x6B,0x4E) 0x44000102 0x00000057 0x00000800 0x00000000
|
||||
GPP_H16 (0x6B,0x50) 0x44000102 0x00000058 0x00000000 0x00000000
|
||||
GPP_H17 (0x6B,0x52) 0x44000102 0x00000059 0x00000000 0x00000000
|
||||
GPP_H18 (0x6B,0x54) 0x44000102 0x0000005a 0x00000000 0x00000000
|
||||
GPP_H19 (0x6B,0x56) 0x44000102 0x0000005b 0x00000000 0x00000000
|
||||
GPP_H20 (0x6B,0x58) 0x44000102 0x0000005c 0x00000000 0x00000000
|
||||
GPP_H21 (0x6B,0x5A) 0x44000102 0x0000005d 0x00000000 0x00000000
|
||||
GPP_H22 (0x6B,0x5C) 0x44000102 0x0000005e 0x00000000 0x00000000
|
||||
GPP_H23 (0x6B,0x5E) 0x44000102 0x0000005f 0x00000000 0x00000000
|
||||
GPP_E0 (0x6B,0x60) 0x44000102 0x00000018 0x00000000 0x00000000
|
||||
GPP_E1 (0x6B,0x62) 0x44000502 0x00000019 0x00000000 0x00000000
|
||||
GPP_E2 (0x6B,0x64) 0x44000102 0x0000001a 0x00000000 0x00000000
|
||||
GPP_E3 (0x6B,0x66) 0x44000103 0x0000001b 0x00000000 0x00000000
|
||||
GPP_E4 (0x6B,0x68) 0x44000102 0x0000301c 0x00000000 0x00000000
|
||||
GPP_E5 (0x6B,0x6A) 0x44000102 0x0000301d 0x00000000 0x00000000
|
||||
GPP_E6 (0x6B,0x6C) 0x44000300 0x0000001e 0x00000000 0x00000000
|
||||
GPP_E7 (0x6B,0x6E) 0x40800102 0x0000301f 0x00000000 0x00000000
|
||||
GPP_E8 (0x6B,0x70) 0x44000700 0x00000020 0x00000000 0x00000000
|
||||
GPP_E9 (0x6B,0x72) 0x44000300 0x00000021 0x00000800 0x00000000
|
||||
GPP_E10 (0x6B,0x74) 0x44000300 0x00000022 0x00000800 0x00000000
|
||||
GPP_E11 (0x6B,0x76) 0x44000300 0x00000023 0x00000800 0x00000000
|
||||
GPP_E12 (0x6B,0x78) 0x44000300 0x00000024 0x00000000 0x00000000
|
||||
GPP_F0 (0x6B,0x7A) 0x44000300 0x00000030 0x00000000 0x00000000
|
||||
GPP_F1 (0x6B,0x7C) 0x44000300 0x00000031 0x00000000 0x00000000
|
||||
GPP_F2 (0x6B,0x7E) 0x44000300 0x00000032 0x00000000 0x00000000
|
||||
GPP_F3 (0x6B,0x80) 0x44000300 0x00000033 0x00000000 0x00000000
|
||||
GPP_F4 (0x6B,0x82) 0x44000300 0x00000034 0x00000000 0x00000000
|
||||
GPP_F5 (0x6B,0x84) 0x44000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_F6 (0x6B,0x86) 0x44000102 0x00000036 0x00000000 0x00000000
|
||||
GPP_F7 (0x6B,0x88) 0x44000300 0x00000037 0x00000000 0x00000000
|
||||
GPP_F8 (0x6B,0x8A) 0x44000300 0x00000038 0x00000000 0x00000000
|
||||
GPP_F9 (0x6B,0x8C) 0x44000300 0x00000039 0x00000000 0x00000000
|
||||
GPP_F10 (0x6B,0x8E) 0x44000300 0x0000003a 0x00000000 0x00000000
|
||||
GPP_F11 (0x6B,0x90) 0x44000300 0x0000003b 0x00000000 0x00000000
|
||||
GPP_F12 (0x6B,0x92) 0x44000300 0x0000003c 0x00000000 0x00000000
|
||||
GPP_F13 (0x6B,0x94) 0x44000300 0x0000003d 0x00000000 0x00000000
|
||||
GPP_F14 (0x6B,0x96) 0x44000100 0x0000303e 0x00000000 0x00000000
|
||||
GPP_F15 (0x6B,0x98) 0x44000300 0x0000003f 0x00000000 0x00000000
|
||||
GPP_F16 (0x6B,0x9A) 0x44000300 0x00000040 0x00000000 0x00000000
|
||||
GPP_F17 (0x6B,0x9C) 0x44000300 0x00000041 0x00000000 0x00000000
|
||||
GPP_F18 (0x6B,0x9E) 0x44000300 0x00000042 0x00000000 0x00000000
|
||||
GPP_F19 (0x6B,0xA0) 0x44000600 0x00000043 0x00000000 0x00000000
|
||||
GPP_F20 (0x6B,0xA2) 0x44000600 0x00000044 0x00000000 0x00000000
|
||||
GPP_F21 (0x6B,0xA4) 0x44000600 0x00000045 0x00000000 0x00000000
|
||||
GPP_F22 (0x6B,0xA6) 0x84000201 0x00000046 0x00000000 0x00000000
|
||||
GPP_F23 (0x6B,0xA8) 0x44000201 0x00000047 0x00000000 0x00000000
|
||||
GPP_I0 (0x6A,0x28) 0x44000102 0x00000030 0x00000000 0x00000000
|
||||
GPP_I1 (0x6A,0x2A) 0x84000500 0x00000031 0x00000000 0x00000000
|
||||
GPP_I2 (0x6A,0x2C) 0x44000502 0x00000032 0x00000000 0x00000000
|
||||
GPP_I3 (0x6A,0x2E) 0x46880100 0x00000033 0x00000000 0x00000000
|
||||
GPP_I4 (0x6A,0x30) 0x44000502 0x00000034 0x00000000 0x00000000
|
||||
GPP_I5 (0x6A,0x32) 0x44000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_I6 (0x6A,0x34) 0x44000102 0x00000036 0x00000000 0x00000000
|
||||
GPP_I7 (0x6A,0x36) 0x44000502 0x00000037 0x00000000 0x00000000
|
||||
GPP_I8 (0x6A,0x38) 0x44000502 0x00000038 0x00000800 0x00000000
|
||||
GPP_I9 (0x6A,0x3A) 0x44000102 0x00000039 0x00000000 0x00000000
|
||||
GPP_I10 (0x6A,0x3C) 0x44000102 0x0000003a 0x00000000 0x00000000
|
||||
GPP_I11 (0x6A,0x3E) 0x44000100 0x0000003b 0x00000000 0x00000000
|
||||
GPP_I12 (0x6A,0x40) 0x44000102 0x0000003c 0x00000000 0x00000000
|
||||
GPP_I13 (0x6A,0x42) 0x44000102 0x0000003d 0x00000000 0x00000000
|
||||
GPP_I14 (0x6A,0x44) 0x44000102 0x0000003e 0x00000000 0x00000000
|
||||
GPP_J0 (0x6A,0x4C) 0x44000500 0x00000025 0x00000000 0x00000000
|
||||
GPP_J1 (0x6A,0x4E) 0x44000201 0x00000026 0x00000000 0x00000000
|
||||
GPP_J2 (0x6A,0x50) 0x44000300 0x00000027 0x00000000 0x00000000
|
||||
GPP_J3 (0x6A,0x52) 0x44000300 0x00000028 0x00000000 0x00000000
|
||||
GPP_J4 (0x6A,0x54) 0x44000500 0x00000029 0x00000800 0x00000000
|
||||
GPP_J5 (0x6A,0x56) 0x44000502 0x0000302a 0x00000000 0x00000000
|
||||
GPP_J6 (0x6A,0x58) 0x44000700 0x0000002b 0x00000000 0x00000000
|
||||
GPP_J7 (0x6A,0x5A) 0x44000502 0x0000302c 0x00000000 0x00000000
|
||||
GPP_J8 (0x6A,0x5C) 0x44000500 0x0000002d 0x00000000 0x00000000
|
||||
GPP_J9 (0x6A,0x5E) 0x44000500 0x0000002e 0x00000000 0x00000000
|
||||
GPP_J10 (0x6A,0x60) 0x44000300 0x0000002f 0x00000000 0x00000000
|
||||
GPP_J11 (0x6A,0x62) 0x44000300 0x00000030 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC269VC
|
||||
vendor_id: 0x10ec0269
|
||||
subsystem_id: 0x15588561
|
||||
revision_id: 0x100203
|
||||
0x12: 0x90a60140
|
||||
0x14: 0x90170110
|
||||
0x15: 0x02211020
|
||||
0x17: 0x40000000
|
||||
0x18: 0x02a11030
|
||||
0x19: 0x02a1103f
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x40f00001
|
||||
0x1e: 0x411111f0
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Kabylake HDMI
|
||||
vendor_id: 0x8086280b
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x05: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x07: 0x18560010
|
||||
hdaudioC1D0
|
||||
vendor_name: Nvidia
|
||||
chip_name: GPU 94 HDMI/DP
|
||||
vendor_id: 0x10de0094
|
||||
subsystem_id: 0x15588560
|
||||
revision_id: 0x100100
|
||||
0x04: 0x185600f0
|
||||
0x05: 0x585600f0
|
||||
0x06: 0x585600f0
|
||||
0x07: 0x585600f0
|
258
models/gaze14_1650_17/gpio.h
Normal file
258
models/gaze14_1650_17/gpio.h
Normal file
@ -0,0 +1,258 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2019 System76
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef MAINBOARD_GPIO_H
|
||||
#define MAINBOARD_GPIO_H
|
||||
|
||||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
#ifndef __ACPI__
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
static const struct pad_config gpio_table[] = {
|
||||
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPD6, 0x44000601, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPD7, 0x04000300, 0x0000),
|
||||
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD9, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
|
||||
PAD_CFG_TERM_GPO(GPD11, 0, NONE, PWROK),
|
||||
PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A13, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_A14, 0, DN_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A15, NONE, DEEP),
|
||||
PAD_NC(GPP_A16, NONE),
|
||||
PAD_NC(GPP_A17, NONE),
|
||||
PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
|
||||
PAD_NC(GPP_A19, NONE),
|
||||
PAD_NC(GPP_A20, NONE),
|
||||
PAD_NC(GPP_A21, NONE),
|
||||
PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
|
||||
PAD_NC(GPP_A23, NONE),
|
||||
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B1, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B3, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B4, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B5, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_B6, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_B7, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_B8, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_B9, NONE, PLTRST),
|
||||
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B11, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
||||
PAD_NC(GPP_B15, NONE),
|
||||
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1),
|
||||
PAD_NC(GPP_B19, NONE),
|
||||
PAD_NC(GPP_B20, NONE),
|
||||
PAD_NC(GPP_B21, NONE),
|
||||
PAD_CFG_NF(GPP_B22, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B23, NONE, DEEP, NF2),
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
|
||||
PAD_NC(GPP_C3, NONE),
|
||||
PAD_NC(GPP_C4, NONE),
|
||||
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
|
||||
PAD_NC(GPP_C8, NONE),
|
||||
PAD_CFG_TERM_GPO(GPP_C9, 1, NONE, DEEP),
|
||||
PAD_NC(GPP_C10, NONE),
|
||||
PAD_NC(GPP_C11, NONE),
|
||||
PAD_NC(GPP_C12, NONE),
|
||||
PAD_NC(GPP_C13, NONE),
|
||||
PAD_NC(GPP_C14, NONE),
|
||||
PAD_NC(GPP_C15, NONE),
|
||||
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
|
||||
PAD_NC(GPP_C18, NONE),
|
||||
PAD_NC(GPP_C19, NONE),
|
||||
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF1),
|
||||
PAD_NC(GPP_D0, NONE),
|
||||
PAD_NC(GPP_D1, NONE),
|
||||
PAD_NC(GPP_D2, NONE),
|
||||
PAD_NC(GPP_D3, NONE),
|
||||
PAD_NC(GPP_D4, NONE),
|
||||
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
|
||||
PAD_NC(GPP_D7, NONE),
|
||||
PAD_NC(GPP_D8, NONE),
|
||||
PAD_NC(GPP_D9, NONE),
|
||||
PAD_NC(GPP_D10, NONE),
|
||||
PAD_NC(GPP_D11, NONE),
|
||||
PAD_NC(GPP_D12, NONE),
|
||||
PAD_NC(GPP_D13, NONE),
|
||||
PAD_NC(GPP_D14, NONE),
|
||||
PAD_NC(GPP_D15, NONE),
|
||||
PAD_NC(GPP_D16, NONE),
|
||||
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
PAD_NC(GPP_D21, NONE),
|
||||
PAD_NC(GPP_D22, NONE),
|
||||
PAD_NC(GPP_D23, NONE),
|
||||
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_E3, 0x44000101, 0x0000),
|
||||
PAD_CFG_GPI(GPP_E4, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_E5, UP_20K, DEEP),
|
||||
PAD_NC(GPP_E6, NONE),
|
||||
_PAD_CFG_STRUCT(GPP_E7, 0x40800100, 0x3000),
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
PAD_NC(GPP_E9, NONE),
|
||||
PAD_NC(GPP_E10, NONE),
|
||||
PAD_NC(GPP_E11, NONE),
|
||||
PAD_NC(GPP_E12, NONE),
|
||||
PAD_NC(GPP_F0, NONE),
|
||||
PAD_NC(GPP_F1, NONE),
|
||||
PAD_NC(GPP_F2, NONE),
|
||||
PAD_NC(GPP_F3, NONE),
|
||||
PAD_NC(GPP_F4, NONE),
|
||||
PAD_CFG_GPI(GPP_F5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F6, NONE, DEEP),
|
||||
PAD_NC(GPP_F7, NONE),
|
||||
PAD_NC(GPP_F8, NONE),
|
||||
PAD_NC(GPP_F9, NONE),
|
||||
PAD_NC(GPP_F10, NONE),
|
||||
PAD_NC(GPP_F11, NONE),
|
||||
PAD_NC(GPP_F12, NONE),
|
||||
PAD_NC(GPP_F13, NONE),
|
||||
PAD_CFG_GPI(GPP_F14, UP_20K, DEEP),
|
||||
PAD_NC(GPP_F15, NONE),
|
||||
PAD_NC(GPP_F16, NONE),
|
||||
PAD_NC(GPP_F17, NONE),
|
||||
PAD_NC(GPP_F18, NONE),
|
||||
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_F22, 1, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_F23, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G3, UP_20K, DEEP),
|
||||
PAD_NC(GPP_G4, NONE),
|
||||
PAD_NC(GPP_G5, NONE),
|
||||
PAD_NC(GPP_G6, NONE),
|
||||
PAD_NC(GPP_G7, NONE),
|
||||
PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_H1, 0x84000300, 0x0000),
|
||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_H3, 0x84000300, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_H4, 0x84000300, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_H5, 0x84000300, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_H6, 0x84000300, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_H7, 0x84000300, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_H8, 0x84000300, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_H9, 0x84000300, 0x0000),
|
||||
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_I1, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_I2, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_I3, 0x46880100, 0x0000),
|
||||
PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_I5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I6, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_I7, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_I8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_I9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I14, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_J1, 1, NONE, DEEP),
|
||||
PAD_NC(GPP_J2, NONE),
|
||||
PAD_NC(GPP_J3, NONE),
|
||||
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J9, NONE, DEEP, NF1),
|
||||
PAD_NC(GPP_J10, NONE),
|
||||
PAD_NC(GPP_J11, NONE),
|
||||
PAD_NC(GPP_K0, NONE),
|
||||
PAD_NC(GPP_K1, NONE),
|
||||
PAD_NC(GPP_K2, NONE),
|
||||
_PAD_CFG_STRUCT(GPP_K3, 0x80880100, 0x3000),
|
||||
PAD_NC(GPP_K4, NONE),
|
||||
PAD_NC(GPP_K5, NONE),
|
||||
_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x3000),
|
||||
PAD_NC(GPP_K7, NONE),
|
||||
PAD_CFG_GPI(GPP_K8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K11, NONE, DEEP),
|
||||
PAD_NC(GPP_K12, NONE),
|
||||
PAD_NC(GPP_K13, NONE),
|
||||
PAD_NC(GPP_K14, NONE),
|
||||
PAD_NC(GPP_K15, NONE),
|
||||
PAD_NC(GPP_K16, NONE),
|
||||
PAD_NC(GPP_K17, NONE),
|
||||
PAD_NC(GPP_K18, NONE),
|
||||
_PAD_CFG_STRUCT(GPP_K19, 0x42000100, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_K20, 0x44000101, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K21, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K22, 0x80000100, 0x0000),
|
||||
PAD_CFG_NF(GPP_K23, NONE, DEEP, NF1),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
BIN
models/gaze14_1660ti_15/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/gaze14_1660ti_15/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
9
models/gaze14_1660ti_15/IntelGopDriver.inf
Normal file
9
models/gaze14_1660ti_15/IntelGopDriver.inf
Normal file
@ -0,0 +1,9 @@
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = IntelGopDriver
|
||||
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
|
||||
MODULE_TYPE = UEFI_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
[Binaries.X64]
|
||||
PE32|IntelGopDriver.efi|*
|
16
models/gaze14_1660ti_15/README.md
Normal file
16
models/gaze14_1660ti_15/README.md
Normal file
@ -0,0 +1,16 @@
|
||||
# System76 Gazelle (gaze14)
|
||||
|
||||
https://system76.com/guides/gaze14
|
||||
|
||||
## Contents
|
||||
|
||||
- [EC](./ec.rom)
|
||||
- Size: 128 KB
|
||||
- Model: NH50ED
|
||||
- Version: 1.07.03
|
||||
- [FD](./fd.rom)
|
||||
- Size: 4 KB
|
||||
- HAP: false
|
||||
- [ME](./me.rom)
|
||||
- Size: 6140 KB
|
||||
- Version: 12.0.35.1427
|
3
models/gaze14_1660ti_15/README.md.in
Normal file
3
models/gaze14_1660ti_15/README.md.in
Normal file
@ -0,0 +1,3 @@
|
||||
# System76 Gazelle (gaze14)
|
||||
|
||||
https://system76.com/guides/gaze14
|
1
models/gaze14_1660ti_15/chip.txt
Normal file
1
models/gaze14_1660ti_15/chip.txt
Normal file
@ -0,0 +1 @@
|
||||
GD25Q128C
|
278
models/gaze14_1660ti_15/coreboot-collector.txt
Normal file
278
models/gaze14_1660ti_15/coreboot-collector.txt
Normal file
@ -0,0 +1,278 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x3EC4, Revision 0x07
|
||||
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1901, Revision 0x07
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x3E9B, Revision 0x00
|
||||
PCI Device: 0000:00:12.0: Class 0x00118000, Vendor 0x8086, Device 0xA379, Revision 0x10
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0xA36D, Revision 0x10
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0xA36F, Revision 0x10
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0xA370, Revision 0x10
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0xA368, Revision 0x10
|
||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0xA369, Revision 0x10
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0xA360, Revision 0x10
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0xA353, Revision 0x10
|
||||
PCI Device: 0000:00:1b.0: Class 0x00060400, Vendor 0x8086, Device 0xA32C, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0xA330, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.6: Class 0x00060400, Vendor 0x8086, Device 0xA336, Revision 0xF0
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0xA30D, Revision 0x10
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0xA348, Revision 0x10
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0xA323, Revision 0x10
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0xA324, Revision 0x10
|
||||
PCI Device: 0000:08:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x5287, Revision 0x01
|
||||
PCI Device: 0000:08:00.1: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x12
|
||||
## GPIO ##
|
||||
300 Series PCH
|
||||
GPP_A0 (0x6E,0x00) 0x44000201 0x00000018 0x00000000 0x00000000
|
||||
GPP_A1 (0x6E,0x02) 0x44000402 0x00003019 0x00000000 0x00000000
|
||||
GPP_A2 (0x6E,0x04) 0x44000402 0x0000301a 0x00000000 0x00000000
|
||||
GPP_A3 (0x6E,0x06) 0x44000402 0x0000301b 0x00000000 0x00000000
|
||||
GPP_A4 (0x6E,0x08) 0x44000402 0x0000301c 0x00000000 0x00000000
|
||||
GPP_A5 (0x6E,0x0A) 0x44000600 0x0000101d 0x00000000 0x00000000
|
||||
GPP_A6 (0x6E,0x0C) 0x44000400 0x0000001e 0x00000000 0x00000000
|
||||
GPP_A7 (0x6E,0x0E) 0x80100100 0x0000001f 0x00000000 0x00000000
|
||||
GPP_A8 (0x6E,0x10) 0x44000700 0x00000020 0x00000000 0x00000000
|
||||
GPP_A9 (0x6E,0x12) 0x44000600 0x00001021 0x00000000 0x00000000
|
||||
GPP_A10 (0x6E,0x14) 0x44000500 0x00001022 0x00000000 0x00000000
|
||||
GPP_A11 (0x6E,0x16) 0x44000102 0x00003023 0x00000000 0x00000000
|
||||
GPP_A12 (0x6E,0x18) 0x44000102 0x00000024 0x00000000 0x00000000
|
||||
GPP_A13 (0x6E,0x1A) 0x44000600 0x00001025 0x00000000 0x00000000
|
||||
GPP_A14 (0x6E,0x1C) 0x44000600 0x00001026 0x00000000 0x00000000
|
||||
GPP_A15 (0x6E,0x1E) 0x44000500 0x00003027 0x00000000 0x00000000
|
||||
GPP_A16 (0x6E,0x20) 0x44000101 0x00001028 0x00000000 0x00000000
|
||||
GPP_A17 (0x6E,0x22) 0x44000103 0x00000029 0x00000000 0x00000000
|
||||
GPP_A18 (0x6E,0x24) 0x44000201 0x0000002a 0x00000000 0x00000000
|
||||
GPP_A19 (0x6E,0x26) 0x44000102 0x0000002b 0x00000000 0x00000000
|
||||
GPP_A20 (0x6E,0x28) 0x44000102 0x0000002c 0x00000000 0x00000000
|
||||
GPP_A21 (0x6E,0x2A) 0x44000103 0x0000002d 0x00000000 0x00000000
|
||||
GPP_A22 (0x6E,0x2C) 0x44000201 0x0000002e 0x00000000 0x00000000
|
||||
GPP_A23 (0x6E,0x2E) 0x44000102 0x0000002f 0x00000000 0x00000000
|
||||
GPP_B0 (0x6E,0x32) 0x44000102 0x00000030 0x00000000 0x00000000
|
||||
GPP_B1 (0x6E,0x34) 0x44000200 0x00000031 0x00000000 0x00000000
|
||||
GPP_B2 (0x6E,0x36) 0x44000200 0x00000032 0x00000000 0x00000000
|
||||
GPP_B3 (0x6E,0x38) 0x44000200 0x00000033 0x00000000 0x00000000
|
||||
GPP_B4 (0x6E,0x3A) 0x44000200 0x00003034 0x00000000 0x00000000
|
||||
GPP_B5 (0x6E,0x3C) 0x44000200 0x00000035 0x00000000 0x00000000
|
||||
GPP_B6 (0x6E,0x3E) 0x44000200 0x00000036 0x00000000 0x00000000
|
||||
GPP_B7 (0x6E,0x40) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_B8 (0x6E,0x42) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_B9 (0x6E,0x44) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_B10 (0x6E,0x46) 0x44000702 0x0000003a 0x00000000 0x00000000
|
||||
GPP_B11 (0x6E,0x48) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||
GPP_B12 (0x6E,0x4A) 0x44000601 0x0000003c 0x00000000 0x00000000
|
||||
GPP_B13 (0x6E,0x4C) 0x44000601 0x0000103d 0x00000000 0x00000000
|
||||
GPP_B14 (0x6E,0x4E) 0x44000600 0x0000003e 0x00000000 0x00000000
|
||||
GPP_B15 (0x6E,0x50) 0x44000200 0x0000003f 0x00000000 0x00000000
|
||||
GPP_B16 (0x6E,0x52) 0x44000200 0x00000040 0x00000000 0x00000000
|
||||
GPP_B17 (0x6E,0x54) 0x44000200 0x00000041 0x00000000 0x00000000
|
||||
GPP_B18 (0x6E,0x56) 0x44000500 0x00000042 0x00000000 0x00000000
|
||||
GPP_B19 (0x6E,0x58) 0x44000200 0x00000043 0x00000000 0x00000000
|
||||
GPP_B20 (0x6E,0x5A) 0x44000200 0x00000044 0x00000000 0x00000000
|
||||
GPP_B21 (0x6E,0x5C) 0x44000200 0x00000045 0x00000000 0x00000000
|
||||
GPP_B22 (0x6E,0x5E) 0x44000600 0x00000046 0x00000000 0x00000000
|
||||
GPP_B23 (0x6E,0x60) 0x44000102 0x00000047 0x00000000 0x00000000
|
||||
GPP_C0 (0x6D,0x00) 0x44000602 0x00000048 0x00000000 0x00000000
|
||||
GPP_C1 (0x6D,0x02) 0x44000402 0x00000049 0x00000000 0x00000000
|
||||
GPP_C2 (0x6D,0x04) 0x44000102 0x0000004a 0x00000800 0x00000000
|
||||
GPP_C3 (0x6D,0x06) 0x44000102 0x0000004b 0x00000000 0x00000000
|
||||
GPP_C4 (0x6D,0x08) 0x44000102 0x0000004c 0x00000000 0x00000000
|
||||
GPP_C5 (0x6D,0x0A) 0x44000000 0x0000004d 0x00000000 0x00000000
|
||||
GPP_C6 (0x6D,0x0C) 0x44000602 0x0000004e 0x00000000 0x00000000
|
||||
GPP_C7 (0x6D,0x0E) 0x44000402 0x0000004f 0x00000000 0x00000000
|
||||
GPP_C8 (0x6D,0x10) 0x44000200 0x00000050 0x00000000 0x00000000
|
||||
GPP_C9 (0x6D,0x12) 0x44000102 0x00000051 0x00000000 0x00000000
|
||||
GPP_C10 (0x6D,0x14) 0x44000200 0x00000052 0x00000000 0x00000000
|
||||
GPP_C11 (0x6D,0x16) 0x44000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_C12 (0x6D,0x18) 0x44000200 0x00000054 0x00000000 0x00000000
|
||||
GPP_C13 (0x6D,0x1A) 0x44000200 0x00000055 0x00000000 0x00000000
|
||||
GPP_C14 (0x6D,0x1C) 0x44000200 0x00000056 0x00000000 0x00000000
|
||||
GPP_C15 (0x6D,0x1E) 0x44000200 0x00000057 0x00000000 0x00000000
|
||||
GPP_C16 (0x6D,0x20) 0x84000402 0x00000058 0x00000000 0x00000000
|
||||
GPP_C17 (0x6D,0x22) 0x84000402 0x00000059 0x00000000 0x00000000
|
||||
GPP_C18 (0x6D,0x24) 0x84000402 0x0000005a 0x00000000 0x00000000
|
||||
GPP_C19 (0x6D,0x26) 0x84000402 0x0000005b 0x00000000 0x00000000
|
||||
GPP_C20 (0x6D,0x28) 0x44000502 0x0000005c 0x00000000 0x00000000
|
||||
GPP_C21 (0x6D,0x2A) 0x44000500 0x0000005d 0x00000000 0x00000000
|
||||
GPP_C22 (0x6D,0x2C) 0x44000600 0x0000005e 0x00000000 0x00000000
|
||||
GPP_C23 (0x6D,0x2E) 0x44000602 0x0000005f 0x00000000 0x00000000
|
||||
GPP_D0 (0x6D,0x30) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_D1 (0x6D,0x32) 0x44000200 0x00000061 0x00000000 0x00000000
|
||||
GPP_D2 (0x6D,0x34) 0x44000200 0x00000062 0x00000000 0x00000000
|
||||
GPP_D3 (0x6D,0x36) 0x44000200 0x00000063 0x00000000 0x00000000
|
||||
GPP_D4 (0x6D,0x38) 0x44000200 0x00000064 0x00000000 0x00000000
|
||||
GPP_D5 (0x6D,0x3A) 0x44000d00 0x00000065 0x00000000 0x00000000
|
||||
GPP_D6 (0x6D,0x3C) 0x44000d00 0x00000066 0x00000000 0x00000000
|
||||
GPP_D7 (0x6D,0x3E) 0x44000200 0x00000067 0x00000000 0x00000000
|
||||
GPP_D8 (0x6D,0x40) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_D9 (0x6D,0x42) 0x44000200 0x00000069 0x00000000 0x00000000
|
||||
GPP_D10 (0x6D,0x44) 0x44000200 0x0000006a 0x00000000 0x00000000
|
||||
GPP_D11 (0x6D,0x46) 0x44000200 0x0000006b 0x00000000 0x00000000
|
||||
GPP_D12 (0x6D,0x48) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_D13 (0x6D,0x4A) 0x44000200 0x0000006d 0x00000000 0x00000000
|
||||
GPP_D14 (0x6D,0x4C) 0x44000200 0x0000006e 0x00000000 0x00000000
|
||||
GPP_D15 (0x6D,0x4E) 0x44000200 0x0000006f 0x00000000 0x00000000
|
||||
GPP_D16 (0x6D,0x50) 0x44000200 0x00000070 0x00000000 0x00000000
|
||||
GPP_D17 (0x6D,0x52) 0x44000600 0x00000071 0x00000000 0x00000000
|
||||
GPP_D18 (0x6D,0x54) 0x44000600 0x00000072 0x00000000 0x00000000
|
||||
GPP_D19 (0x6D,0x56) 0x44000600 0x00000073 0x00000000 0x00000000
|
||||
GPP_D20 (0x6D,0x58) 0x44000600 0x00000074 0x00000000 0x00000000
|
||||
GPP_D21 (0x6D,0x5A) 0x44000200 0x00000075 0x00000000 0x00000000
|
||||
GPP_D22 (0x6D,0x5C) 0x44000200 0x00000076 0x00000000 0x00000000
|
||||
GPP_D23 (0x6D,0x5E) 0x44000200 0x00000077 0x00000000 0x00000000
|
||||
GPP_G0 (0x6D,0x60) 0x44000102 0x0000306c 0x00000000 0x00000000
|
||||
GPP_G1 (0x6D,0x62) 0x44000100 0x0000306d 0x00000000 0x00000000
|
||||
GPP_G2 (0x6D,0x64) 0x44000100 0x0000006e 0x00000000 0x00000000
|
||||
GPP_G3 (0x6D,0x66) 0x44000101 0x0000006f 0x00000000 0x00000000
|
||||
GPP_G4 (0x6D,0x68) 0x44000102 0x00000070 0x00000000 0x00000000
|
||||
GPP_G5 (0x6D,0x6A) 0x44000200 0x00000071 0x00000000 0x00000000
|
||||
GPP_G6 (0x6D,0x6C) 0x44000200 0x00000072 0x00000000 0x00000000
|
||||
GPP_G7 (0x6D,0x6E) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||
GPD0 (0x6C,0x00) 0x44000502 0x00000060 0x00000000 0x00000000
|
||||
GPD1 (0x6C,0x02) 0x44000502 0x00001061 0x00000000 0x00000000
|
||||
GPD2 (0x6C,0x04) 0x04000102 0x00001062 0x00000000 0x00000000
|
||||
GPD3 (0x6C,0x06) 0x44000502 0x00003063 0x00000010 0x00000000
|
||||
GPD4 (0x6C,0x08) 0x44000600 0x00001064 0x00000000 0x00000000
|
||||
GPD5 (0x6C,0x0A) 0x44000600 0x00001065 0x00000000 0x00000000
|
||||
GPD6 (0x6C,0x0C) 0x44000600 0x00001066 0x00000000 0x00000000
|
||||
GPD7 (0x6C,0x0E) 0x04000102 0x00000067 0x00000800 0x00000000
|
||||
GPD8 (0x6C,0x10) 0x44000600 0x00001068 0x00000000 0x00000000
|
||||
GPD9 (0x6C,0x12) 0x04000100 0x00001069 0x00000000 0x00000000
|
||||
GPD10 (0x6C,0x14) 0x04000601 0x0000106a 0x00000000 0x00000000
|
||||
GPD11 (0x6C,0x16) 0x44000200 0x0000106b 0x00000000 0x00000000
|
||||
GPP_K0 (0x6B,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_K1 (0x6B,0x02) 0x44000200 0x00000019 0x00000000 0x00000000
|
||||
GPP_K2 (0x6B,0x04) 0x44000200 0x0000001a 0x00000000 0x00000000
|
||||
GPP_K3 (0x6B,0x06) 0x40880102 0x0000001b 0x00000000 0x00000000
|
||||
GPP_K4 (0x6B,0x08) 0x44000200 0x0000001c 0x00000000 0x00000000
|
||||
GPP_K5 (0x6B,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
|
||||
GPP_K6 (0x6B,0x0C) 0x40880102 0x0000001e 0x00000000 0x00000000
|
||||
GPP_K7 (0x6B,0x0E) 0x44000200 0x0000001f 0x00000000 0x00000000
|
||||
GPP_K8 (0x6B,0x10) 0x44000201 0x00000020 0x00000000 0x00000000
|
||||
GPP_K9 (0x6B,0x12) 0x44000201 0x00000021 0x00000000 0x00000000
|
||||
GPP_K10 (0x6B,0x14) 0x44000200 0x00000022 0x00000000 0x00000000
|
||||
GPP_K11 (0x6B,0x16) 0x44000200 0x00000023 0x00000000 0x00000000
|
||||
GPP_K12 (0x6B,0x18) 0x44000200 0x00000024 0x00000000 0x00000000
|
||||
GPP_K13 (0x6B,0x1A) 0x44000200 0x00000025 0x00000000 0x00000000
|
||||
GPP_K14 (0x6B,0x1C) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_K15 (0x6B,0x1E) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_K16 (0x6B,0x20) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_K17 (0x6B,0x22) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_K18 (0x6B,0x24) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_K19 (0x6B,0x26) 0x42800103 0x0000002b 0x00000000 0x00000000
|
||||
GPP_K20 (0x6B,0x28) 0x44000201 0x0000002c 0x00000000 0x00000000
|
||||
GPP_K21 (0x6B,0x2A) 0x44000100 0x0000002d 0x00000000 0x00000000
|
||||
GPP_K22 (0x6B,0x2C) 0x44000101 0x0000002e 0x00000000 0x00000000
|
||||
GPP_K23 (0x6B,0x2E) 0x44000201 0x0000002f 0x00000000 0x00000000
|
||||
GPP_H0 (0x6B,0x30) 0x44000702 0x00000048 0x00000000 0x00000000
|
||||
GPP_H1 (0x6B,0x32) 0x44000200 0x00000049 0x00000000 0x00000000
|
||||
GPP_H2 (0x6B,0x34) 0x44000702 0x0000004a 0x00000000 0x00000000
|
||||
GPP_H3 (0x6B,0x36) 0x44000200 0x0000004b 0x00000000 0x00000000
|
||||
GPP_H4 (0x6B,0x38) 0x44000702 0x0000004c 0x00000000 0x00000000
|
||||
GPP_H5 (0x6B,0x3A) 0x44000102 0x0000104d 0x00000000 0x00000000
|
||||
GPP_H6 (0x6B,0x3C) 0x44000200 0x0000004e 0x00000000 0x00000000
|
||||
GPP_H7 (0x6B,0x3E) 0x44000200 0x0000004f 0x00000000 0x00000000
|
||||
GPP_H8 (0x6B,0x40) 0x44000200 0x00000050 0x00000000 0x00000000
|
||||
GPP_H9 (0x6B,0x42) 0x44000200 0x00000051 0x00000000 0x00000000
|
||||
GPP_H10 (0x6B,0x44) 0x44000200 0x00000052 0x00000000 0x00000000
|
||||
GPP_H11 (0x6B,0x46) 0x44000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_H12 (0x6B,0x48) 0x44000200 0x00000054 0x00000000 0x00000000
|
||||
GPP_H13 (0x6B,0x4A) 0x44000102 0x00000055 0x00000000 0x00000000
|
||||
GPP_H14 (0x6B,0x4C) 0x44000200 0x00000056 0x00000000 0x00000000
|
||||
GPP_H15 (0x6B,0x4E) 0x44000102 0x00000057 0x00000800 0x00000000
|
||||
GPP_H16 (0x6B,0x50) 0x44000200 0x00000058 0x00000000 0x00000000
|
||||
GPP_H17 (0x6B,0x52) 0x44000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_H18 (0x6B,0x54) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_H19 (0x6B,0x56) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_H20 (0x6B,0x58) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_H21 (0x6B,0x5A) 0x44000200 0x0000005d 0x00000000 0x00000000
|
||||
GPP_H22 (0x6B,0x5C) 0x44000200 0x0000005e 0x00000000 0x00000000
|
||||
GPP_H23 (0x6B,0x5E) 0x44000102 0x0000305f 0x00000000 0x00000000
|
||||
GPP_E0 (0x6B,0x60) 0x44000102 0x00000018 0x00000000 0x00000000
|
||||
GPP_E1 (0x6B,0x62) 0x44000500 0x00003019 0x00000000 0x00000000
|
||||
GPP_E2 (0x6B,0x64) 0x44000102 0x0000001a 0x00000000 0x00000000
|
||||
GPP_E3 (0x6B,0x66) 0x44000200 0x0000301b 0x00000000 0x00000000
|
||||
GPP_E4 (0x6B,0x68) 0x44000201 0x0000001c 0x00000000 0x00000000
|
||||
GPP_E5 (0x6B,0x6A) 0x44000200 0x0000001d 0x00000000 0x00000000
|
||||
GPP_E6 (0x6B,0x6C) 0x44000200 0x0000001e 0x00000000 0x00000000
|
||||
GPP_E7 (0x6B,0x6E) 0x80800102 0x0000001f 0x00000000 0x00000000
|
||||
GPP_E8 (0x6B,0x70) 0x44000600 0x00000020 0x00000000 0x00000000
|
||||
GPP_E9 (0x6B,0x72) 0x44000103 0x00003021 0x00000800 0x00000000
|
||||
GPP_E10 (0x6B,0x74) 0x44000503 0x00003022 0x00000800 0x00000000
|
||||
GPP_E11 (0x6B,0x76) 0x44000503 0x00003023 0x00000800 0x00000000
|
||||
GPP_E12 (0x6B,0x78) 0x44000503 0x00003024 0x00000000 0x00000000
|
||||
GPP_F0 (0x6B,0x7A) 0x44000200 0x00000030 0x00000000 0x00000000
|
||||
GPP_F1 (0x6B,0x7C) 0x44000200 0x00000031 0x00000000 0x00000000
|
||||
GPP_F2 (0x6B,0x7E) 0x44000200 0x00000032 0x00000000 0x00000000
|
||||
GPP_F3 (0x6B,0x80) 0x44000200 0x00000033 0x00000000 0x00000000
|
||||
GPP_F4 (0x6B,0x82) 0x44000200 0x00000034 0x00000000 0x00000000
|
||||
GPP_F5 (0x6B,0x84) 0x44000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_F6 (0x6B,0x86) 0x44000103 0x00000036 0x00000000 0x00000000
|
||||
GPP_F7 (0x6B,0x88) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_F8 (0x6B,0x8A) 0x44000201 0x00000038 0x00000000 0x00000000
|
||||
GPP_F9 (0x6B,0x8C) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_F10 (0x6B,0x8E) 0x44000102 0x0000003a 0x00000000 0x00000000
|
||||
GPP_F11 (0x6B,0x90) 0x44000102 0x0000003b 0x00000000 0x00000000
|
||||
GPP_F12 (0x6B,0x92) 0x44000102 0x0000003c 0x00000000 0x00000000
|
||||
GPP_F13 (0x6B,0x94) 0x44000100 0x0000003d 0x00000000 0x00000000
|
||||
GPP_F14 (0x6B,0x96) 0x44000100 0x0000003e 0x00000000 0x00000000
|
||||
GPP_F15 (0x6B,0x98) 0x44000503 0x0000303f 0x00000000 0x00000000
|
||||
GPP_F16 (0x6B,0x9A) 0x44000503 0x00003040 0x00000000 0x00000000
|
||||
GPP_F17 (0x6B,0x9C) 0x44000503 0x00003041 0x00000000 0x00000000
|
||||
GPP_F18 (0x6B,0x9E) 0x44000503 0x00003042 0x00000000 0x00000000
|
||||
GPP_F19 (0x6B,0xA0) 0x44000500 0x00000043 0x00000000 0x00000000
|
||||
GPP_F20 (0x6B,0xA2) 0x44000500 0x00000044 0x00000000 0x00000000
|
||||
GPP_F21 (0x6B,0xA4) 0x44000500 0x00000045 0x00000000 0x00000000
|
||||
GPP_F22 (0x6B,0xA6) 0x84000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_F23 (0x6B,0xA8) 0x44000200 0x00000047 0x00000000 0x00000000
|
||||
GPP_I0 (0x6A,0x28) 0x44000500 0x00000030 0x00000000 0x00000000
|
||||
GPP_I1 (0x6A,0x2A) 0x46880100 0x00000031 0x00000000 0x00000000
|
||||
GPP_I2 (0x6A,0x2C) 0x44000502 0x00000032 0x00000000 0x00000000
|
||||
GPP_I3 (0x6A,0x2E) 0x46880100 0x00000033 0x00000000 0x00000000
|
||||
GPP_I4 (0x6A,0x30) 0x44000502 0x00000034 0x00000000 0x00000000
|
||||
GPP_I5 (0x6A,0x32) 0x44000602 0x00000035 0x00000000 0x00000000
|
||||
GPP_I6 (0x6A,0x34) 0x44000402 0x00000036 0x00000800 0x00000000
|
||||
GPP_I7 (0x6A,0x36) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_I8 (0x6A,0x38) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_I9 (0x6A,0x3A) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_I10 (0x6A,0x3C) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_I11 (0x6A,0x3E) 0x44000100 0x0000003b 0x00000000 0x00000000
|
||||
GPP_I12 (0x6A,0x40) 0x44000200 0x0000003c 0x00000000 0x00000000
|
||||
GPP_I13 (0x6A,0x42) 0x44000200 0x0000003d 0x00000000 0x00000000
|
||||
GPP_I14 (0x6A,0x44) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_J0 (0x6A,0x4C) 0x44000500 0x00000025 0x00000000 0x00000000
|
||||
GPP_J1 (0x6A,0x4E) 0x44000102 0x00000026 0x00000000 0x00000000
|
||||
GPP_J2 (0x6A,0x50) 0x44000100 0x00000027 0x00000000 0x00000000
|
||||
GPP_J3 (0x6A,0x52) 0x44000100 0x00000028 0x00000000 0x00000000
|
||||
GPP_J4 (0x6A,0x54) 0x44000500 0x00000029 0x00000800 0x00000000
|
||||
GPP_J5 (0x6A,0x56) 0x44000502 0x0000302a 0x00000000 0x00000000
|
||||
GPP_J6 (0x6A,0x58) 0x44000500 0x0000002b 0x00000000 0x00000000
|
||||
GPP_J7 (0x6A,0x5A) 0x44000502 0x0000302c 0x00000000 0x00000000
|
||||
GPP_J8 (0x6A,0x5C) 0x44000500 0x0000002d 0x00000000 0x00000000
|
||||
GPP_J9 (0x6A,0x5E) 0x44000500 0x0000002e 0x00000000 0x00000000
|
||||
GPP_J10 (0x6A,0x60) 0x44000200 0x0000002f 0x00000000 0x00000000
|
||||
GPP_J11 (0x6A,0x62) 0x44000100 0x00001030 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC293
|
||||
vendor_id: 0x10ec0293
|
||||
subsystem_id: 0x15588550
|
||||
revision_id: 0x100003
|
||||
0x12: 0x90a60130
|
||||
0x13: 0x40000000
|
||||
0x14: 0x90170110
|
||||
0x15: 0x02211020
|
||||
0x16: 0x411111f0
|
||||
0x18: 0x02a11040
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x40738205
|
||||
0x1e: 0x411111f0
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Kabylake HDMI
|
||||
vendor_id: 0x8086280b
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x05: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x07: 0x18560010
|
868
models/gaze14_1660ti_15/coreboot.config
Normal file
868
models/gaze14_1660ti_15/coreboot.config
Normal file
@ -0,0 +1,868 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
CONFIG_CCACHE=y
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
||||
CONFIG_USE_BLOBS=y
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
# CONFIG_NO_RELOCATABLE_RAMSTAGE is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
# CONFIG_RAMPAYLOAD is not set
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_CAVIUM is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
# CONFIG_VENDOR_FACEBOOK is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
# CONFIG_VENDOR_HP is not set
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LENOVO is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SCALEWAY is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SIFIVE is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="system76/cfl-h"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="gaze14"
|
||||
CONFIG_MAX_CPUS=12
|
||||
CONFIG_CBFS_SIZE=0xA00000
|
||||
CONFIG_UART_FOR_CONSOLE=2
|
||||
CONFIG_MAINBOARD_VENDOR="System76"
|
||||
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
||||
CONFIG_DIMM_SPD_SIZE=512
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
|
||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="System76"
|
||||
CONFIG_VARIANT_DIR="gaze14_1660ti_15"
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_INTEL_GMA_VBT_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/vbt.rom"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
# CONFIG_POST_IO is not set
|
||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_LEN=0x0
|
||||
CONFIG_CPU_MICROCODE_CBFS_LOC=0x0
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_DIMM_MAX=2
|
||||
CONFIG_TTYS0_LCS=3
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Gazelle"
|
||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_ADD_FSP_BINARIES=y
|
||||
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
|
||||
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_MAINBOARD_VERSION="gaze14"
|
||||
CONFIG_DRIVERS_PS2_KEYBOARD=y
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_HEAP_SIZE=0x8000
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
||||
CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15=y
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x8550
|
||||
CONFIG_CONSOLE_POST=y
|
||||
CONFIG_PXE_ROM_ID="10ec,8168"
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=16384
|
||||
CONFIG_ROM_SIZE=0x1000000
|
||||
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
||||
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
||||
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
|
||||
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
||||
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# CONFIG_SYSTEM_TYPE_TABLET is not set
|
||||
# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
|
||||
# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe032000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=216
|
||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
# CONFIG_SOC_CAVIUM_COMMON is not set
|
||||
# CONFIG_SOC_INTEL_GLK is not set
|
||||
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/Include/"
|
||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/FSP.fd"
|
||||
# CONFIG_NHLT_DMIC_1CH_16B is not set
|
||||
# CONFIG_NHLT_DMIC_2CH_16B is not set
|
||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
||||
# CONFIG_NHLT_MAX98357 is not set
|
||||
# CONFIG_NHLT_DA7219 is not set
|
||||
CONFIG_IFD_CHIPSET="cnl"
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
|
||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=4
|
||||
# CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
CONFIG_TTYS0_BASE=0x3e8
|
||||
CONFIG_SOC_INTEL_CANNONLAKE=y
|
||||
CONFIG_SOC_INTEL_COMMON_CANNONLAKE_BASE=y
|
||||
CONFIG_SOC_INTEL_COFFEELAKE=y
|
||||
# CONFIG_SOC_INTEL_WHISKEYLAKE is not set
|
||||
# CONFIG_SOC_INTEL_COMETLAKE is not set
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_PCH_H=y
|
||||
# CONFIG_NHLT_MAX98373 is not set
|
||||
CONFIG_MAX_ROOT_PORTS=24
|
||||
CONFIG_MAX_PCIE_CLOCKS=16
|
||||
# CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE is not set
|
||||
# CONFIG_USE_CANNONLAKE_CAR_NEM_ENHANCED is not set
|
||||
CONFIG_USE_CANNONLAKE_FSP_CAR=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT=0
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
||||
CONFIG_SOC_INTEL_COMMON=y
|
||||
|
||||
#
|
||||
# Intel SoC Common Code
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_CAR is not set
|
||||
# CONFIG_INTEL_CAR_NEM is not set
|
||||
# CONFIG_INTEL_CAR_CQOS is not set
|
||||
# CONFIG_INTEL_CAR_NEM_ENHANCED is not set
|
||||
|
||||
#
|
||||
# Multiple Processor (MP) Initialization Options
|
||||
#
|
||||
CONFIG_USE_COREBOOT_NATIVE_MP_INIT=y
|
||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_EBDA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
||||
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
||||
# CONFIG_PMC_INVALID_READ_AFTER_WRITE is not set
|
||||
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_AHCI_PORT_IMPLEMENTED_INVERT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SA_PCIEX_LENGTH=0x10000000
|
||||
# CONFIG_SA_ENABLE_IMR is not set
|
||||
# CONFIG_SA_ENABLE_DPR is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG is not set
|
||||
|
||||
#
|
||||
# Intel SoC Common PCH Code
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
||||
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
||||
CONFIG_PCH_SPECIFIC_OPTIONS=y
|
||||
|
||||
#
|
||||
# Intel SoC Common coreboot stages
|
||||
#
|
||||
# CONFIG_DISPLAY_SMM_MEMORY_MAP is not set
|
||||
CONFIG_SOC_INTEL_COMMON_RESET=y
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
# CONFIG_ACPI_CONSOLE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
||||
# CONFIG_SOC_UCB_RISCV is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
||||
CONFIG_CPU_INTEL_COMMON=y
|
||||
CONFIG_ENABLE_VMX=y
|
||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
||||
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
||||
# CONFIG_CPU_TI_AM335X is not set
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
||||
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
CONFIG_NO_CAR_GLOBAL_MIGRATION=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_AMD_SB_CIMX is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
# CONFIG_EC_GOOGLE_WILCO is not set
|
||||
CONFIG_EC_BASE_ACPI_DATA=0x930
|
||||
CONFIG_EC_BASE_ACPI_COMMAND=0x934
|
||||
CONFIG_EC_BASE_HOST_DATA=0x940
|
||||
CONFIG_EC_BASE_HOST_COMMAND=0x944
|
||||
CONFIG_EC_BASE_PACKET=0x950
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
|
||||
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
|
||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
# CONFIG_CAVIUM_BDK is not set
|
||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
CONFIG_UDK_2017_BINDING=y
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
CONFIG_UDK_2015_VERSION=2015
|
||||
CONFIG_UDK_2017_VERSION=2017
|
||||
CONFIG_UDK_VERSION=2017
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
# CONFIG_ARCH_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_USE_ARCH_TIMER is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_PPC64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_PPC64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_PPC64 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_RISCV_M is not set
|
||||
# CONFIG_ARCH_RISCV_S is not set
|
||||
# CONFIG_ARCH_RISCV_U is not set
|
||||
# CONFIG_ARCH_RISCV_RV64 is not set
|
||||
# CONFIG_ARCH_RISCV_RV32 is not set
|
||||
# CONFIG_ARCH_RISCV_PMP is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
# CONFIG_RISCV_USE_ARCH_TIMER is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_POSTCAR_X86_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
|
||||
# CONFIG_USE_MARCH_586 is not set
|
||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
||||
CONFIG_RAMBASE=0xe00000
|
||||
CONFIG_RAMTOP=0x1000000
|
||||
# CONFIG_CBMEM_TOP_BACKUP is not set
|
||||
CONFIG_EARLY_EBDA_INIT=y
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
# CONFIG_HPET_ADDRESS_OVERRIDE is not set
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
CONFIG_IDT_IN_EVERY_STAGE=y
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_FSP_GOP=y
|
||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
CONFIG_RUN_FSP_GOP=y
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_LINEAR_FRAMEBUFFER=y
|
||||
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
|
||||
CONFIG_PCI=y
|
||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
||||
CONFIG_MMCONF_SUPPORT=y
|
||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SMMSTORE=y
|
||||
# CONFIG_SMMSTORE_IN_CBFS is not set
|
||||
CONFIG_SMMSTORE_REGION="SMMSTORE"
|
||||
CONFIG_SMMSTORE_FILENAME="smm_store"
|
||||
CONFIG_SMMSTORE_SIZE=0x40000
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||
CONFIG_SPI_FLASH_SMM=y
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_SPI_FLASH_ADESTO=y
|
||||
CONFIG_SPI_FLASH_AMIC=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
CONFIG_DRIVERS_UART=y
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
CONFIG_DRIVERS_UART_8250MEM=y
|
||||
CONFIG_DRIVERS_UART_8250MEM_32=y
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
# CONFIG_HAVE_USBDEBUG is not set
|
||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_DRIVERS_I2C_SX9310 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
CONFIG_FSP_USE_REPO=y
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
# CONFIG_PLATFORM_USES_FSP2_1 is not set
|
||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
CONFIG_FSP_T_CBFS="fspt.bin"
|
||||
CONFIG_FSP_T_FILE="$(obj)/Fsp_T.fd"
|
||||
CONFIG_FSP_CAR=y
|
||||
CONFIG_FSP_T_XIP=y
|
||||
# CONFIG_FSP_USES_CB_STACK is not set
|
||||
# CONFIG_VERIFY_HOBS is not set
|
||||
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
# CONFIG_INTEL_EDID is not set
|
||||
# CONFIG_INTEL_INT15 is not set
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
# CONFIG_LPC_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
|
||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVERS_USB_ACPI is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
CONFIG_USER_NO_TPM=y
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||
CONFIG_POSTCAR_CONSOLE=y
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
CONFIG_CONSOLE_SERIAL=y
|
||||
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
||||
|
||||
#
|
||||
# memory mapped, 8250-compatible
|
||||
#
|
||||
|
||||
#
|
||||
# Serial port base address = 0x3e8
|
||||
#
|
||||
# CONFIG_CONSOLE_SERIAL_921600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_460800 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_230400 is not set
|
||||
CONFIG_CONSOLE_SERIAL_115200=y
|
||||
# CONFIG_CONSOLE_SERIAL_57600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_38400 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_19200 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_9600 is not set
|
||||
CONFIG_TTYS0_BAUD=115200
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
# CONFIG_NO_POST is not set
|
||||
# CONFIG_CMOS_POST is not set
|
||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
# CONFIG_HAVE_OPTION_TABLE is not set
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
||||
# CONFIG_GFXUMA is not set
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_COMMON_FADT=y
|
||||
CONFIG_ACPI_NHLT=y
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
# CONFIG_GENERATE_MP_TABLE is not set
|
||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BAYOU is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
# CONFIG_PAYLOAD_YABITS is not set
|
||||
# CONFIG_PAYLOAD_LINUX is not set
|
||||
CONFIG_PAYLOAD_TIANOCORE=y
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_TIANOCORE_STABLE=y
|
||||
# CONFIG_TIANOCORE_REVISION is not set
|
||||
# CONFIG_TIANOCORE_TARGET_IA32 is not set
|
||||
CONFIG_TIANOCORE_TARGET_X64=y
|
||||
# CONFIG_TIANOCORE_DEBUG is not set
|
||||
CONFIG_TIANOCORE_RELEASE=y
|
||||
# CONFIG_TIANOCORE_USE_8254_TIMER is not set
|
||||
# CONFIG_TIANOCORE_BOOTSPLASH_IMAGE is not set
|
||||
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
|
||||
# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
|
||||
#
|
||||
# CPU Debug Settings
|
||||
#
|
||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
# CONFIG_DEBUG_SMM_RELOCATION is not set
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
#
|
||||
# CONFIG_GDB_STUB is not set
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
CONFIG_HAVE_DEBUG_GPIO=y
|
||||
# CONFIG_DEBUG_GPIO is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
|
||||
# CONFIG_HAVE_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
CONFIG_NO_EDID_FILL_FB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
||||
CONFIG_REG_SCRIPT=y
|
||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y
|
BIN
models/gaze14_1660ti_15/ec.rom
(Stored with Git LFS)
Normal file
BIN
models/gaze14_1660ti_15/ec.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/gaze14_1660ti_15/fd.rom
(Stored with Git LFS)
Normal file
BIN
models/gaze14_1660ti_15/fd.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
258
models/gaze14_1660ti_15/gpio.h
Normal file
258
models/gaze14_1660ti_15/gpio.h
Normal file
@ -0,0 +1,258 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2019 System76
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef MAINBOARD_GPIO_H
|
||||
#define MAINBOARD_GPIO_H
|
||||
|
||||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
#ifndef __ACPI__
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
static const struct pad_config gpio_table[] = {
|
||||
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD1, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD2, DN_20K, PWROK),
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD4, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD5, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD6, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD7, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD8, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD9, DN_20K, PWROK),
|
||||
_PAD_CFG_STRUCT(GPD10, 0x04000601, 0x1000),
|
||||
PAD_CFG_TERM_GPO(GPD11, 0, DN_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A0, 1, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_A7, 0x80100100, 0x0000),
|
||||
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A13, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A14, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_A16, 0x44000101, 0x1000),
|
||||
_PAD_CFG_STRUCT(GPP_A17, 0x44000101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A20, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_A21, 0x44000101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_A22, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B1, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B2, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B3, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B4, 0, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B5, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B6, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B8, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B9, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_B11, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_B12, 0x44000601, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_B13, 0x44000601, 0x1000),
|
||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_B15, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B16, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B17, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_B19, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B20, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B21, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B22, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C5, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_C8, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C9, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C10, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C11, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C12, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C13, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C14, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C15, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C18, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C19, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_D0, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D1, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D2, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D3, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D4, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
|
||||
PAD_CFG_TERM_GPO(GPP_D7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D8, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D9, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D10, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D11, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D12, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D13, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D14, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D15, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D16, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_D21, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D22, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D23, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_E3, 0, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_E4, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_E5, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_E6, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_E7, 0x80800100, 0x0000),
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_E9, 0x44000101, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_E10, 0x44000501, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_E11, 0x44000501, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_E12, 0x44000501, 0x3000),
|
||||
PAD_CFG_TERM_GPO(GPP_F0, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F1, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F2, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F3, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F4, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F5, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_F6, 0x44000101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_F7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F8, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F9, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_F15, 0x44000501, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_F16, 0x44000501, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_F17, 0x44000501, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_F18, 0x44000501, 0x3000),
|
||||
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_F22, 0, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_F23, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G0, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G1, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_G3, 0x44000101, 0x0000),
|
||||
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_G5, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_G6, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_G7, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_H1, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_H3, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H5, DN_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H6, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H8, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H9, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H10, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H11, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H12, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H14, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H16, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H17, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H18, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H19, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H20, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H21, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H22, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H23, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_I0, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_I1, 0x46880100, 0x0000),
|
||||
PAD_CFG_NF(GPP_I2, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_I3, 0x46880100, 0x0000),
|
||||
PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_I5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_I6, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_I7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I8, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I9, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I10, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I12, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I13, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I14, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_J1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J3, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J9, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_J10, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J11, DN_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K0, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K1, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K2, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K3, 0x40880100, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_K4, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K5, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_K7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K8, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K9, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K10, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K11, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K12, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K13, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K14, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K15, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K16, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K17, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K18, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K19, 0x42800101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_K20, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K21, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K22, 0x44000101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_K23, 1, NONE, DEEP),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
BIN
models/gaze14_1660ti_15/me.rom
(Stored with Git LFS)
Normal file
BIN
models/gaze14_1660ti_15/me.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/gaze14_1660ti_15/microcode.rom
(Stored with Git LFS)
Normal file
BIN
models/gaze14_1660ti_15/microcode.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/gaze14_1660ti_15/vbt.rom
(Stored with Git LFS)
Normal file
BIN
models/gaze14_1660ti_15/vbt.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/gaze14_1660ti_15/vbt2.rom
(Stored with Git LFS)
Normal file
BIN
models/gaze14_1660ti_15/vbt2.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
12
models/gaze14_1660ti_17/README.md
Normal file
12
models/gaze14_1660ti_17/README.md
Normal file
@ -0,0 +1,12 @@
|
||||
# System76 Gazelle (gaze14)
|
||||
|
||||
https://system76.com/guides/gaze14
|
||||
|
||||
## Contents
|
||||
|
||||
- [EC](./ec.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [FD](./fd.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [ME](./me.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
3
models/gaze14_1660ti_17/README.md.in
Normal file
3
models/gaze14_1660ti_17/README.md.in
Normal file
@ -0,0 +1,3 @@
|
||||
# System76 Gazelle (gaze14)
|
||||
|
||||
https://system76.com/guides/gaze14
|
292
models/gaze14_1660ti_17/coreboot-collector.txt
Normal file
292
models/gaze14_1660ti_17/coreboot-collector.txt
Normal file
@ -0,0 +1,292 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x3EC4, Revision 0x07
|
||||
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1901, Revision 0x07
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x3E9B, Revision 0x00
|
||||
PCI Device: 0000:00:12.0: Class 0x00118000, Vendor 0x8086, Device 0xA379, Revision 0x10
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0xA36D, Revision 0x10
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0xA36F, Revision 0x10
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0xA370, Revision 0x10
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0xA368, Revision 0x10
|
||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0xA369, Revision 0x10
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0xA360, Revision 0x10
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0xA353, Revision 0x10
|
||||
PCI Device: 0000:00:1b.0: Class 0x00060400, Vendor 0x8086, Device 0xA32C, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0xA330, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.6: Class 0x00060400, Vendor 0x8086, Device 0xA336, Revision 0xF0
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0xA30D, Revision 0x10
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0xA348, Revision 0x10
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0xA323, Revision 0x10
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0xA324, Revision 0x10
|
||||
PCI Device: 0000:01:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x2191, Revision 0xA1
|
||||
PCI Device: 0000:01:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x1AEB, Revision 0xA1
|
||||
PCI Device: 0000:01:00.2: Class 0x000C0330, Vendor 0x10DE, Device 0x1AEC, Revision 0xA1
|
||||
PCI Device: 0000:01:00.3: Class 0x000C8000, Vendor 0x10DE, Device 0x1AED, Revision 0xA1
|
||||
PCI Device: 0000:08:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x5287, Revision 0x01
|
||||
PCI Device: 0000:08:00.1: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x12
|
||||
## GPIO ##
|
||||
300 Series PCH
|
||||
GPP_A0 (0x6E,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_A1 (0x6E,0x02) 0x44000402 0x00003019 0x00000000 0x00000000
|
||||
GPP_A2 (0x6E,0x04) 0x44000402 0x0000301a 0x00000000 0x00000000
|
||||
GPP_A3 (0x6E,0x06) 0x44000402 0x0000301b 0x00000000 0x00000000
|
||||
GPP_A4 (0x6E,0x08) 0x44000402 0x0000301c 0x00000000 0x00000000
|
||||
GPP_A5 (0x6E,0x0A) 0x44000600 0x0000101d 0x00000000 0x00000000
|
||||
GPP_A6 (0x6E,0x0C) 0x44000402 0x0000001e 0x00000000 0x00000000
|
||||
GPP_A7 (0x6E,0x0E) 0x80100100 0x0000001f 0x00000000 0x00000000
|
||||
GPP_A8 (0x6E,0x10) 0x44000700 0x00000020 0x00000000 0x00000000
|
||||
GPP_A9 (0x6E,0x12) 0x44000600 0x00001021 0x00000000 0x00000000
|
||||
GPP_A10 (0x6E,0x14) 0x44000500 0x00001022 0x00000000 0x00000000
|
||||
GPP_A11 (0x6E,0x16) 0x44000102 0x00003023 0x00000000 0x00000000
|
||||
GPP_A12 (0x6E,0x18) 0x44000102 0x00000024 0x00000000 0x00000000
|
||||
GPP_A13 (0x6E,0x1A) 0x44000600 0x00001025 0x00000000 0x00000000
|
||||
GPP_A14 (0x6E,0x1C) 0x44000600 0x00001026 0x00000000 0x00000000
|
||||
GPP_A15 (0x6E,0x1E) 0x44000500 0x00003027 0x00000000 0x00000000
|
||||
GPP_A16 (0x6E,0x20) 0x44000101 0x00001028 0x00000000 0x00000000
|
||||
GPP_A17 (0x6E,0x22) 0x44000103 0x00000029 0x00000000 0x00000000
|
||||
GPP_A18 (0x6E,0x24) 0x44000201 0x0000002a 0x00000000 0x00000000
|
||||
GPP_A19 (0x6E,0x26) 0x44000102 0x0000002b 0x00000000 0x00000000
|
||||
GPP_A20 (0x6E,0x28) 0x44000102 0x0000002c 0x00000000 0x00000000
|
||||
GPP_A21 (0x6E,0x2A) 0x44000103 0x0000002d 0x00000000 0x00000000
|
||||
GPP_A22 (0x6E,0x2C) 0x44000201 0x0000002e 0x00000000 0x00000000
|
||||
GPP_A23 (0x6E,0x2E) 0x44000102 0x0000002f 0x00000000 0x00000000
|
||||
GPP_B0 (0x6E,0x32) 0x44000102 0x00000030 0x00000000 0x00000000
|
||||
GPP_B1 (0x6E,0x34) 0x44000200 0x00000031 0x00000000 0x00000000
|
||||
GPP_B2 (0x6E,0x36) 0x44000200 0x00000032 0x00000000 0x00000000
|
||||
GPP_B3 (0x6E,0x38) 0x44000200 0x00000033 0x00000000 0x00000000
|
||||
GPP_B4 (0x6E,0x3A) 0x44000200 0x00003034 0x00000000 0x00000000
|
||||
GPP_B5 (0x6E,0x3C) 0x44000200 0x00000035 0x00000000 0x00000000
|
||||
GPP_B6 (0x6E,0x3E) 0x44000200 0x00000036 0x00000000 0x00000000
|
||||
GPP_B7 (0x6E,0x40) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_B8 (0x6E,0x42) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_B9 (0x6E,0x44) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_B10 (0x6E,0x46) 0x44000702 0x0000003a 0x00000000 0x00000000
|
||||
GPP_B11 (0x6E,0x48) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||
GPP_B12 (0x6E,0x4A) 0x44000601 0x0000003c 0x00000000 0x00000000
|
||||
GPP_B13 (0x6E,0x4C) 0x44000601 0x0000103d 0x00000000 0x00000000
|
||||
GPP_B14 (0x6E,0x4E) 0x44000600 0x0000003e 0x00000000 0x00000000
|
||||
GPP_B15 (0x6E,0x50) 0x44000200 0x0000003f 0x00000000 0x00000000
|
||||
GPP_B16 (0x6E,0x52) 0x44000200 0x00000040 0x00000000 0x00000000
|
||||
GPP_B17 (0x6E,0x54) 0x44000200 0x00000041 0x00000000 0x00000000
|
||||
GPP_B18 (0x6E,0x56) 0x44000500 0x00000042 0x00000000 0x00000000
|
||||
GPP_B19 (0x6E,0x58) 0x44000200 0x00000043 0x00000000 0x00000000
|
||||
GPP_B20 (0x6E,0x5A) 0x44000200 0x00000044 0x00000000 0x00000000
|
||||
GPP_B21 (0x6E,0x5C) 0x44000200 0x00000045 0x00000000 0x00000000
|
||||
GPP_B22 (0x6E,0x5E) 0x44000600 0x00000046 0x00000000 0x00000000
|
||||
GPP_B23 (0x6E,0x60) 0x44000102 0x00000047 0x00000000 0x00000000
|
||||
GPP_C0 (0x6D,0x00) 0x44000602 0x00000048 0x00000000 0x00000000
|
||||
GPP_C1 (0x6D,0x02) 0x44000402 0x00000049 0x00000000 0x00000000
|
||||
GPP_C2 (0x6D,0x04) 0x44000102 0x0000004a 0x00000800 0x00000000
|
||||
GPP_C3 (0x6D,0x06) 0x44000102 0x0000004b 0x00000000 0x00000000
|
||||
GPP_C4 (0x6D,0x08) 0x44000102 0x0000004c 0x00000000 0x00000000
|
||||
GPP_C5 (0x6D,0x0A) 0x44000000 0x0000004d 0x00000000 0x00000000
|
||||
GPP_C6 (0x6D,0x0C) 0x44000602 0x0000004e 0x00000000 0x00000000
|
||||
GPP_C7 (0x6D,0x0E) 0x44000402 0x0000004f 0x00000000 0x00000000
|
||||
GPP_C8 (0x6D,0x10) 0x44000200 0x00000050 0x00000000 0x00000000
|
||||
GPP_C9 (0x6D,0x12) 0x44000102 0x00000051 0x00000000 0x00000000
|
||||
GPP_C10 (0x6D,0x14) 0x44000200 0x00000052 0x00000000 0x00000000
|
||||
GPP_C11 (0x6D,0x16) 0x44000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_C12 (0x6D,0x18) 0x44000200 0x00000054 0x00000000 0x00000000
|
||||
GPP_C13 (0x6D,0x1A) 0x44000200 0x00000055 0x00000000 0x00000000
|
||||
GPP_C14 (0x6D,0x1C) 0x44000200 0x00000056 0x00000000 0x00000000
|
||||
GPP_C15 (0x6D,0x1E) 0x44000200 0x00000057 0x00000000 0x00000000
|
||||
GPP_C16 (0x6D,0x20) 0x84000402 0x00000058 0x00000000 0x00000000
|
||||
GPP_C17 (0x6D,0x22) 0x84000402 0x00000059 0x00000000 0x00000000
|
||||
GPP_C18 (0x6D,0x24) 0x84000402 0x0000005a 0x00000000 0x00000000
|
||||
GPP_C19 (0x6D,0x26) 0x84000402 0x0000005b 0x00000000 0x00000000
|
||||
GPP_C20 (0x6D,0x28) 0x44000502 0x0000005c 0x00000000 0x00000000
|
||||
GPP_C21 (0x6D,0x2A) 0x44000500 0x0000005d 0x00000000 0x00000000
|
||||
GPP_C22 (0x6D,0x2C) 0x44000600 0x0000005e 0x00000000 0x00000000
|
||||
GPP_C23 (0x6D,0x2E) 0x44000602 0x0000005f 0x00000000 0x00000000
|
||||
GPP_D0 (0x6D,0x30) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_D1 (0x6D,0x32) 0x44000200 0x00000061 0x00000000 0x00000000
|
||||
GPP_D2 (0x6D,0x34) 0x44000200 0x00000062 0x00000000 0x00000000
|
||||
GPP_D3 (0x6D,0x36) 0x44000200 0x00000063 0x00000000 0x00000000
|
||||
GPP_D4 (0x6D,0x38) 0x44000200 0x00000064 0x00000000 0x00000000
|
||||
GPP_D5 (0x6D,0x3A) 0x44000d00 0x00000065 0x00000000 0x00000000
|
||||
GPP_D6 (0x6D,0x3C) 0x44000d00 0x00000066 0x00000000 0x00000000
|
||||
GPP_D7 (0x6D,0x3E) 0x44000200 0x00000067 0x00000000 0x00000000
|
||||
GPP_D8 (0x6D,0x40) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_D9 (0x6D,0x42) 0x44000200 0x00000069 0x00000000 0x00000000
|
||||
GPP_D10 (0x6D,0x44) 0x44000200 0x0000006a 0x00000000 0x00000000
|
||||
GPP_D11 (0x6D,0x46) 0x44000200 0x0000006b 0x00000000 0x00000000
|
||||
GPP_D12 (0x6D,0x48) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_D13 (0x6D,0x4A) 0x44000200 0x0000006d 0x00000000 0x00000000
|
||||
GPP_D14 (0x6D,0x4C) 0x44000200 0x0000006e 0x00000000 0x00000000
|
||||
GPP_D15 (0x6D,0x4E) 0x44000200 0x0000006f 0x00000000 0x00000000
|
||||
GPP_D16 (0x6D,0x50) 0x44000200 0x00000070 0x00000000 0x00000000
|
||||
GPP_D17 (0x6D,0x52) 0x44000600 0x00000071 0x00000000 0x00000000
|
||||
GPP_D18 (0x6D,0x54) 0x44000600 0x00000072 0x00000000 0x00000000
|
||||
GPP_D19 (0x6D,0x56) 0x44000600 0x00000073 0x00000000 0x00000000
|
||||
GPP_D20 (0x6D,0x58) 0x44000600 0x00000074 0x00000000 0x00000000
|
||||
GPP_D21 (0x6D,0x5A) 0x44000200 0x00000075 0x00000000 0x00000000
|
||||
GPP_D22 (0x6D,0x5C) 0x44000200 0x00000076 0x00000000 0x00000000
|
||||
GPP_D23 (0x6D,0x5E) 0x44000200 0x00000077 0x00000000 0x00000000
|
||||
GPP_G0 (0x6D,0x60) 0x44000100 0x0000306c 0x00000000 0x00000000
|
||||
GPP_G1 (0x6D,0x62) 0x44000100 0x0000306d 0x00000000 0x00000000
|
||||
GPP_G2 (0x6D,0x64) 0x44000100 0x0000006e 0x00000000 0x00000000
|
||||
GPP_G3 (0x6D,0x66) 0x44000103 0x0000006f 0x00000000 0x00000000
|
||||
GPP_G4 (0x6D,0x68) 0x44000102 0x00000070 0x00000000 0x00000000
|
||||
GPP_G5 (0x6D,0x6A) 0x44000200 0x00000071 0x00000000 0x00000000
|
||||
GPP_G6 (0x6D,0x6C) 0x44000200 0x00000072 0x00000000 0x00000000
|
||||
GPP_G7 (0x6D,0x6E) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||
GPD0 (0x6C,0x00) 0x44000502 0x00000060 0x00000000 0x00000000
|
||||
GPD1 (0x6C,0x02) 0x44000502 0x00001061 0x00000000 0x00000000
|
||||
GPD2 (0x6C,0x04) 0x04000102 0x00001062 0x00000000 0x00000000
|
||||
GPD3 (0x6C,0x06) 0x44000502 0x00003063 0x00000010 0x00000000
|
||||
GPD4 (0x6C,0x08) 0x44000600 0x00001064 0x00000000 0x00000000
|
||||
GPD5 (0x6C,0x0A) 0x44000600 0x00001065 0x00000000 0x00000000
|
||||
GPD6 (0x6C,0x0C) 0x44000600 0x00001066 0x00000000 0x00000000
|
||||
GPD7 (0x6C,0x0E) 0x04000102 0x00000067 0x00000800 0x00000000
|
||||
GPD8 (0x6C,0x10) 0x44000600 0x00001068 0x00000000 0x00000000
|
||||
GPD9 (0x6C,0x12) 0x04000100 0x00001069 0x00000000 0x00000000
|
||||
GPD10 (0x6C,0x14) 0x04000601 0x0000106a 0x00000000 0x00000000
|
||||
GPD11 (0x6C,0x16) 0x44000200 0x0000106b 0x00000000 0x00000000
|
||||
GPP_K0 (0x6B,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_K1 (0x6B,0x02) 0x44000200 0x00000019 0x00000000 0x00000000
|
||||
GPP_K2 (0x6B,0x04) 0x44000200 0x0000001a 0x00000000 0x00000000
|
||||
GPP_K3 (0x6B,0x06) 0x40880102 0x0000001b 0x00000000 0x00000000
|
||||
GPP_K4 (0x6B,0x08) 0x44000200 0x0000001c 0x00000000 0x00000000
|
||||
GPP_K5 (0x6B,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
|
||||
GPP_K6 (0x6B,0x0C) 0x40880102 0x0000001e 0x00000000 0x00000000
|
||||
GPP_K7 (0x6B,0x0E) 0x44000200 0x0000001f 0x00000000 0x00000000
|
||||
GPP_K8 (0x6B,0x10) 0x44000201 0x00000020 0x00000000 0x00000000
|
||||
GPP_K9 (0x6B,0x12) 0x44000201 0x00000021 0x00000000 0x00000000
|
||||
GPP_K10 (0x6B,0x14) 0x44000200 0x00000022 0x00000000 0x00000000
|
||||
GPP_K11 (0x6B,0x16) 0x44000200 0x00000023 0x00000000 0x00000000
|
||||
GPP_K12 (0x6B,0x18) 0x44000200 0x00000024 0x00000000 0x00000000
|
||||
GPP_K13 (0x6B,0x1A) 0x44000200 0x00000025 0x00000000 0x00000000
|
||||
GPP_K14 (0x6B,0x1C) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_K15 (0x6B,0x1E) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_K16 (0x6B,0x20) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_K17 (0x6B,0x22) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_K18 (0x6B,0x24) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_K19 (0x6B,0x26) 0x42800103 0x0000002b 0x00000000 0x00000000
|
||||
GPP_K20 (0x6B,0x28) 0x44000201 0x0000002c 0x00000000 0x00000000
|
||||
GPP_K21 (0x6B,0x2A) 0x44000100 0x0000002d 0x00000000 0x00000000
|
||||
GPP_K22 (0x6B,0x2C) 0x44000103 0x0000002e 0x00000000 0x00000000
|
||||
GPP_K23 (0x6B,0x2E) 0x44000201 0x0000002f 0x00000000 0x00000000
|
||||
GPP_H0 (0x6B,0x30) 0x44000702 0x00000048 0x00000000 0x00000000
|
||||
GPP_H1 (0x6B,0x32) 0x44000200 0x00000049 0x00000000 0x00000000
|
||||
GPP_H2 (0x6B,0x34) 0x44000700 0x0000004a 0x00000000 0x00000000
|
||||
GPP_H3 (0x6B,0x36) 0x44000200 0x0000004b 0x00000000 0x00000000
|
||||
GPP_H4 (0x6B,0x38) 0x44000702 0x0000004c 0x00000000 0x00000000
|
||||
GPP_H5 (0x6B,0x3A) 0x44000102 0x0000104d 0x00000000 0x00000000
|
||||
GPP_H6 (0x6B,0x3C) 0x44000200 0x0000004e 0x00000000 0x00000000
|
||||
GPP_H7 (0x6B,0x3E) 0x44000200 0x0000004f 0x00000000 0x00000000
|
||||
GPP_H8 (0x6B,0x40) 0x44000200 0x00000050 0x00000000 0x00000000
|
||||
GPP_H9 (0x6B,0x42) 0x44000200 0x00000051 0x00000000 0x00000000
|
||||
GPP_H10 (0x6B,0x44) 0x44000200 0x00000052 0x00000000 0x00000000
|
||||
GPP_H11 (0x6B,0x46) 0x44000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_H12 (0x6B,0x48) 0x44000200 0x00000054 0x00000000 0x00000000
|
||||
GPP_H13 (0x6B,0x4A) 0x44000102 0x00000055 0x00000000 0x00000000
|
||||
GPP_H14 (0x6B,0x4C) 0x44000200 0x00000056 0x00000000 0x00000000
|
||||
GPP_H15 (0x6B,0x4E) 0x44000102 0x00000057 0x00000800 0x00000000
|
||||
GPP_H16 (0x6B,0x50) 0x44000200 0x00000058 0x00000000 0x00000000
|
||||
GPP_H17 (0x6B,0x52) 0x44000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_H18 (0x6B,0x54) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_H19 (0x6B,0x56) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_H20 (0x6B,0x58) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_H21 (0x6B,0x5A) 0x44000200 0x0000005d 0x00000000 0x00000000
|
||||
GPP_H22 (0x6B,0x5C) 0x44000200 0x0000005e 0x00000000 0x00000000
|
||||
GPP_H23 (0x6B,0x5E) 0x44000102 0x0000305f 0x00000000 0x00000000
|
||||
GPP_E0 (0x6B,0x60) 0x44000102 0x00000018 0x00000000 0x00000000
|
||||
GPP_E1 (0x6B,0x62) 0x44000500 0x00003019 0x00000000 0x00000000
|
||||
GPP_E2 (0x6B,0x64) 0x44000102 0x0000001a 0x00000000 0x00000000
|
||||
GPP_E3 (0x6B,0x66) 0x44000200 0x0000301b 0x00000000 0x00000000
|
||||
GPP_E4 (0x6B,0x68) 0x44000201 0x0000001c 0x00000000 0x00000000
|
||||
GPP_E5 (0x6B,0x6A) 0x44000200 0x0000001d 0x00000000 0x00000000
|
||||
GPP_E6 (0x6B,0x6C) 0x44000200 0x0000001e 0x00000000 0x00000000
|
||||
GPP_E7 (0x6B,0x6E) 0x80800102 0x0000001f 0x00000000 0x00000000
|
||||
GPP_E8 (0x6B,0x70) 0x44000600 0x00000020 0x00000000 0x00000000
|
||||
GPP_E9 (0x6B,0x72) 0x44000103 0x00003021 0x00000800 0x00000000
|
||||
GPP_E10 (0x6B,0x74) 0x44000503 0x00003022 0x00000800 0x00000000
|
||||
GPP_E11 (0x6B,0x76) 0x44000503 0x00003023 0x00000800 0x00000000
|
||||
GPP_E12 (0x6B,0x78) 0x44000503 0x00003024 0x00000000 0x00000000
|
||||
GPP_F0 (0x6B,0x7A) 0x44000200 0x00000030 0x00000000 0x00000000
|
||||
GPP_F1 (0x6B,0x7C) 0x44000200 0x00000031 0x00000000 0x00000000
|
||||
GPP_F2 (0x6B,0x7E) 0x44000200 0x00000032 0x00000000 0x00000000
|
||||
GPP_F3 (0x6B,0x80) 0x44000200 0x00000033 0x00000000 0x00000000
|
||||
GPP_F4 (0x6B,0x82) 0x44000200 0x00000034 0x00000000 0x00000000
|
||||
GPP_F5 (0x6B,0x84) 0x44000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_F6 (0x6B,0x86) 0x44000103 0x00000036 0x00000000 0x00000000
|
||||
GPP_F7 (0x6B,0x88) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_F8 (0x6B,0x8A) 0x44000201 0x00000038 0x00000000 0x00000000
|
||||
GPP_F9 (0x6B,0x8C) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_F10 (0x6B,0x8E) 0x44000102 0x0000003a 0x00000000 0x00000000
|
||||
GPP_F11 (0x6B,0x90) 0x44000102 0x0000003b 0x00000000 0x00000000
|
||||
GPP_F12 (0x6B,0x92) 0x44000102 0x0000003c 0x00000000 0x00000000
|
||||
GPP_F13 (0x6B,0x94) 0x44000100 0x0000003d 0x00000000 0x00000000
|
||||
GPP_F14 (0x6B,0x96) 0x44000100 0x0000003e 0x00000000 0x00000000
|
||||
GPP_F15 (0x6B,0x98) 0x44000503 0x0000303f 0x00000000 0x00000000
|
||||
GPP_F16 (0x6B,0x9A) 0x44000503 0x00003040 0x00000000 0x00000000
|
||||
GPP_F17 (0x6B,0x9C) 0x44000503 0x00003041 0x00000000 0x00000000
|
||||
GPP_F18 (0x6B,0x9E) 0x44000503 0x00003042 0x00000000 0x00000000
|
||||
GPP_F19 (0x6B,0xA0) 0x44000500 0x00000043 0x00000000 0x00000000
|
||||
GPP_F20 (0x6B,0xA2) 0x44000500 0x00000044 0x00000000 0x00000000
|
||||
GPP_F21 (0x6B,0xA4) 0x44000500 0x00000045 0x00000000 0x00000000
|
||||
GPP_F22 (0x6B,0xA6) 0x44000201 0x00000046 0x00000000 0x00000000
|
||||
GPP_F23 (0x6B,0xA8) 0x44000201 0x00000047 0x00000000 0x00000000
|
||||
GPP_I0 (0x6A,0x28) 0x44000500 0x00000030 0x00000000 0x00000000
|
||||
GPP_I1 (0x6A,0x2A) 0x46880100 0x00000031 0x00000000 0x00000000
|
||||
GPP_I2 (0x6A,0x2C) 0x44000502 0x00000032 0x00000000 0x00000000
|
||||
GPP_I3 (0x6A,0x2E) 0x46880100 0x00000033 0x00000000 0x00000000
|
||||
GPP_I4 (0x6A,0x30) 0x44000502 0x00000034 0x00000000 0x00000000
|
||||
GPP_I5 (0x6A,0x32) 0x44000602 0x00000035 0x00000000 0x00000000
|
||||
GPP_I6 (0x6A,0x34) 0x44000402 0x00000036 0x00000800 0x00000000
|
||||
GPP_I7 (0x6A,0x36) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_I8 (0x6A,0x38) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_I9 (0x6A,0x3A) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_I10 (0x6A,0x3C) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_I11 (0x6A,0x3E) 0x44000100 0x0000003b 0x00000000 0x00000000
|
||||
GPP_I12 (0x6A,0x40) 0x44000200 0x0000003c 0x00000000 0x00000000
|
||||
GPP_I13 (0x6A,0x42) 0x44000200 0x0000003d 0x00000000 0x00000000
|
||||
GPP_I14 (0x6A,0x44) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_J0 (0x6A,0x4C) 0x44000500 0x00000025 0x00000000 0x00000000
|
||||
GPP_J1 (0x6A,0x4E) 0x44000102 0x00000026 0x00000000 0x00000000
|
||||
GPP_J2 (0x6A,0x50) 0x44000100 0x00000027 0x00000000 0x00000000
|
||||
GPP_J3 (0x6A,0x52) 0x44000100 0x00000028 0x00000000 0x00000000
|
||||
GPP_J4 (0x6A,0x54) 0x44000500 0x00000029 0x00000800 0x00000000
|
||||
GPP_J5 (0x6A,0x56) 0x44000502 0x0000302a 0x00000000 0x00000000
|
||||
GPP_J6 (0x6A,0x58) 0x44000500 0x0000002b 0x00000000 0x00000000
|
||||
GPP_J7 (0x6A,0x5A) 0x44000502 0x0000302c 0x00000000 0x00000000
|
||||
GPP_J8 (0x6A,0x5C) 0x44000500 0x0000002d 0x00000000 0x00000000
|
||||
GPP_J9 (0x6A,0x5E) 0x44000500 0x0000002e 0x00000000 0x00000000
|
||||
GPP_J10 (0x6A,0x60) 0x44000200 0x0000002f 0x00000000 0x00000000
|
||||
GPP_J11 (0x6A,0x62) 0x44000100 0x00001030 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC293
|
||||
vendor_id: 0x10ec0293
|
||||
subsystem_id: 0x15588551
|
||||
revision_id: 0x100003
|
||||
0x12: 0x90a60130
|
||||
0x13: 0x40000000
|
||||
0x14: 0x90170110
|
||||
0x15: 0x02211020
|
||||
0x16: 0x411111f0
|
||||
0x18: 0x02a11040
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x40738205
|
||||
0x1e: 0x411111f0
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Kabylake HDMI
|
||||
vendor_id: 0x8086280b
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x05: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x07: 0x18560010
|
||||
hdaudioC1D0
|
||||
vendor_name: Nvidia
|
||||
chip_name: GPU 99 HDMI/DP
|
||||
vendor_id: 0x10de0099
|
||||
subsystem_id: 0x15588550
|
||||
revision_id: 0x100100
|
||||
0x04: 0x585600f0
|
||||
0x05: 0x585600f0
|
||||
0x06: 0x185600f0
|
||||
0x07: 0x185600f0
|
258
models/gaze14_1660ti_17/gpio.h
Normal file
258
models/gaze14_1660ti_17/gpio.h
Normal file
@ -0,0 +1,258 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2019 System76
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef MAINBOARD_GPIO_H
|
||||
#define MAINBOARD_GPIO_H
|
||||
|
||||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
#ifndef __ACPI__
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
static const struct pad_config gpio_table[] = {
|
||||
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD1, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD2, DN_20K, PWROK),
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD4, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD5, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD6, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD7, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD8, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD9, DN_20K, PWROK),
|
||||
_PAD_CFG_STRUCT(GPD10, 0x04000601, 0x1000),
|
||||
PAD_CFG_TERM_GPO(GPD11, 0, DN_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A0, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_A7, 0x80100100, 0x0000),
|
||||
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A13, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A14, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_A16, 0x44000101, 0x1000),
|
||||
_PAD_CFG_STRUCT(GPP_A17, 0x44000101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A20, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_A21, 0x44000101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_A22, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B1, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B2, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B3, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B4, 0, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B5, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B6, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B8, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B9, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_B11, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_B12, 0x44000601, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_B13, 0x44000601, 0x1000),
|
||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_B15, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B16, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B17, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_B19, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B20, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B21, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B22, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C5, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_C8, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C9, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C10, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C11, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C12, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C13, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C14, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C15, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C18, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C19, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_D0, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D1, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D2, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D3, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D4, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
|
||||
PAD_CFG_TERM_GPO(GPP_D7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D8, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D9, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D10, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D11, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D12, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D13, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D14, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D15, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D16, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_D21, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D22, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D23, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_E3, 0, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_E4, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_E5, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_E6, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_E7, 0x80800100, 0x0000),
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_E9, 0x44000101, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_E10, 0x44000501, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_E11, 0x44000501, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_E12, 0x44000501, 0x3000),
|
||||
PAD_CFG_TERM_GPO(GPP_F0, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F1, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F2, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F3, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F4, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F5, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_F6, 0x44000101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_F7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F8, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F9, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_F15, 0x44000501, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_F16, 0x44000501, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_F17, 0x44000501, 0x3000),
|
||||
_PAD_CFG_STRUCT(GPP_F18, 0x44000501, 0x3000),
|
||||
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_F22, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F23, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G0, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G1, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_G3, 0x44000101, 0x0000),
|
||||
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_G5, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_G6, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_G7, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_H1, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_H3, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H5, DN_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H6, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H8, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H9, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H10, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H11, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H12, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H14, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H16, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H17, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H18, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H19, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H20, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H21, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H22, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H23, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_I0, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_I1, 0x46880100, 0x0000),
|
||||
PAD_CFG_NF(GPP_I2, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_I3, 0x46880100, 0x0000),
|
||||
PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_I5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_I6, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_I7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I8, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I9, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I10, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I12, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I13, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I14, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_J1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J3, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J9, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_J10, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J11, DN_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K0, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K1, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K2, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K3, 0x40880100, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_K4, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K5, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_K7, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K8, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K9, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K10, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K11, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K12, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K13, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K14, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K15, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K16, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K17, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K18, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K19, 0x42800101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_K20, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K21, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K22, 0x44000101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_K23, 1, NONE, DEEP),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
@ -1,274 +0,0 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x3E30, Revision 0x0A
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x3E98, Revision 0x00
|
||||
PCI Device: 0000:00:12.0: Class 0x00118000, Vendor 0x8086, Device 0xA379, Revision 0x10
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0xA36D, Revision 0x10
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0xA36F, Revision 0x10
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0xA370, Revision 0x10
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0xA360, Revision 0x10
|
||||
PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0xA352, Revision 0x10
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0xA33D, Revision 0xF0
|
||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0xA330, Revision 0xF0
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0xA304, Revision 0x10
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0xA348, Revision 0x10
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0xA323, Revision 0x10
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0xA324, Revision 0x10
|
||||
PCI Device: 0000:00:1f.6: Class 0x00020000, Vendor 0x8086, Device 0x15BC, Revision 0x10
|
||||
PCI Device: 0000:01:00.0: Class 0x00020000, Vendor 0x8086, Device 0x1539, Revision 0x03
|
||||
## GPIO ##
|
||||
300 Series PCH
|
||||
GPP_A0 = 0x44000702 0x00000018 0x00000000 0x00000000
|
||||
GPP_A1 = 0x44000702 0x00003c19 0x00000000 0x00000000
|
||||
GPP_A2 = 0x44000702 0x00003c1a 0x00000000 0x00000000
|
||||
GPP_A3 = 0x44000702 0x00003c1b 0x00000000 0x00000000
|
||||
GPP_A4 = 0x44000702 0x00003c1c 0x00000000 0x00000000
|
||||
GPP_A5 = 0x44000700 0x0000001d 0x00000000 0x00000000
|
||||
GPP_A6 = 0x44000702 0x0000001e 0x00000000 0x00000000
|
||||
GPP_A7 = 0x44000702 0x0000001f 0x00000000 0x00000000
|
||||
GPP_A8 = 0x44000700 0x00000020 0x00000000 0x00000000
|
||||
GPP_A9 = 0x44000700 0x00001021 0x00000000 0x00000000
|
||||
GPP_A10 = 0x44000700 0x00001022 0x00000000 0x00000000
|
||||
GPP_A11 = 0x44000702 0x00003023 0x00000000 0x00000000
|
||||
GPP_A12 = 0x44000300 0x00000024 0x00000000 0x00000000
|
||||
GPP_A13 = 0x44000700 0x00000025 0x00000000 0x00000000
|
||||
GPP_A14 = 0x44000700 0x00000026 0x00000000 0x00000000
|
||||
GPP_A15 = 0x44000702 0x00003027 0x00000000 0x00000000
|
||||
GPP_A16 = 0x44000300 0x00000028 0x00000000 0x00000000
|
||||
GPP_A17 = 0x84000201 0x00000029 0x00000000 0x00000000
|
||||
GPP_A18 = 0x84000201 0x0000002a 0x00000000 0x00000000
|
||||
GPP_A19 = 0x84000201 0x0000002b 0x00000000 0x00000000
|
||||
GPP_A20 = 0x84000201 0x0000002c 0x00000000 0x00000000
|
||||
GPP_A21 = 0x84000201 0x0000002d 0x00000000 0x00000000
|
||||
GPP_A22 = 0x44000300 0x0000002e 0x00000000 0x00000000
|
||||
GPP_A23 = 0x44000300 0x0000002f 0x00000000 0x00000000
|
||||
GPP_B0 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_B1 = 0x44000300 0x00000030 0x00000000 0x00000000
|
||||
GPP_B2 = 0x44000300 0x00000031 0x00000000 0x00000000
|
||||
GPP_B3 = 0x44000300 0x00000032 0x00000000 0x00000000
|
||||
GPP_B4 = 0x84000103 0x00000033 0x00000000 0x00000000
|
||||
GPP_B5 = 0x84000103 0x00000034 0x00000000 0x00000000
|
||||
GPP_B6 = 0x44000300 0x00000035 0x00000000 0x00000000
|
||||
GPP_B7 = 0x44000300 0x00000036 0x00000000 0x00000000
|
||||
GPP_B8 = 0x44000300 0x00000037 0x00000000 0x00000000
|
||||
GPP_B9 = 0x44000702 0x00000038 0x00000000 0x00000000
|
||||
GPP_B10 = 0x44000300 0x00000039 0x00000000 0x00000000
|
||||
GPP_B11 = 0x44000702 0x0000003a 0x00000000 0x00000000
|
||||
GPP_B12 = 0x04000102 0x0000003b 0x00000000 0x00000000
|
||||
GPP_B13 = 0x44000700 0x0000003c 0x00000000 0x00000000
|
||||
GPP_B14 = 0x44000700 0x0000003d 0x00000000 0x00000000
|
||||
GPP_B15 = 0x44000600 0x0000003e 0x00000000 0x00000000
|
||||
GPP_B16 = 0x84000103 0x0000003f 0x00000000 0x00000000
|
||||
GPP_B17 = 0x84000103 0x00000040 0x00000000 0x00000000
|
||||
GPP_B18 = 0x84000103 0x00000041 0x00000000 0x00000000
|
||||
GPP_B19 = 0x44000200 0x00000042 0x00000000 0x00000000
|
||||
GPP_B20 = 0x04000102 0x00000043 0x00000000 0x00000000
|
||||
GPP_B21 = 0x82000301 0x00000044 0x00000000 0x00000000
|
||||
GPP_B22 = 0x84000103 0x00000045 0x00000000 0x00000000
|
||||
GPP_B23 = 0x44000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_C0 = 0x44000702 0x00000048 0x00000000 0x00000000
|
||||
GPP_C1 = 0x44000702 0x00000049 0x00000000 0x00000000
|
||||
GPP_C2 = 0x44000200 0x0000004a 0x00000800 0x00000000
|
||||
GPP_C3 = 0x44000702 0x0000004b 0x00000000 0x00000000
|
||||
GPP_C4 = 0x44000702 0x0000004c 0x00000000 0x00000000
|
||||
GPP_C5 = 0x44000200 0x0000004d 0x00000000 0x00000000
|
||||
GPP_C6 = 0x44000300 0x0000004e 0x00000000 0x00000000
|
||||
GPP_C7 = 0x44000300 0x0000004f 0x00000000 0x00000000
|
||||
GPP_C8 = 0x44000300 0x00000050 0x00000000 0x00000000
|
||||
GPP_C9 = 0x44000300 0x00000051 0x00000000 0x00000000
|
||||
GPP_C10 = 0x44000300 0x00000052 0x00000000 0x00000000
|
||||
GPP_C11 = 0x44000300 0x00000053 0x00000000 0x00000000
|
||||
GPP_C12 = 0x44000300 0x00000054 0x00000000 0x00000000
|
||||
GPP_C13 = 0x44000300 0x00000055 0x00000000 0x00000000
|
||||
GPP_C14 = 0x44000300 0x00000056 0x00000000 0x00000000
|
||||
GPP_C15 = 0x44000300 0x00000057 0x00000000 0x00000000
|
||||
GPP_C16 = 0x44000300 0x00000058 0x00000000 0x00000000
|
||||
GPP_C17 = 0x44000300 0x00000059 0x00000000 0x00000000
|
||||
GPP_C18 = 0x44000300 0x0000005a 0x00000000 0x00000000
|
||||
GPP_C19 = 0x44000300 0x0000005b 0x00000000 0x00000000
|
||||
GPP_C20 = 0x44000300 0x0000005c 0x00000000 0x00000000
|
||||
GPP_C21 = 0x44000300 0x0000005d 0x00000000 0x00000000
|
||||
GPP_C22 = 0x44000300 0x0000005e 0x00000000 0x00000000
|
||||
GPP_C23 = 0x44000300 0x0000005f 0x00000000 0x00000000
|
||||
GPP_D0 = 0x84000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_D1 = 0x84000200 0x00000061 0x00000000 0x00000000
|
||||
GPP_D2 = 0x84000200 0x00000062 0x00000000 0x00000000
|
||||
GPP_D3 = 0x44000102 0x00000063 0x00000000 0x00000000
|
||||
GPP_D4 = 0x44000300 0x00000064 0x00000000 0x00000000
|
||||
GPP_D5 = 0x44000f00 0x00000065 0x00000000 0x00000000
|
||||
GPP_D6 = 0x44000f00 0x00000066 0x00000000 0x00000000
|
||||
GPP_D7 = 0x44000f00 0x00000067 0x00000000 0x00000000
|
||||
GPP_D8 = 0x44000f02 0x00000068 0x00000000 0x00000000
|
||||
GPP_D9 = 0x84000200 0x00000069 0x00000000 0x00000000
|
||||
GPP_D10 = 0x44000300 0x0000006a 0x00000000 0x00000000
|
||||
GPP_D11 = 0x44001700 0x0000006b 0x00000000 0x00000000
|
||||
GPP_D12 = 0x44001700 0x0000006c 0x00000000 0x00000000
|
||||
GPP_D13 = 0x44000300 0x0000006d 0x00000000 0x00000000
|
||||
GPP_D14 = 0x44000300 0x0000006e 0x00000000 0x00000000
|
||||
GPP_D15 = 0x44000300 0x0000006f 0x00000000 0x00000000
|
||||
GPP_D16 = 0x44000300 0x00000070 0x00000000 0x00000000
|
||||
GPP_D17 = 0x44000300 0x00000071 0x00000000 0x00000000
|
||||
GPP_D18 = 0x44000300 0x00000072 0x00000000 0x00000000
|
||||
GPP_D19 = 0x04000200 0x00000073 0x00000000 0x00000000
|
||||
GPP_D20 = 0x44000300 0x00000074 0x00000000 0x00000000
|
||||
GPP_D21 = 0x44000300 0x00000075 0x00000000 0x00000000
|
||||
GPP_D22 = 0x44000300 0x00000076 0x00000000 0x00000000
|
||||
GPP_D23 = 0x44000300 0x00000077 0x00000000 0x00000000
|
||||
GPP_G0 = 0x44000300 0x0000006c 0x00000000 0x00000000
|
||||
GPP_G1 = 0x44000300 0x0000006d 0x00000000 0x00000000
|
||||
GPP_G2 = 0x44000300 0x0000006e 0x00000000 0x00000000
|
||||
GPP_G3 = 0x44000300 0x0000006f 0x00000000 0x00000000
|
||||
GPP_G4 = 0x44000300 0x00000070 0x00000000 0x00000000
|
||||
GPP_G5 = 0x44000300 0x00000071 0x00000000 0x00000000
|
||||
GPP_G6 = 0x44000300 0x00000072 0x00000000 0x00000000
|
||||
GPP_G7 = 0x44000300 0x00000073 0x00000000 0x00000000
|
||||
GPD0 = 0x04000602 0x00000060 0x00000000 0x00000000
|
||||
GPD1 = 0x04000702 0x00003c61 0x00000000 0x00000000
|
||||
GPD2 = 0x00080502 0x00003c62 0x00000000 0x00000000
|
||||
GPD3 = 0x04000502 0x00003063 0x00000010 0x00000000
|
||||
GPD4 = 0x04000600 0x00000064 0x00000000 0x00000000
|
||||
GPD5 = 0x04000600 0x00000065 0x00000000 0x00000000
|
||||
GPD6 = 0x04000600 0x00000066 0x00000000 0x00000000
|
||||
GPD7 = 0x04000200 0x00000067 0x00000800 0x00000000
|
||||
GPD8 = 0x04000600 0x00000068 0x00000000 0x00000000
|
||||
GPD9 = 0x04000600 0x00000069 0x00000000 0x00000000
|
||||
GPD10 = 0x04000600 0x0000006a 0x00000000 0x00000000
|
||||
GPD11 = 0x04000600 0x0000006b 0x00000000 0x00000000
|
||||
GPP_K0 = 0x04000100 0x00000018 0x00000000 0x00000000
|
||||
GPP_K1 = 0x04000100 0x00000019 0x00000000 0x00000000
|
||||
GPP_K2 = 0x44000300 0x0000001a 0x00000000 0x00000000
|
||||
GPP_K3 = 0x44000300 0x0000001b 0x00000000 0x00000000
|
||||
GPP_K4 = 0x44000300 0x0000001c 0x00000000 0x00000000
|
||||
GPP_K5 = 0x44000300 0x0000001d 0x00000000 0x00000000
|
||||
GPP_K6 = 0x44000300 0x0000001e 0x00000000 0x00000000
|
||||
GPP_K7 = 0x44000300 0x0000001f 0x00000000 0x00000000
|
||||
GPP_K8 = 0x44000700 0x00000020 0x00000000 0x00000000
|
||||
GPP_K9 = 0x44000700 0x00000021 0x00000000 0x00000000
|
||||
GPP_K10 = 0x44000700 0x00000022 0x00000000 0x00000000
|
||||
GPP_K11 = 0x44000700 0x00000023 0x00000000 0x00000000
|
||||
GPP_K12 = 0x44000300 0x00000024 0x00000000 0x00000000
|
||||
GPP_K13 = 0x44000300 0x00000025 0x00000000 0x00000000
|
||||
GPP_K14 = 0x44000300 0x00000026 0x00000000 0x00000000
|
||||
GPP_K15 = 0x44000300 0x00000027 0x00000000 0x00000000
|
||||
GPP_K16 = 0x44000300 0x00000028 0x00000000 0x00000000
|
||||
GPP_K17 = 0x44000300 0x00000029 0x00000000 0x00000000
|
||||
GPP_K18 = 0x44000300 0x0000002a 0x00000000 0x00000000
|
||||
GPP_K19 = 0x44000300 0x0000002b 0x00000000 0x00000000
|
||||
GPP_K20 = 0x44000700 0x0000002c 0x00000000 0x00000000
|
||||
GPP_K21 = 0x44000700 0x0000002d 0x00000000 0x00000000
|
||||
GPP_K22 = 0x44000300 0x0000002e 0x00000000 0x00000000
|
||||
GPP_K23 = 0x44000300 0x0000002f 0x00000000 0x00000000
|
||||
GPP_H0 = 0x44000702 0x00000048 0x00000000 0x00000000
|
||||
GPP_H1 = 0x44000102 0x00000049 0x00000000 0x00000000
|
||||
GPP_H2 = 0x44000300 0x0000004a 0x00000000 0x00000000
|
||||
GPP_H3 = 0x44000300 0x0000004b 0x00000000 0x00000000
|
||||
GPP_H4 = 0x44000300 0x0000004c 0x00000000 0x00000000
|
||||
GPP_H5 = 0x44000300 0x0000004d 0x00000000 0x00000000
|
||||
GPP_H6 = 0x44000300 0x0000004e 0x00000000 0x00000000
|
||||
GPP_H7 = 0x44000300 0x0000004f 0x00000000 0x00000000
|
||||
GPP_H8 = 0x44000300 0x00000050 0x00000000 0x00000000
|
||||
GPP_H9 = 0x44000300 0x00000051 0x00000000 0x00000000
|
||||
GPP_H10 = 0x44000300 0x00000052 0x00000000 0x00000000
|
||||
GPP_H11 = 0x44000300 0x00000053 0x00000000 0x00000000
|
||||
GPP_H12 = 0x44000200 0x00000054 0x00000000 0x00000000
|
||||
GPP_H13 = 0x44000300 0x00000055 0x00000000 0x00000000
|
||||
GPP_H14 = 0x44000300 0x00000056 0x00000000 0x00000000
|
||||
GPP_H15 = 0x44000300 0x00000057 0x00000000 0x00000000
|
||||
GPP_H16 = 0x44000300 0x00000058 0x00000000 0x00000000
|
||||
GPP_H17 = 0x44000300 0x00000059 0x00000000 0x00000000
|
||||
GPP_H18 = 0x44000300 0x0000005a 0x00000000 0x00000000
|
||||
GPP_H19 = 0x44000300 0x0000005b 0x00000000 0x00000000
|
||||
GPP_H20 = 0x44000300 0x0000005c 0x00000000 0x00000000
|
||||
GPP_H21 = 0x44000300 0x0000005d 0x00000000 0x00000000
|
||||
GPP_H22 = 0x44000300 0x0000005e 0x00000000 0x00000000
|
||||
GPP_H23 = 0x44000300 0x0000005f 0x00000000 0x00000000
|
||||
GPP_E0 = 0x84000502 0x00003018 0x00000000 0x00000000
|
||||
GPP_E1 = 0x84000502 0x00003019 0x00000000 0x00000000
|
||||
GPP_E2 = 0x84000502 0x0000301a 0x00000000 0x00000000
|
||||
GPP_E3 = 0x44000300 0x0000001b 0x00000000 0x00000000
|
||||
GPP_E4 = 0x44000500 0x0000001c 0x00000000 0x00000000
|
||||
GPP_E5 = 0x44000500 0x0000001d 0x00000000 0x00000000
|
||||
GPP_E6 = 0x44000500 0x0000001e 0x00000000 0x00000000
|
||||
GPP_E7 = 0x44000300 0x0000001f 0x00000000 0x00000000
|
||||
GPP_E8 = 0x44000700 0x00000020 0x00000000 0x00000000
|
||||
GPP_E9 = 0x44000502 0x00000021 0x00000800 0x00000000
|
||||
GPP_E10 = 0x44000502 0x00000022 0x00000800 0x00000000
|
||||
GPP_E11 = 0x44000502 0x00000023 0x00000800 0x00000000
|
||||
GPP_E12 = 0x44000502 0x00000024 0x00000000 0x00000000
|
||||
GPP_F0 = 0x84000502 0x00003030 0x00000000 0x00000000
|
||||
GPP_F1 = 0x84000502 0x00003031 0x00000000 0x00000000
|
||||
GPP_F2 = 0x84000502 0x00003032 0x00000000 0x00000000
|
||||
GPP_F3 = 0x44000702 0x00000033 0x00000000 0x00000000
|
||||
GPP_F4 = 0x44000702 0x00000034 0x00000000 0x00000000
|
||||
GPP_F5 = 0x44000500 0x00000035 0x00000000 0x00000000
|
||||
GPP_F6 = 0x44000500 0x00000036 0x00000000 0x00000000
|
||||
GPP_F7 = 0x44000500 0x00000037 0x00000000 0x00000000
|
||||
GPP_F8 = 0x44000500 0x00000038 0x00000000 0x00000000
|
||||
GPP_F9 = 0x44000500 0x00000039 0x00000000 0x00000000
|
||||
GPP_F10 = 0x84000102 0x0000003a 0x00000000 0x00000000
|
||||
GPP_F11 = 0x44000300 0x0000003b 0x00000000 0x00000000
|
||||
GPP_F12 = 0x44000300 0x0000003c 0x00000000 0x00000000
|
||||
GPP_F13 = 0x44000300 0x0000003d 0x00000000 0x00000000
|
||||
GPP_F14 = 0x44000b00 0x0000003e 0x00000000 0x00000000
|
||||
GPP_F15 = 0x44000502 0x0000003f 0x00000000 0x00000000
|
||||
GPP_F16 = 0x44000502 0x00000040 0x00000000 0x00000000
|
||||
GPP_F17 = 0x44000502 0x00000041 0x00000000 0x00000000
|
||||
GPP_F18 = 0x44000502 0x00000042 0x00000000 0x00000000
|
||||
GPP_F19 = 0x44000700 0x00000043 0x00000000 0x00000000
|
||||
GPP_F20 = 0x44000700 0x00000044 0x00000000 0x00000000
|
||||
GPP_F21 = 0x44000700 0x00000045 0x00000000 0x00000000
|
||||
GPP_F22 = 0x44000300 0x00000046 0x00000000 0x00000000
|
||||
GPP_F23 = 0x44000200 0x00000047 0x00000000 0x00000000
|
||||
GPP_I0 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I1 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I2 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I3 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_I4 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_I5 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_I6 = 0x40000702 0x00000000 0x00000000 0x00000000
|
||||
GPP_I7 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_I8 = 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_I9 = 0x40000700 0x00001000 0x00000000 0x00000000
|
||||
GPP_I10 = 0x40000700 0x00001000 0x00000000 0x00000000
|
||||
GPP_I11 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I12 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I13 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_I14 = 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_J0 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_J1 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_J2 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_J3 = 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_J4 = 0x40000700 0x00003c00 0x00000800 0x00000000
|
||||
GPP_J5 = 0x44000500 0x00000030 0x00000000 0x00000000
|
||||
GPP_J6 = 0x44000502 0x00000031 0x00000000 0x00000000
|
||||
GPP_J7 = 0x44000500 0x00000032 0x00000000 0x00000000
|
||||
GPP_J8 = 0x44000502 0x00000033 0x00000000 0x00000000
|
||||
GPP_J9 = 0x44000500 0x00000034 0x00000000 0x00000000
|
||||
GPP_J10 = 0x44000502 0x00000035 0x00000000 0x00000000
|
||||
GPP_J11 = 0x44000602 0x00000036 0x00000800 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC1220
|
||||
vendor_id: 0x10ec1220
|
||||
subsystem_id: 0x1458a0c3
|
||||
revision_id: 0x100101
|
||||
0x12: 0x403fc000
|
||||
0x14: 0x01014010
|
||||
0x15: 0x411111f0
|
||||
0x16: 0x411111f0
|
||||
0x17: 0x411111f0
|
||||
0x18: 0x01a19040
|
||||
0x19: 0x02a19050
|
||||
0x1a: 0x0181304f
|
||||
0x1b: 0x02214020
|
||||
0x1d: 0x4047c669
|
||||
0x1e: 0x99430130
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Kabylake HDMI
|
||||
vendor_id: 0x8086280b
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x05: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x07: 0x18560010
|
1
rust-toolchain
Normal file
1
rust-toolchain
Normal file
@ -0,0 +1 @@
|
||||
nightly-2019-03-11
|
@ -39,6 +39,8 @@ FIRMWARE_OPEN_VBT="${MODEL_DIR}/vbt.rom" \
|
||||
PACKAGES_PATH="${MODEL_DIR}:$(realpath edk2-platforms):$(realpath apps)" \
|
||||
./scripts/_build/edk2.sh \
|
||||
"${UEFIPAYLOAD}" \
|
||||
-D USE_HPET_TIMER=TRUE \
|
||||
-D SOURCE_DEBUG_ENABLE=FALSE \
|
||||
-D FIRMWARE_OPEN_FIRMWARE_SETUP="firmware-setup/firmware-setup.inf" \
|
||||
-D FIRMWARE_OPEN_GOP_POLICY="gop-policy/gop-policy.inf" \
|
||||
-D FIRMWARE_OPEN_GOP="IntelGopDriver.inf"
|
||||
@ -60,4 +62,6 @@ pushd apps/firmware-update >/dev/null
|
||||
popd >/dev/null
|
||||
mmd -i "${USB}.partial@@1M" "::${BASEDIR}/firmware"
|
||||
mcopy -i "${USB}.partial@@1M" "${COREBOOT}" "::${BASEDIR}/firmware/firmware.rom"
|
||||
mcopy -i "${USB}.partial@@1M" "${MODEL_DIR}/ec.rom" "::${BASEDIR}/firmware/ec.rom"
|
||||
mcopy -i "${USB}.partial@@1M" "${MODEL_DIR}/uecflash.efi" "::${BASEDIR}/firmware/uecflash.efi"
|
||||
mv -v "${USB}.partial" "${USB}"
|
||||
|
57
scripts/deps.sh
Executable file
57
scripts/deps.sh
Executable file
@ -0,0 +1,57 @@
|
||||
#!/usr/bin/env bash
|
||||
|
||||
set -eE
|
||||
|
||||
function msg {
|
||||
echo -e "\x1B[1m$*\x1B[0m" >&2
|
||||
}
|
||||
|
||||
trap 'msg "\x1B[31mFailed to install dependencies!"' ERR
|
||||
|
||||
if which apt-get > /dev/null
|
||||
then
|
||||
msg "Installing system build dependencies"
|
||||
sudo apt-get install \
|
||||
build-essential \
|
||||
bison \
|
||||
ccache \
|
||||
flex \
|
||||
git-lfs \
|
||||
gnat \
|
||||
mtools \
|
||||
nasm \
|
||||
uuid-dev \
|
||||
zlib1g-dev
|
||||
else
|
||||
msg "Please add support for your distribution to:"
|
||||
msg "scripts/deps.sh"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
msg "Installing GIT LFS hooks"
|
||||
git lfs install
|
||||
|
||||
msg "Downloading GIT LFS artifacts"
|
||||
git lfs pull
|
||||
|
||||
msg "Installing Rust"
|
||||
curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs \
|
||||
| sh -s -- -y --default-toolchain nightly
|
||||
|
||||
msg "Loading Rust environment"
|
||||
source ~/.cargo/env
|
||||
|
||||
msg "Installing pinned Rust toolchain"
|
||||
rustup toolchain install "$(cat rust-toolchain)"
|
||||
|
||||
msg "Installing source for pinned Rust toolchain"
|
||||
rustup component add --toolchain "$(cat rust-toolchain)" rust-src
|
||||
|
||||
if ! which cargo-xbuild > /dev/null
|
||||
then
|
||||
msg "Installing cargo-xbuild"
|
||||
cargo +nightly install cargo-xbuild
|
||||
fi
|
||||
|
||||
msg "\x1B[32mSuccessfully installed dependencies"
|
||||
echo "Ready to run ./scripts/build.sh [model]" >&2
|
20
scripts/flash.sh
Executable file
20
scripts/flash.sh
Executable file
@ -0,0 +1,20 @@
|
||||
#!/usr/bin/env bash
|
||||
|
||||
set -e
|
||||
|
||||
if [ -z "$1" ]
|
||||
then
|
||||
echo "$0 [model]" >&2
|
||||
exit 1
|
||||
fi
|
||||
MODEL="$1"
|
||||
|
||||
if [ ! -d "models/$1" ]
|
||||
then
|
||||
echo "model '$1' not found" >&2
|
||||
exit 1
|
||||
fi
|
||||
MODEL_DIR="$(realpath "models/${MODEL}")"
|
||||
|
||||
cargo build --release --manifest-path libs/intel-spi/Cargo.toml
|
||||
sudo libs/intel-spi/target/release/intel-spi "build/${MODEL}/coreboot.rom"
|
4
scripts/udk-debug.gdb
Executable file
4
scripts/udk-debug.gdb
Executable file
@ -0,0 +1,4 @@
|
||||
#!/usr/bin/gdb -x
|
||||
target remote :1234
|
||||
source /opt/intel/udkdebugger/script/udk_gdb_script
|
||||
iowatch/b 0x80
|
5
scripts/udk-output.sh
Executable file
5
scripts/udk-output.sh
Executable file
@ -0,0 +1,5 @@
|
||||
#!/usr/bin/env bash
|
||||
|
||||
set -e
|
||||
|
||||
nc localhost 20715
|
9
scripts/udk-server.sh
Executable file
9
scripts/udk-server.sh
Executable file
@ -0,0 +1,9 @@
|
||||
#!/usr/bin/env bash
|
||||
|
||||
set -e
|
||||
|
||||
while true
|
||||
do
|
||||
/opt/intel/udkdebugger/bin/udk-gdb-server
|
||||
sleep 10
|
||||
done
|
32
scripts/udk.sh
Executable file
32
scripts/udk.sh
Executable file
@ -0,0 +1,32 @@
|
||||
#!/usr/bin/env bash
|
||||
|
||||
set -e
|
||||
|
||||
trap "trap - SIGTERM && kill -- -$$" SIGINT SIGTERM EXIT
|
||||
|
||||
echo "## Launching UDK ##"
|
||||
./scripts/udk-server.sh &
|
||||
|
||||
while true
|
||||
do
|
||||
if lsof -Pi :20715 -sTCP:LISTEN -t >/dev/null
|
||||
then
|
||||
break
|
||||
fi
|
||||
sleep 1
|
||||
done
|
||||
|
||||
echo "## Launching NC ##"
|
||||
./scripts/udk-output.sh &
|
||||
|
||||
while true
|
||||
do
|
||||
if lsof -Pi :1234 -sTCP:LISTEN -t >/dev/null
|
||||
then
|
||||
break
|
||||
fi
|
||||
sleep 1
|
||||
done
|
||||
|
||||
echo "## Launching GDB ##"
|
||||
./scripts/udk-debug.gdb
|
@ -1 +1 @@
|
||||
Subproject commit 46d0c0e0323bd9704f9c902dcf49cac6fa871df5
|
||||
Subproject commit 3bb77abc3e71e5bd0a4250174ab5c684a59d1b94
|
@ -1 +1 @@
|
||||
Subproject commit 05e55eed3122334c82c003167d1126ce8ebbd5c5
|
||||
Subproject commit 633c95c49b71827b6bb8ba84b7a2bc783d0ba363
|
Loading…
x
Reference in New Issue
Block a user