From bd476f1cf859b77ae35962dc73d2afb7d50a9629 Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Wed, 18 Nov 2020 12:17:03 -0700 Subject: [PATCH] Update coreboot, ec, and configs --- coreboot | 2 +- ec | 2 +- models/galp5/coreboot.config | 24 ++++++++++++++++-------- models/lemp10/coreboot.config | 3 ++- scripts/build.sh | 1 - 5 files changed, 20 insertions(+), 12 deletions(-) diff --git a/coreboot b/coreboot index d206f60..6d1cc1c 160000 --- a/coreboot +++ b/coreboot @@ -1 +1 @@ -Subproject commit d206f606e1d103e1f06d314b26a36ce850a66e94 +Subproject commit 6d1cc1ca1d023e42528c7bfabaecaaf1295c1a02 diff --git a/ec b/ec index 1f55663..ecaf607 160000 --- a/ec +++ b/ec @@ -1 +1 @@ -Subproject commit 1f556633b0f94ee14f4dae8a0f2d0c8d21ee6293 +Subproject commit ecaf6079f833cd56cbbaf921737cb0f5c00d150a diff --git a/models/galp5/coreboot.config b/models/galp5/coreboot.config index c514857..47c9b1f 100644 --- a/models/galp5/coreboot.config +++ b/models/galp5/coreboot.config @@ -249,7 +249,9 @@ CONFIG_UART_PCI_ADDR=0x0 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4 CONFIG_SOC_INTEL_TIGERLAKE=y CONFIG_CHIPSET_DEVICETREE="soc/intel/tigerlake/chipset.cb" +CONFIG_VBT_DATA_SIZE_KB=9 CONFIG_SOC_INTEL_TIGERLAKE_DEBUG_CONSENT=0 +# CONFIG_EARLY_TCSS_DISPLAY is not set CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_SOC_INTEL_COMMON=y @@ -263,9 +265,11 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI=y CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y -CONFIG_INTEL_CAR_NEM=y +# CONFIG_INTEL_CAR_NEM is not set # CONFIG_INTEL_CAR_CQOS is not set -# CONFIG_INTEL_CAR_NEM_ENHANCED is not set +CONFIG_INTEL_CAR_NEM_ENHANCED=y +CONFIG_USE_CAR_NEM_ENHANCED_V1=y +CONFIG_COS_MAPPED_TO_MSB=y CONFIG_USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI=y # CONFIG_INTEL_TME is not set CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y @@ -278,7 +282,7 @@ CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y # CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY=y # CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y @@ -291,11 +295,14 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3=y CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y # CONFIG_PMC_INVALID_READ_AFTER_WRITE is not set +CONFIG_PMC_IPC_ACPI_INTERFACE=y CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y CONFIG_PMC_LOW_POWER_MODE_PROGRAM=y +# CONFIG_PM_ACPI_TIMER_OPTIONAL is not set CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y @@ -318,7 +325,7 @@ CONFIG_SA_PCIEX_LENGTH=0x10000000 # CONFIG_SA_ENABLE_DPR is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL is not set CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y -CONFIG_USE_LEGACY_8254_TIMER=y +# CONFIG_USE_LEGACY_8254_TIMER is not set CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y @@ -326,7 +333,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y -# CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y # # Intel SoC Common PCH Code @@ -354,7 +361,6 @@ CONFIG_PAVP=y # CONFIG_SOC_QC_IPQ40XX is not set # CONFIG_SOC_QC_IPQ806X is not set # CONFIG_SOC_QUALCOMM_QCS405 is not set -# CONFIG_SOC_QUALCOMM_SDM845 is not set # CONFIG_SOC_ROCKCHIP_RK3288 is not set # CONFIG_SOC_ROCKCHIP_RK3399 is not set # CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set @@ -687,6 +693,7 @@ CONFIG_DRIVERS_USB_ACPI=y # CONFIG_DRIVERS_USB_PCI_XHCI is not set CONFIG_DRIVERS_WIFI_GENERIC=y # CONFIG_USE_SAR is not set +CONFIG_DRIVERS_INTEL_USB4_RETIMER=y # CONFIG_COMMONLIB_STORAGE is not set # @@ -713,6 +720,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set # CONFIG_INTEL_TXT is not set # CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set CONFIG_BOOTMEDIA_LOCK_NONE=y # CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set # CONFIG_BOOTMEDIA_LOCK_CHIP is not set @@ -755,9 +763,8 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 CONFIG_POST_IO_PORT=0x80 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set CONFIG_HWBASE_DEBUG_CB=y -CONFIG_HAVE_ACPI_RESUME=y +# CONFIG_HAVE_ACPI_RESUME is not set # CONFIG_DISABLE_ACPI_HIBERNATE is not set -CONFIG_RESUME_PATH_SAME_AS_BOOT=y # CONFIG_NO_MONOTONIC_TIMER is not set CONFIG_HAVE_MONOTONIC_TIMER=y # CONFIG_TIMER_QUEUE is not set @@ -767,6 +774,7 @@ CONFIG_IOAPIC=y # CONFIG_USE_WATCHDOG_ON_BOOT is not set # CONFIG_GFXUMA is not set # CONFIG_ACPI_NHLT is not set +CONFIG_ACPI_LPIT=y # # System tables diff --git a/models/lemp10/coreboot.config b/models/lemp10/coreboot.config index d357d92..326fa66 100644 --- a/models/lemp10/coreboot.config +++ b/models/lemp10/coreboot.config @@ -251,7 +251,7 @@ CONFIG_SOC_INTEL_TIGERLAKE=y CONFIG_CHIPSET_DEVICETREE="soc/intel/tigerlake/chipset.cb" CONFIG_VBT_DATA_SIZE_KB=9 CONFIG_SOC_INTEL_TIGERLAKE_DEBUG_CONSENT=0 -CONFIG_EARLY_TCSS_DISPLAY=y +# CONFIG_EARLY_TCSS_DISPLAY is not set CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_SOC_INTEL_COMMON=y @@ -774,6 +774,7 @@ CONFIG_IOAPIC=y # CONFIG_USE_WATCHDOG_ON_BOOT is not set # CONFIG_GFXUMA is not set # CONFIG_ACPI_NHLT is not set +CONFIG_ACPI_LPIT=y # # System tables diff --git a/scripts/build.sh b/scripts/build.sh index a8d22e8..d25d4dc 100755 --- a/scripts/build.sh +++ b/scripts/build.sh @@ -31,7 +31,6 @@ UEFIPAYLOAD="${BUILD}/UEFIPAYLOAD.fd" COREBOOT="${BUILD}/firmware.rom" USB="${BUILD}/usb.img" EDK2_ARGS=( - -D USE_HPET_TIMER=FALSE -D SHELL_TYPE=NONE -D SOURCE_DEBUG_ENABLE=FALSE )