From c89f7e266f307dc1edcaeb7e7c83cecd4c748469 Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Thu, 3 Feb 2022 08:37:29 -0700 Subject: [PATCH] WIP: enable S3 for TGL-U systems --- coreboot | 2 +- models/darp7/coreboot.config | 2 -- models/galp5/coreboot.config | 2 -- models/lemp10/coreboot.config | 2 -- 4 files changed, 1 insertion(+), 7 deletions(-) diff --git a/coreboot b/coreboot index 43019aa..8d80c94 160000 --- a/coreboot +++ b/coreboot @@ -1 +1 @@ -Subproject commit 43019aa7da6ccb914ed4c4aef5a3c71daad543bb +Subproject commit 8d80c947e46a550f7393ac2c54476c98cfa108b4 diff --git a/models/darp7/coreboot.config b/models/darp7/coreboot.config index 316caf4..6fc1631 100644 --- a/models/darp7/coreboot.config +++ b/models/darp7/coreboot.config @@ -10,8 +10,6 @@ CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom" CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom" CONFIG_PAYLOAD_ELF=y CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)" -CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000 -CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000 CONFIG_POST_IO=n CONFIG_RUN_FSP_GOP=y CONFIG_SMMSTORE=y diff --git a/models/galp5/coreboot.config b/models/galp5/coreboot.config index 1753a65..6f1d468 100644 --- a/models/galp5/coreboot.config +++ b/models/galp5/coreboot.config @@ -10,8 +10,6 @@ CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom" CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom" CONFIG_PAYLOAD_ELF=y CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)" -CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000 -CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000 CONFIG_POST_IO=n CONFIG_RUN_FSP_GOP=y CONFIG_SMMSTORE=y diff --git a/models/lemp10/coreboot.config b/models/lemp10/coreboot.config index 071f8ac..29ff072 100644 --- a/models/lemp10/coreboot.config +++ b/models/lemp10/coreboot.config @@ -10,8 +10,6 @@ CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom" CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom" CONFIG_PAYLOAD_ELF=y CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)" -CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000 -CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000 CONFIG_POST_IO=n CONFIG_RUN_FSP_GOP=y CONFIG_SMMSTORE=y