Commit Graph

5 Commits

Author SHA1 Message Date
Jeremy Soller
c89f7e266f WIP: enable S3 for TGL-U systems 2022-02-03 08:58:49 -07:00
Tim Crawford
8d9fbd1e3c models: Enable coreboot measured boot
All the laptops contain a TPM 2.0 chip. Enable the measured boot
security feature by default.

Link: https://doc.coreboot.org/security/vboot/measured_boot.html
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2021-12-21 13:11:09 -07:00
Tim Crawford
af955613e0 models: Enable SMMSTOREv2 in coreboot
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2021-12-21 13:11:09 -07:00
Tim Crawford
5b4dbd9c53 coreboot: Rebase on 4.15
Rebase on upstream coreboot/coreboot@5622666396. The is slightly ahead
of the 4.15 tag, but includes all of our boards and most Intel SoC
changes we need.

We are now ~10 patches on top of upstream.

The following boards have been upstreamed:

- addw1
- addw2
- bonw14
- darp5
- darp6
- darp7
- galp2
- galp3-b
- galp3-c
- galp4
- galp5
- gaze14
- gaze15
- gaze16
- lemp10
- oryp5
- oryp6
- oryp7
- oryp8

The following drivers have been upstreamed:

- tas5825m

microcode:

- TGL-U boards have been updated to rev 0x9a from private repo
- TGL-H boards have been updated to rev 0x3c from private repo
- Remaining boards changed to use blobs from public repo

FSP:

- TGL changed to use A.0.51.31 from public repo

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2021-12-21 13:11:09 -07:00
Jeremy Soller
de7fa7cb16 Add darp7, galp5, and lemp10 2021-01-19 15:41:51 -07:00