Commit Graph

18 Commits

Author SHA1 Message Date
Tim Crawford
af955613e0 models: Enable SMMSTOREv2 in coreboot
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2021-12-21 13:11:09 -07:00
Tim Crawford
5b4dbd9c53 coreboot: Rebase on 4.15
Rebase on upstream coreboot/coreboot@5622666396. The is slightly ahead
of the 4.15 tag, but includes all of our boards and most Intel SoC
changes we need.

We are now ~10 patches on top of upstream.

The following boards have been upstreamed:

- addw1
- addw2
- bonw14
- darp5
- darp6
- darp7
- galp2
- galp3-b
- galp3-c
- galp4
- galp5
- gaze14
- gaze15
- gaze16
- lemp10
- oryp5
- oryp6
- oryp7
- oryp8

The following drivers have been upstreamed:

- tas5825m

microcode:

- TGL-U boards have been updated to rev 0x9a from private repo
- TGL-H boards have been updated to rev 0x3c from private repo
- Remaining boards changed to use blobs from public repo

FSP:

- TGL changed to use A.0.51.31 from public repo

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2021-12-21 13:11:09 -07:00
Tim Crawford
6213d00b73 Use Intel GOP driver from proprietary BIOS
Using the Intel GOP driver from proprietary firmware has resolved some
issues with the lemp10. Use UEFIExtract from UEFITool to extract the GOP
driver from the proprietary firmware for other boards.

    ./UEFIExtract <firmware.rom> 7755CA7B-CA8F-43C5-889B-E1F59A93D575

The version we have been using is what is present in gaze14.
2021-01-26 10:27:54 -07:00
Tim Crawford
ff0a27ad9c Use defconfig to generate .config
Use minimal set of config selections and let coreboot generate the
default values for the rest of them.

The only differences are the following models selecting
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS instead of *_EXTERNAL_BINS:

- darp5
- darp6
- galp3-c
- galp4
- lemp9
2020-12-14 15:07:14 -07:00
Tim Crawford
c96045d4f6 models: Add oryp5 2020-10-07 06:48:50 -07:00
Jeremy Soller
08f5ff0b3f Update configs 2020-10-05 14:00:35 -07:00
Jeremy Soller
d7db8266c9 addw1 2020-10-05 14:00:35 -07:00
Jeremy Soller
904cee45c1 Update coreboot and configs to fix darp6 MTRR allocation 2020-09-22 11:25:42 -06:00
Jeremy Soller
48ffaf156b Update submodules and configs 2020-09-15 08:15:23 -06:00
Tim Crawford
f53b9d5a1b gaze15: Disable Intel PTT 2020-08-14 10:19:49 -06:00
Jeremy Soller
7e398214ef Update coreboot and configs 2020-08-13 13:13:15 -06:00
Tim Crawford
878bfdda77 models: Update coreboot hda_verb.c files
- Rename from hda.h
- Update license block
- Remove header guards
2020-08-03 10:00:38 -06:00
Jeremy Soller
5ec324d0e7 Update coreboot and configs 2020-07-23 08:45:58 -06:00
Jeremy Soller
26bcb8664e Update coreboot and configs for coreboot dgpu-refactor (#107)
* Update coreboot and configs for coreboot dgpu-refactor

* Update coreboot

* Update coreboot
2020-07-20 11:53:49 -06:00
Jeremy Soller
48bf9dcfce coreboot ec-acpi (#106)
* Add script for updating coreboot config

* Update coreboot and coreboot config

* Update coreboot and configs

* Pass board and version when running make clean in ec

* Add addw2 chip.txt

* Update coreboot

* Update coreboot
2020-07-18 13:49:56 -06:00
Jeremy Soller
231d192d2e Add gaze15 chip 2020-07-02 09:51:29 -06:00
Jeremy Soller
f04d7cd0e1 Update configs 2020-06-11 13:18:03 -06:00
Jeremy Soller
4dc59fee82 Add addw2, gaze15, and oryp6 2020-06-11 13:05:11 -06:00